diff options
| -rw-r--r-- | CMakeLists.txt | 23 | ||||
| -rwxr-xr-x | cmake/modules/AddLLVM.cmake | 14 | ||||
| -rw-r--r-- | cmake/modules/TableGen.cmake | 12 | ||||
| -rw-r--r-- | lib/Target/ARM/CMakeLists.txt | 26 | ||||
| -rw-r--r-- | lib/Target/Alpha/CMakeLists.txt | 26 | ||||
| -rw-r--r-- | lib/Target/CBackend/CMakeLists.txt | 3 | ||||
| -rw-r--r-- | lib/Target/CellSPU/CMakeLists.txt | 25 | ||||
| -rw-r--r-- | lib/Target/CppBackend/CMakeLists.txt | 3 | ||||
| -rw-r--r-- | lib/Target/IA64/CMakeLists.txt | 20 | ||||
| -rw-r--r-- | lib/Target/MSIL/CMakeLists.txt | 3 | ||||
| -rw-r--r-- | lib/Target/Mips/CMakeLists.txt | 23 | ||||
| -rw-r--r-- | lib/Target/PIC16/CMakeLists.txt | 23 | ||||
| -rw-r--r-- | lib/Target/PowerPC/AsmPrinter/CMakeLists.txt | 9 | ||||
| -rw-r--r-- | lib/Target/PowerPC/CMakeLists.txt | 28 | ||||
| -rw-r--r-- | lib/Target/Sparc/CMakeLists.txt | 24 | ||||
| -rw-r--r-- | lib/Target/X86/CMakeLists.txt | 55 | ||||
| -rw-r--r-- | tools/llvm-config/CMakeLists.txt | 5 |
17 files changed, 274 insertions, 48 deletions
diff --git a/CMakeLists.txt b/CMakeLists.txt index 039b139..3411eed 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -13,8 +13,14 @@ set(LLVM_BINARY_DIR ${CMAKE_CURRENT_BINARY_DIR}) set(LLVM_TOOLS_BINARY_DIR ${LLVM_BINARY_DIR}/bin) set(LLVM_EXAMPLES_BINARY_DIR ${LLVM_BINARY_DIR}/examples) -# TODO: Support user-specified targets: -set(LLVM_TARGETS_TO_BUILD X86) +if( MSVC ) + set(LLVM_TARGETS_TO_BUILD X86 + CACHE STRING "Semicolon-separated list of targets to build") +else( MSVC ) + set(LLVM_TARGETS_TO_BUILD + Alpha ARM CBackend CellSPU CppBackend IA64 Mips MSIL PIC16 PowerPC Sparc X86 + CACHE STRING "Semicolon-separated list of targets to build") +endif( MSVC ) if( NOT MSVC ) set(CMAKE_CXX_LINK_EXECUTABLE "sh -c \"${CMAKE_CXX_LINK_EXECUTABLE}\"") @@ -96,6 +102,7 @@ include_directories( ${LLVM_BINARY_DIR}/include ${llvm_include_path}) include(AddLLVM) include(AddPartiallyLinkedObject) +include(TableGen) add_subdirectory(lib/Support) add_subdirectory(lib/System) @@ -129,15 +136,21 @@ add_subdirectory(lib/Transforms/Hello) add_subdirectory(lib/Linker) add_subdirectory(lib/Analysis) add_subdirectory(lib/Analysis/IPA) -add_subdirectory(lib/Target/X86) -add_subdirectory(lib/Target/X86/AsmPrinter) + +foreach(t ${LLVM_TARGETS_TO_BUILD}) + message(STATUS "Targeting ${t}") + add_subdirectory(lib/Target/${t}) + if( EXISTS ${CMAKE_SOURCE_DIR}/lib/Target/${t}/AsmPrinter/CMakeLists.txt ) + add_subdirectory(lib/Target/${t}/AsmPrinter) + endif( EXISTS ${CMAKE_SOURCE_DIR}/lib/Target/${t}/AsmPrinter/CMakeLists.txt ) +endforeach(t) + add_subdirectory(lib/ExecutionEngine) add_subdirectory(lib/ExecutionEngine/Interpreter) add_subdirectory(lib/ExecutionEngine/JIT) add_subdirectory(lib/Target) add_subdirectory(lib/AsmParser) add_subdirectory(lib/Debugger) -# TODO: lib/Target/CBackEnd add_subdirectory(lib/Archive) add_subdirectory(tools) diff --git a/cmake/modules/AddLLVM.cmake b/cmake/modules/AddLLVM.cmake index fc917d3..d60b288 100755 --- a/cmake/modules/AddLLVM.cmake +++ b/cmake/modules/AddLLVM.cmake @@ -41,3 +41,17 @@ macro(add_llvm_example name) # set(CMAKE_RUNTIME_OUTPUT_DIRECTORY ${LLVM_EXAMPLES_BINARY_DIR}) add_llvm_executable(${name} ${ARGN}) endmacro(add_llvm_example name) + + +macro(add_llvm_target target_name) + if( TABLEGEN_OUTPUT ) + add_custom_target(${target_name}Table_gen + DEPENDS ${TABLEGEN_OUTPUT}) + add_dependencies(${target_name}Table_gen ${LLVM_COMMON_DEPENDS}) + endif( TABLEGEN_OUTPUT ) + include_directories(BEFORE ${CMAKE_CURRENT_BINARY_DIR}) + add_partially_linked_object(LLVM${target_name} ${ARGN}) + if( TABLEGEN_OUTPUT ) + add_dependencies(LLVM${target_name} ${target_name}Table_gen) + endif( TABLEGEN_OUTPUT ) +endmacro(add_llvm_target) diff --git a/cmake/modules/TableGen.cmake b/cmake/modules/TableGen.cmake new file mode 100644 index 0000000..f7b081c --- /dev/null +++ b/cmake/modules/TableGen.cmake @@ -0,0 +1,12 @@ +# LLVM_TARGET_DEFINITIONS must contain the name of the .td file to process. +# Extra parameters for `tblgen' may come after `ofn' parameter. +# Adds the name of the generated file to TABLEGEN_OUTPUT. + +macro(tablegen ofn) + add_custom_command(OUTPUT ${CMAKE_CURRENT_BINARY_DIR}/${ofn} + COMMAND tblgen ${ARGN} -I ${CMAKE_CURRENT_SOURCE_DIR} -I ${CMAKE_SOURCE_DIR}/lib/Target -I ${llvm_include_path} ${CMAKE_CURRENT_SOURCE_DIR}/${LLVM_TARGET_DEFINITIONS} -o ${ofn} + DEPENDS tblgen ${CMAKE_CURRENT_SOURCE_DIR}/${LLVM_TARGET_DEFINITIONS} + COMMENT "Building ${ofn}..." + ) + set(TABLEGEN_OUTPUT ${TABLEGEN_OUTPUT} ${CMAKE_CURRENT_BINARY_DIR}/${ofn}) +endmacro(tablegen) diff --git a/lib/Target/ARM/CMakeLists.txt b/lib/Target/ARM/CMakeLists.txt new file mode 100644 index 0000000..8882add --- /dev/null +++ b/lib/Target/ARM/CMakeLists.txt @@ -0,0 +1,26 @@ +set(LLVM_TARGET_DEFINITIONS ARM.td) + +tablegen(ARMGenRegisterInfo.h.inc -gen-register-desc-header) +tablegen(ARMGenRegisterNames.inc -gen-register-enums) +tablegen(ARMGenRegisterInfo.inc -gen-register-desc) +tablegen(ARMGenInstrNames.inc -gen-instr-enums) +tablegen(ARMGenInstrInfo.inc -gen-instr-desc) +tablegen(ARMGenCodeEmitter.inc -gen-emitter) +tablegen(ARMGenAsmWriter.inc -gen-asm-writer) +tablegen(ARMGenDAGISel.inc -gen-dag-isel) +tablegen(ARMGenSubtarget.inc -gen-subtarget) + +add_llvm_target(ARM + ARMCodeEmitter.cpp + ARMConstantIslandPass.cpp + ARMConstantPoolValue.cpp + ARMInstrInfo.cpp + ARMISelDAGToDAG.cpp + ARMISelLowering.cpp + ARMJITInfo.cpp + ARMLoadStoreOptimizer.cpp + ARMRegisterInfo.cpp + ARMSubtarget.cpp + ARMTargetAsmInfo.cpp + ARMTargetMachine.cpp + ) diff --git a/lib/Target/Alpha/CMakeLists.txt b/lib/Target/Alpha/CMakeLists.txt new file mode 100644 index 0000000..8a845ae --- /dev/null +++ b/lib/Target/Alpha/CMakeLists.txt @@ -0,0 +1,26 @@ +set(LLVM_TARGET_DEFINITIONS Alpha.td) + +tablegen(AlphaGenRegisterInfo.h.inc -gen-register-desc-header) +tablegen(AlphaGenRegisterNames.inc -gen-register-enums) +tablegen(AlphaGenRegisterInfo.inc -gen-register-desc) +tablegen(AlphaGenInstrNames.inc -gen-instr-enums) +tablegen(AlphaGenInstrInfo.inc -gen-instr-desc) +tablegen(AlphaGenCodeEmitter.inc -gen-emitter) +tablegen(AlphaGenAsmWriter.inc -gen-asm-writer) +tablegen(AlphaGenDAGISel.inc -gen-dag-isel) +tablegen(AlphaGenSubtarget.inc -gen-subtarget) + +add_llvm_target(Alpha + AlphaAsmPrinter.cpp + AlphaBranchSelector.cpp + AlphaCodeEmitter.cpp + AlphaInstrInfo.cpp + AlphaISelDAGToDAG.cpp + AlphaISelLowering.cpp + AlphaJITInfo.cpp + AlphaLLRP.cpp + AlphaRegisterInfo.cpp + AlphaSubtarget.cpp + AlphaTargetAsmInfo.cpp + AlphaTargetMachine.cpp + ) diff --git a/lib/Target/CBackend/CMakeLists.txt b/lib/Target/CBackend/CMakeLists.txt new file mode 100644 index 0000000..b04912f --- /dev/null +++ b/lib/Target/CBackend/CMakeLists.txt @@ -0,0 +1,3 @@ +add_llvm_target(CBackEnd + CBackend.cpp + ) diff --git a/lib/Target/CellSPU/CMakeLists.txt b/lib/Target/CellSPU/CMakeLists.txt new file mode 100644 index 0000000..bfc9c90 --- /dev/null +++ b/lib/Target/CellSPU/CMakeLists.txt @@ -0,0 +1,25 @@ +set(LLVM_TARGET_DEFINITIONS SPU.td) + +tablegen(SPUGenInstrNames.inc -gen-instr-enums) +tablegen(SPUGenRegisterNames.inc -gen-register-enums) +tablegen(SPUGenAsmWriter.inc -gen-asm-writer) +tablegen(SPUGenCodeEmitter.inc -gen-emitter) +tablegen(SPUGenRegisterInfo.h.inc -gen-register-desc-header) +tablegen(SPUGenRegisterInfo.inc -gen-register-desc) +tablegen(SPUGenInstrInfo.inc -gen-instr-desc) +tablegen(SPUGenDAGISel.inc -gen-dag-isel) +tablegen(SPUGenSubtarget.inc -gen-subtarget) +tablegen(SPUGenCallingConv.inc -gen-callingconv) + +add_llvm_target(CellSPU + SPUAsmPrinter.cpp + SPUFrameInfo.cpp + SPUHazardRecognizers.cpp + SPUInstrInfo.cpp + SPUISelDAGToDAG.cpp + SPUISelLowering.cpp + SPURegisterInfo.cpp + SPUSubtarget.cpp + SPUTargetAsmInfo.cpp + SPUTargetMachine.cpp + ) diff --git a/lib/Target/CppBackend/CMakeLists.txt b/lib/Target/CppBackend/CMakeLists.txt new file mode 100644 index 0000000..f8182b8 --- /dev/null +++ b/lib/Target/CppBackend/CMakeLists.txt @@ -0,0 +1,3 @@ +add_llvm_target(CppBackend + CPPBackend.cpp + ) diff --git a/lib/Target/IA64/CMakeLists.txt b/lib/Target/IA64/CMakeLists.txt new file mode 100644 index 0000000..6088ba1 --- /dev/null +++ b/lib/Target/IA64/CMakeLists.txt @@ -0,0 +1,20 @@ +set(LLVM_TARGET_DEFINITIONS IA64.td) + +tablegen(IA64GenRegisterInfo.h.inc -gen-register-desc-header) +tablegen(IA64GenRegisterNames.inc -gen-register-enums) +tablegen(IA64GenRegisterInfo.inc -gen-register-desc) +tablegen(IA64GenInstrNames.inc -gen-instr-enums) +tablegen(IA64GenInstrInfo.inc -gen-instr-desc) +tablegen(IA64GenAsmWriter.inc -gen-asm-writer) +tablegen(IA64GenDAGISel.inc -gen-dag-isel) + +add_llvm_target(IA64 + IA64AsmPrinter.cpp + IA64Bundling.cpp + IA64InstrInfo.cpp + IA64ISelDAGToDAG.cpp + IA64ISelLowering.cpp + IA64RegisterInfo.cpp + IA64TargetAsmInfo.cpp + IA64TargetMachine.cpp + ) diff --git a/lib/Target/MSIL/CMakeLists.txt b/lib/Target/MSIL/CMakeLists.txt new file mode 100644 index 0000000..b1d47ef --- /dev/null +++ b/lib/Target/MSIL/CMakeLists.txt @@ -0,0 +1,3 @@ +add_llvm_target(MSIL + MSILWriter.cpp + ) diff --git a/lib/Target/Mips/CMakeLists.txt b/lib/Target/Mips/CMakeLists.txt new file mode 100644 index 0000000..b14e6ca --- /dev/null +++ b/lib/Target/Mips/CMakeLists.txt @@ -0,0 +1,23 @@ +set(LLVM_TARGET_DEFINITIONS Mips.td) + +tablegen(MipsGenRegisterInfo.h.inc -gen-register-desc-header) +tablegen(MipsGenRegisterNames.inc -gen-register-enums) +tablegen(MipsGenRegisterInfo.inc -gen-register-desc) +tablegen(MipsGenInstrNames.inc -gen-instr-enums) +tablegen(MipsGenInstrInfo.inc -gen-instr-desc) +tablegen(MipsGenAsmWriter.inc -gen-asm-writer) +tablegen(MipsGenDAGISel.inc -gen-dag-isel) +tablegen(MipsGenCallingConv.inc -gen-callingconv) +tablegen(MipsGenSubtarget.inc -gen-subtarget) + +add_llvm_target(Mips + MipsAsmPrinter.cpp + MipsDelaySlotFiller.cpp + MipsInstrInfo.cpp + MipsISelDAGToDAG.cpp + MipsISelLowering.cpp + MipsRegisterInfo.cpp + MipsSubtarget.cpp + MipsTargetAsmInfo.cpp + MipsTargetMachine.cpp + ) diff --git a/lib/Target/PIC16/CMakeLists.txt b/lib/Target/PIC16/CMakeLists.txt new file mode 100644 index 0000000..029a751 --- /dev/null +++ b/lib/Target/PIC16/CMakeLists.txt @@ -0,0 +1,23 @@ +set(LLVM_TARGET_DEFINITIONS PIC16.td) + +tablegen(PIC16GenRegisterInfo.h.inc -gen-register-desc-header) +tablegen(PIC16GenRegisterNames.inc -gen-register-enums) +tablegen(PIC16GenRegisterInfo.inc -gen-register-desc) +tablegen(PIC16GenInstrNames.inc -gen-instr-enums) +tablegen(PIC16GenInstrInfo.inc -gen-instr-desc) +tablegen(PIC16GenAsmWriter.inc -gen-asm-writer) +tablegen(PIC16GenDAGISel.inc -gen-dag-isel) +tablegen(PIC16GenCallingConv.inc -gen-callingconv) +tablegen(PIC16GenSubtarget.inc -gen-subtarget) + +add_llvm_target(PIC16 + PIC16AsmPrinter.cpp + PIC16ConstantPoolValue.cpp + PIC16InstrInfo.cpp + PIC16ISelDAGToDAG.cpp + PIC16ISelLowering.cpp + PIC16RegisterInfo.cpp + PIC16Subtarget.cpp + PIC16TargetAsmInfo.cpp + PIC16TargetMachine.cpp + ) diff --git a/lib/Target/PowerPC/AsmPrinter/CMakeLists.txt b/lib/Target/PowerPC/AsmPrinter/CMakeLists.txt new file mode 100644 index 0000000..91f8f3c --- /dev/null +++ b/lib/Target/PowerPC/AsmPrinter/CMakeLists.txt @@ -0,0 +1,9 @@ +include_directories( ${CMAKE_CURRENT_BINARY_DIR}/.. ${CMAKE_CURRENT_SOURCE_DIR}/.. ) + +add_llvm_library(LLVMPowerPCAsmPrinter + PPCAsmPrinter.cpp + ) + +target_name_of_partially_linked_object(LLVMPowerPCCodeGen n) + +add_dependencies(LLVMPowerPCAsmPrinter ${n}) diff --git a/lib/Target/PowerPC/CMakeLists.txt b/lib/Target/PowerPC/CMakeLists.txt new file mode 100644 index 0000000..0b67aff --- /dev/null +++ b/lib/Target/PowerPC/CMakeLists.txt @@ -0,0 +1,28 @@ +set(LLVM_TARGET_DEFINITIONS PPC.td) + +tablegen(PPCGenInstrNames.inc -gen-instr-enums) +tablegen(PPCGenRegisterNames.inc -gen-register-enums) +tablegen(PPCGenAsmWriter.inc -gen-asm-writer) +tablegen(PPCGenCodeEmitter.inc -gen-emitter) +tablegen(PPCGenRegisterInfo.h.inc -gen-register-desc-header) +tablegen(PPCGenRegisterInfo.inc -gen-register-desc) +tablegen(PPCGenInstrInfo.inc -gen-instr-desc) +tablegen(PPCGenDAGISel.inc -gen-dag-isel) +tablegen(PPCGenCallingConv.inc -gen-callingconv) +tablegen(PPCGenSubtarget.inc -gen-subtarget) + +add_llvm_target(PowerPCCodeGen + PPCBranchSelector.cpp + PPCCodeEmitter.cpp + PPCHazardRecognizers.cpp + PPCInstrInfo.cpp + PPCISelDAGToDAG.cpp + PPCISelLowering.cpp + PPCJITInfo.cpp + PPCMachOWriterInfo.cpp + PPCPredicates.cpp + PPCRegisterInfo.cpp + PPCSubtarget.cpp + PPCTargetAsmInfo.cpp + PPCTargetMachine.cpp + ) diff --git a/lib/Target/Sparc/CMakeLists.txt b/lib/Target/Sparc/CMakeLists.txt new file mode 100644 index 0000000..37f7835 --- /dev/null +++ b/lib/Target/Sparc/CMakeLists.txt @@ -0,0 +1,24 @@ +set(LLVM_TARGET_DEFINITIONS Sparc.td) + +tablegen(SparcGenRegisterInfo.h.inc -gen-register-desc-header) +tablegen(SparcGenRegisterNames.inc -gen-register-enums) +tablegen(SparcGenRegisterInfo.inc -gen-register-desc) +tablegen(SparcGenInstrNames.inc -gen-instr-enums) +tablegen(SparcGenInstrInfo.inc -gen-instr-desc) +tablegen(SparcGenAsmWriter.inc -gen-asm-writer) +tablegen(SparcGenDAGISel.inc -gen-dag-isel) +tablegen(SparcGenSubtarget.inc -gen-subtarget) +tablegen(SparcGenCallingConv.inc -gen-callingconv) + +add_llvm_target(Sparc + DelaySlotFiller.cpp + FPMover.cpp + SparcAsmPrinter.cpp + SparcInstrInfo.cpp + SparcISelDAGToDAG.cpp + SparcISelLowering.cpp + SparcRegisterInfo.cpp + SparcSubtarget.cpp + SparcTargetAsmInfo.cpp + SparcTargetMachine.cpp + ) diff --git a/lib/Target/X86/CMakeLists.txt b/lib/Target/X86/CMakeLists.txt index 5b79003..3c4f37f 100644 --- a/lib/Target/X86/CMakeLists.txt +++ b/lib/Target/X86/CMakeLists.txt @@ -1,43 +1,18 @@ -macro(x86tgen ofn) - add_custom_command(OUTPUT ${CMAKE_CURRENT_BINARY_DIR}/${ofn} - COMMAND tblgen ${ARGN} -I ${CMAKE_CURRENT_SOURCE_DIR} -I ${CMAKE_SOURCE_DIR}/lib/Target -I ${llvm_include_path} ${CMAKE_CURRENT_SOURCE_DIR}/X86.td -o ${ofn} - DEPENDS tblgen ${CMAKE_CURRENT_SOURCE_DIR}/X86.td - COMMENT "Building ${ofn}..." - ) -endmacro(x86tgen) +set(LLVM_TARGET_DEFINITIONS X86.td) -x86tgen(X86GenRegisterInfo.h.inc -gen-register-desc-header) -x86tgen(X86GenRegisterNames.inc -gen-register-enums) -x86tgen(X86GenRegisterInfo.inc -gen-register-desc) -x86tgen(X86GenInstrNames.inc -gen-instr-enums) -x86tgen(X86GenInstrInfo.inc -gen-instr-desc) -x86tgen(X86GenAsmWriter.inc -gen-asm-writer) -x86tgen(X86GenAsmWriter1.inc -gen-asm-writer -asmwriternum=1) -x86tgen(X86GenDAGISel.inc -gen-dag-isel) -x86tgen(X86GenFastISel.inc -gen-fast-isel) -x86tgen(X86GenCallingConv.inc -gen-callingconv) -x86tgen(X86GenSubtarget.inc -gen-subtarget) +tablegen(X86GenRegisterInfo.h.inc -gen-register-desc-header) +tablegen(X86GenRegisterNames.inc -gen-register-enums) +tablegen(X86GenRegisterInfo.inc -gen-register-desc) +tablegen(X86GenInstrNames.inc -gen-instr-enums) +tablegen(X86GenInstrInfo.inc -gen-instr-desc) +tablegen(X86GenAsmWriter.inc -gen-asm-writer) +tablegen(X86GenAsmWriter1.inc -gen-asm-writer -asmwriternum=1) +tablegen(X86GenDAGISel.inc -gen-dag-isel) +tablegen(X86GenFastISel.inc -gen-fast-isel) +tablegen(X86GenCallingConv.inc -gen-callingconv) +tablegen(X86GenSubtarget.inc -gen-subtarget) -add_custom_target(X86Table_gen echo Tablegenning - DEPENDS - ${CMAKE_CURRENT_BINARY_DIR}/X86GenRegisterInfo.h.inc - ${CMAKE_CURRENT_BINARY_DIR}/X86GenRegisterNames.inc - ${CMAKE_CURRENT_BINARY_DIR}/X86GenRegisterInfo.inc - ${CMAKE_CURRENT_BINARY_DIR}/X86GenInstrNames.inc - ${CMAKE_CURRENT_BINARY_DIR}/X86GenInstrInfo.inc - ${CMAKE_CURRENT_BINARY_DIR}/X86GenAsmWriter.inc - ${CMAKE_CURRENT_BINARY_DIR}/X86GenAsmWriter1.inc - ${CMAKE_CURRENT_BINARY_DIR}/X86GenDAGISel.inc - ${CMAKE_CURRENT_BINARY_DIR}/X86GenFastISel.inc - ${CMAKE_CURRENT_BINARY_DIR}/X86GenCallingConv.inc - ${CMAKE_CURRENT_BINARY_DIR}/X86GenSubtarget.inc - ) - -add_dependencies(X86Table_gen ${LLVM_COMMON_DEPENDS}) - -include_directories(BEFORE ${CMAKE_CURRENT_BINARY_DIR}) - -add_partially_linked_object(LLVMX86CodeGen +add_llvm_target(X86CodeGen X86CodeEmitter.cpp X86ELFWriterInfo.cpp X86FloatingPoint.cpp @@ -51,7 +26,3 @@ add_partially_linked_object(LLVMX86CodeGen X86TargetMachine.cpp X86FastISel.cpp ) - -add_dependencies(LLVMX86CodeGen - X86Table_gen -) diff --git a/tools/llvm-config/CMakeLists.txt b/tools/llvm-config/CMakeLists.txt index bf8debb..01167cb 100644 --- a/tools/llvm-config/CMakeLists.txt +++ b/tools/llvm-config/CMakeLists.txt @@ -40,7 +40,10 @@ if( NOT TT_RV EQUAL 0 ) message(FATAL_ERROR "Failed to execute ${config_guess}") endif( NOT TT_RV EQUAL 0 ) set(target ${LLVM_TARGET_TRIPLET}) -set(TARGETS_TO_BUILD "X86") # TODO +foreach(c ${LLVM_TARGETS_TO_BUILD}) + set(TARGETS_BUILT "${TARGETS_BUILT} ${c}") +endforeach(c) +set(TARGETS_TO_BUILD ${TARGETS_BUILT}) set(TARGET_HAS_JIT "1") # TODO # Avoids replacement at config-time: |