diff options
| -rw-r--r-- | lib/Target/X86/X86InstrInfo.td | 6 | ||||
| -rw-r--r-- | test/CodeGen/X86/tbm_patterns.ll | 20 |
2 files changed, 26 insertions, 0 deletions
diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td index be35187..02ad169 100644 --- a/lib/Target/X86/X86InstrInfo.td +++ b/lib/Target/X86/X86InstrInfo.td @@ -2014,6 +2014,12 @@ let Predicates = [HasTBM] in { def : Pat<(or GR64:$src, (not (add GR64:$src, 1))), (BLCI_64rr GR64:$src)>; + // Extra patterns because opt can optimize the above patterns to this. + def : Pat<(or GR32:$src, (sub -2, GR32:$src)), + (BLCI_32rr GR32:$src)>; + def : Pat<(or GR64:$src, (sub -2, GR64:$src)), + (BLCI_64rr GR64:$src)>; + def : Pat<(and (not GR32:$src), (add GR32:$src, 1)), (BLCIC_32rr GR32:$src)>; def : Pat<(and (not GR64:$src), (add GR64:$src, 1)), diff --git a/test/CodeGen/X86/tbm_patterns.ll b/test/CodeGen/X86/tbm_patterns.ll index 8b999be..79eea10 100644 --- a/test/CodeGen/X86/tbm_patterns.ll +++ b/test/CodeGen/X86/tbm_patterns.ll @@ -84,6 +84,26 @@ entry: ret i64 %2 } +define i32 @test_x86_tbm_blci_u32_b(i32 %a) nounwind readnone { +entry: + ; CHECK-LABEL: test_x86_tbm_blci_u32_b: + ; CHECK-NOT: mov + ; CHECK: blci % + %0 = sub i32 -2, %a + %1 = or i32 %0, %a + ret i32 %1 +} + +define i64 @test_x86_tbm_blci_u64_b(i64 %a) nounwind readnone { +entry: + ; CHECK-LABEL: test_x86_tbm_blci_u64_b: + ; CHECK-NOT: mov + ; CHECK: blci % + %0 = sub i64 -2, %a + %1 = or i64 %0, %a + ret i64 %1 +} + define i32 @test_x86_tbm_blcic_u32(i32 %a) nounwind readnone { entry: ; CHECK-LABEL: test_x86_tbm_blcic_u32: |