diff options
| -rw-r--r-- | lib/CodeGen/SelectionDAG/TargetLowering.cpp | 4 | ||||
| -rw-r--r-- | test/CodeGen/X86/2008-11-06-testb.ll | 2 |
2 files changed, 5 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp index a0ec7dd..e125ff3 100644 --- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -1353,6 +1353,7 @@ TargetLowering::SimplifySetCC(MVT VT, SDValue N0, SDValue N1, } } +#if 0 // If the LHS is '(and load, const)', the RHS is 0, // the test is for equality or unsigned, and all 1 bits of the const are // in the same partial word, see if we can shorten the load. @@ -1406,7 +1407,8 @@ TargetLowering::SimplifySetCC(MVT VT, SDValue N0, SDValue N1, } } } - +#endif + // If the LHS is a ZERO_EXTEND, perform the comparison on the input. if (N0.getOpcode() == ISD::ZERO_EXTEND) { unsigned InSize = N0.getOperand(0).getValueType().getSizeInBits(); diff --git a/test/CodeGen/X86/2008-11-06-testb.ll b/test/CodeGen/X86/2008-11-06-testb.ll index 069d5d6..53f86b3 100644 --- a/test/CodeGen/X86/2008-11-06-testb.ll +++ b/test/CodeGen/X86/2008-11-06-testb.ll @@ -1,4 +1,6 @@ ; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin | grep testb +; XFAIL: * + ; ModuleID = '<stdin>' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin9.5" |