diff options
| -rw-r--r-- | include/llvm/Target/TargetInstrInfo.h | 6 | ||||
| -rw-r--r-- | lib/CodeGen/PeepholeOptimizer.cpp | 32 | ||||
| -rw-r--r-- | lib/Target/ARM/ARMBaseInstrInfo.cpp | 7 | ||||
| -rw-r--r-- | lib/Target/ARM/ARMBaseInstrInfo.h | 3 |
4 files changed, 20 insertions, 28 deletions
diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h index 7e77dba..2bb01f4 100644 --- a/include/llvm/Target/TargetInstrInfo.h +++ b/include/llvm/Target/TargetInstrInfo.h @@ -602,12 +602,10 @@ public: /// OptimizeCompareInstr - See if the comparison instruction can be converted /// into something more efficient. E.g., on ARM most instructions can set the - /// flags register, obviating the need for a separate CMP. Update the iterator - /// *only* if a transformation took place. + /// flags register, obviating the need for a separate CMP. virtual bool OptimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg, int Mask, int Value, - const MachineRegisterInfo *MRI, - MachineBasicBlock::iterator &) const { + const MachineRegisterInfo *MRI) const { return false; } diff --git a/lib/CodeGen/PeepholeOptimizer.cpp b/lib/CodeGen/PeepholeOptimizer.cpp index 0f2ba41..75f453a 100644 --- a/lib/CodeGen/PeepholeOptimizer.cpp +++ b/lib/CodeGen/PeepholeOptimizer.cpp @@ -82,8 +82,7 @@ namespace { } private: - bool OptimizeCmpInstr(MachineInstr *MI, MachineBasicBlock *MBB, - MachineBasicBlock::iterator &MII); + bool OptimizeCmpInstr(MachineInstr *MI, MachineBasicBlock *MBB); bool OptimizeExtInstr(MachineInstr *MI, MachineBasicBlock *MBB, SmallPtrSet<MachineInstr*, 8> &LocalMIs); }; @@ -112,12 +111,10 @@ FunctionPass *llvm::createPeepholeOptimizerPass() { bool PeepholeOptimizer:: OptimizeExtInstr(MachineInstr *MI, MachineBasicBlock *MBB, SmallPtrSet<MachineInstr*, 8> &LocalMIs) { - LocalMIs.insert(MI); - unsigned SrcReg, DstReg, SubIdx; if (!TII->isCoalescableExtInstr(*MI, SrcReg, DstReg, SubIdx)) return false; - + if (TargetRegisterInfo::isPhysicalRegister(DstReg) || TargetRegisterInfo::isPhysicalRegister(SrcReg)) return false; @@ -242,8 +239,7 @@ OptimizeExtInstr(MachineInstr *MI, MachineBasicBlock *MBB, /// set) the same flag as the compare, then we can remove the comparison and use /// the flag from the previous instruction. bool PeepholeOptimizer::OptimizeCmpInstr(MachineInstr *MI, - MachineBasicBlock *MBB, - MachineBasicBlock::iterator &NextIter){ + MachineBasicBlock *MBB){ // If this instruction is a comparison against zero and isn't comparing a // physical register, we can try to optimize it. unsigned SrcReg; @@ -253,7 +249,7 @@ bool PeepholeOptimizer::OptimizeCmpInstr(MachineInstr *MI, return false; // Attempt to optimize the comparison instruction. - if (TII->OptimizeCompareInstr(MI, SrcReg, CmpMask, CmpValue, MRI, NextIter)) { + if (TII->OptimizeCompareInstr(MI, SrcReg, CmpMask, CmpValue, MRI)) { ++NumEliminated; return true; } @@ -262,6 +258,9 @@ bool PeepholeOptimizer::OptimizeCmpInstr(MachineInstr *MI, } bool PeepholeOptimizer::runOnMachineFunction(MachineFunction &MF) { + if (DisablePeephole) + return false; + TM = &MF.getTarget(); TII = TM->getInstrInfo(); MRI = &MF.getRegInfo(); @@ -276,17 +275,16 @@ bool PeepholeOptimizer::runOnMachineFunction(MachineFunction &MF) { for (MachineBasicBlock::iterator MII = I->begin(), MIE = I->end(); MII != MIE; ) { - MachineInstr *MI = &*MII; - - if (MI->getDesc().isCompare() && - !MI->getDesc().hasUnmodeledSideEffects()) { - if (!DisablePeephole && OptimizeCmpInstr(MI, MBB, MII)) - Changed = true; - else - ++MII; + MachineInstr *MI = &*MII++; + LocalMIs.insert(MI); + + if (MI->getDesc().hasUnmodeledSideEffects()) + continue; + + if (MI->getDesc().isCompare()) { + Changed |= OptimizeCmpInstr(MI, MBB); } else { Changed |= OptimizeExtInstr(MI, MBB, LocalMIs); - ++MII; } } } diff --git a/lib/Target/ARM/ARMBaseInstrInfo.cpp b/lib/Target/ARM/ARMBaseInstrInfo.cpp index b023379..9bda8fd 100644 --- a/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ b/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -1484,12 +1484,10 @@ static bool isSuitableForMask(MachineInstr *&MI, unsigned SrcReg, } /// OptimizeCompareInstr - Convert the instruction supplying the argument to the -/// comparison into one that sets the zero bit in the flags register. Update the -/// iterator *only* if a transformation took place. +/// comparison into one that sets the zero bit in the flags register. bool ARMBaseInstrInfo:: OptimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg, int CmpMask, - int CmpValue, const MachineRegisterInfo *MRI, - MachineBasicBlock::iterator &MII) const { + int CmpValue, const MachineRegisterInfo *MRI) const { if (CmpValue != 0) return false; @@ -1561,7 +1559,6 @@ OptimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg, int CmpMask, MI->RemoveOperand(5); MachineInstrBuilder(MI) .addReg(ARM::CPSR, RegState::Define | RegState::Implicit); - MII = llvm::next(MachineBasicBlock::iterator(CmpInstr)); CmpInstr->eraseFromParent(); return true; } diff --git a/lib/Target/ARM/ARMBaseInstrInfo.h b/lib/Target/ARM/ARMBaseInstrInfo.h index c11f02c..c929fce 100644 --- a/lib/Target/ARM/ARMBaseInstrInfo.h +++ b/lib/Target/ARM/ARMBaseInstrInfo.h @@ -344,8 +344,7 @@ public: /// that we can remove a "comparison with zero". virtual bool OptimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg, int CmpMask, int CmpValue, - const MachineRegisterInfo *MRI, - MachineBasicBlock::iterator &MII) const; + const MachineRegisterInfo *MRI) const; virtual unsigned getNumMicroOps(const InstrItineraryData *ItinData, const MachineInstr *MI) const; |