diff options
| -rw-r--r-- | lib/Target/X86/X86InstrInfo.cpp | 45 | ||||
| -rw-r--r-- | test/CodeGen/X86/2010-04-13-AnalyzeBranchCrash.ll | 42 | ||||
| -rw-r--r-- | test/CodeGen/X86/brcond.ll | 39 |
3 files changed, 125 insertions, 1 deletions
diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp index e67bf3d..66b6562 100644 --- a/lib/Target/X86/X86InstrInfo.cpp +++ b/lib/Target/X86/X86InstrInfo.cpp @@ -1684,6 +1684,7 @@ bool X86InstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, // Start from the bottom of the block and work up, examining the // terminator instructions. MachineBasicBlock::iterator I = MBB.end(); + MachineBasicBlock::iterator UnCondBrIter = MBB.end(); while (I != MBB.begin()) { --I; if (I->isDebugValue()) @@ -1701,6 +1702,8 @@ bool X86InstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, // Handle unconditional branches. if (I->getOpcode() == X86::JMP_4) { + UnCondBrIter = I; + if (!AllowModify) { TBB = I->getOperand(0).getMBB(); continue; @@ -1718,10 +1721,11 @@ bool X86InstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, TBB = 0; I->eraseFromParent(); I = MBB.end(); + UnCondBrIter = MBB.end(); continue; } - // TBB is used to indicate the unconditinal destination. + // TBB is used to indicate the unconditional destination. TBB = I->getOperand(0).getMBB(); continue; } @@ -1733,6 +1737,45 @@ bool X86InstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, // Working from the bottom, handle the first conditional branch. if (Cond.empty()) { + MachineBasicBlock *TargetBB = I->getOperand(0).getMBB(); + if (AllowModify && UnCondBrIter != MBB.end() && + MBB.isLayoutSuccessor(TargetBB)) { + // If we can modify the code and it ends in something like: + // + // jCC L1 + // jmp L2 + // L1: + // ... + // L2: + // + // Then we can change this to: + // + // jnCC L2 + // L1: + // ... + // L2: + // + // Which is a bit more efficient. + // We conditionally jump to the fall-through block. + BranchCode = GetOppositeBranchCondition(BranchCode); + unsigned JNCC = GetCondBranchFromCond(BranchCode); + MachineBasicBlock::iterator OldInst = I; + + BuildMI(MBB, UnCondBrIter, MBB.findDebugLoc(I), get(JNCC)) + .addMBB(UnCondBrIter->getOperand(0).getMBB()); + BuildMI(MBB, UnCondBrIter, MBB.findDebugLoc(I), get(X86::JMP_4)) + .addMBB(TargetBB); + MBB.addSuccessor(TargetBB); + + OldInst->eraseFromParent(); + UnCondBrIter->eraseFromParent(); + + // Restart the analysis. + UnCondBrIter = MBB.end(); + I = MBB.end(); + continue; + } + FBB = TBB; TBB = I->getOperand(0).getMBB(); Cond.push_back(MachineOperand::CreateImm(BranchCode)); diff --git a/test/CodeGen/X86/2010-04-13-AnalyzeBranchCrash.ll b/test/CodeGen/X86/2010-04-13-AnalyzeBranchCrash.ll new file mode 100644 index 0000000..fadbd21 --- /dev/null +++ b/test/CodeGen/X86/2010-04-13-AnalyzeBranchCrash.ll @@ -0,0 +1,42 @@ +; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=core2 +; rdar://7857830 + +%0 = type opaque +%1 = type opaque + +define void @t(%0* %self, i8* nocapture %_cmd, %1* %scroller, i32 %hitPart, float %multiplier) nounwind optsize ssp { +entry: + switch i32 %hitPart, label %if.else [ + i32 7, label %if.then + i32 8, label %if.then + ] + +if.then: ; preds = %entry, %entry + %tmp69 = load float* null, align 4 ; <float> [#uses=1] + %cmp19 = icmp eq %1* null, %scroller ; <i1> [#uses=2] + %cond = select i1 %cmp19, float %tmp69, float 0.000000e+00 ; <float> [#uses=1] + %call36 = call i64 bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i64 (i8*, i8*)*)(i8* undef, i8* undef) nounwind optsize ; <i64> [#uses=2] + br i1 %cmp19, label %cond.true32, label %cond.false39 + +cond.true32: ; preds = %if.then + %sroa.store.elt68 = lshr i64 %call36, 32 ; <i64> [#uses=1] + %0 = trunc i64 %sroa.store.elt68 to i32 ; <i32> [#uses=1] + br label %cond.end47 + +cond.false39: ; preds = %if.then + %1 = trunc i64 %call36 to i32 ; <i32> [#uses=1] + br label %cond.end47 + +cond.end47: ; preds = %cond.false39, %cond.true32 + %cond48.in = phi i32 [ %0, %cond.true32 ], [ %1, %cond.false39 ] ; <i32> [#uses=1] + %cond48 = bitcast i32 %cond48.in to float ; <float> [#uses=1] + %div = fdiv float %cond, undef ; <float> [#uses=1] + %div58 = fdiv float %div, %cond48 ; <float> [#uses=1] + call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*, float)*)(i8* undef, i8* undef, float %div58) nounwind optsize + ret void + +if.else: ; preds = %entry + ret void +} + +declare i8* @objc_msgSend(i8*, i8*, ...) diff --git a/test/CodeGen/X86/brcond.ll b/test/CodeGen/X86/brcond.ll index 130483a..14ee9e5 100644 --- a/test/CodeGen/X86/brcond.ll +++ b/test/CodeGen/X86/brcond.ll @@ -67,3 +67,42 @@ return: ; preds = %entry ; CHECK-NEXT: orl 8(%esp), %eax ; CHECK-NEXT: je LBB3_2 } + +; <rdar://problem/7598384>: +; +; jCC L1 +; jmp L2 +; L1: +; ... +; L2: +; ... +; +; to: +; +; jnCC L2 +; L1: +; ... +; L2: +; ... +define float @test4(float %x, float %y) nounwind readnone optsize ssp { +entry: + %0 = fpext float %x to double ; <double> [#uses=1] + %1 = fpext float %y to double ; <double> [#uses=1] + %2 = fmul double %0, %1 ; <double> [#uses=3] + %3 = fcmp oeq double %2, 0.000000e+00 ; <i1> [#uses=1] + br i1 %3, label %bb2, label %bb1 + +; CHECK: jne +; CHECK-NEXT: jnp +; CHECK-NOT: jmp +; CHECK: LBB + +bb1: ; preds = %entry + %4 = fadd double %2, -1.000000e+00 ; <double> [#uses=1] + br label %bb2 + +bb2: ; preds = %entry, %bb1 + %.0.in = phi double [ %4, %bb1 ], [ %2, %entry ] ; <double> [#uses=1] + %.0 = fptrunc double %.0.in to float ; <float> [#uses=1] + ret float %.0 +} |