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-rw-r--r--docs/NVPTXUsage.rst6
1 files changed, 3 insertions, 3 deletions
diff --git a/docs/NVPTXUsage.rst b/docs/NVPTXUsage.rst
index a9065ce..e1c401d 100644
--- a/docs/NVPTXUsage.rst
+++ b/docs/NVPTXUsage.rst
@@ -273,7 +273,7 @@ there is a separate version for each compute architecture.
For a list of all math functions implemented in libdevice, see
`libdevice Users Guide <http://docs.nvidia.com/cuda/libdevice-users-guide/index.html>`_.
-To accomodate various math-related compiler flags that can affect code
+To accommodate various math-related compiler flags that can affect code
generation of libdevice code, the library code depends on a special LLVM IR
pass (``NVVMReflect``) to handle conditional compilation within LLVM IR. This
pass looks for calls to the ``@__nvvm_reflect`` function and replaces them
@@ -839,7 +839,7 @@ Libdevice provides an ``__nv_powf`` function that we will use.
%valB = load float addrspace(1)* %ptrB, align 4
; Compute C = pow(A, B)
- %valC = call float @__nv_exp2f(float %valA, float %valB)
+ %valC = call float @__nv_powf(float %valA, float %valB)
; Store back to C
store float %valC, float addrspace(1)* %ptrC, align 4
@@ -850,7 +850,7 @@ Libdevice provides an ``__nv_powf`` function that we will use.
!nvvm.annotations = !{!0}
!0 = metadata !{void (float addrspace(1)*,
float addrspace(1)*,
- float addrspace(1)*)* @kernel, metadata !"kernel", i32 1}%
+ float addrspace(1)*)* @kernel, metadata !"kernel", i32 1}
To compile this kernel, we perform the following steps: