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-rw-r--r--include/llvm/CodeGen/MachineRegisterInfo.h6
-rw-r--r--include/llvm/CodeGen/ScheduleDAG.h13
-rw-r--r--include/llvm/CodeGen/SelectionDAGNodes.h11
3 files changed, 18 insertions, 12 deletions
diff --git a/include/llvm/CodeGen/MachineRegisterInfo.h b/include/llvm/CodeGen/MachineRegisterInfo.h
index 0d82f4e..18e6020 100644
--- a/include/llvm/CodeGen/MachineRegisterInfo.h
+++ b/include/llvm/CodeGen/MachineRegisterInfo.h
@@ -268,8 +268,10 @@ public:
}
friend class MachineRegisterInfo;
public:
- typedef std::iterator<std::forward_iterator_tag, MachineInstr, ptrdiff_t>::reference reference;
- typedef std::iterator<std::forward_iterator_tag, MachineInstr, ptrdiff_t>::pointer pointer;
+ typedef std::iterator<std::forward_iterator_tag,
+ MachineInstr, ptrdiff_t>::reference reference;
+ typedef std::iterator<std::forward_iterator_tag,
+ MachineInstr, ptrdiff_t>::pointer pointer;
defusechain_iterator(const defusechain_iterator &I) : Op(I.Op) {}
defusechain_iterator() : Op(0) {}
diff --git a/include/llvm/CodeGen/ScheduleDAG.h b/include/llvm/CodeGen/ScheduleDAG.h
index 797c9bc..af30948 100644
--- a/include/llvm/CodeGen/ScheduleDAG.h
+++ b/include/llvm/CodeGen/ScheduleDAG.h
@@ -434,8 +434,8 @@ namespace llvm {
class ScheduleDAG {
public:
- MachineBasicBlock *BB; // The block in which to insert instructions.
- MachineBasicBlock::iterator InsertPos;// The position to insert instructions.
+ MachineBasicBlock *BB; // The block in which to insert instructions
+ MachineBasicBlock::iterator InsertPos;// The position to insert instructions
const TargetMachine &TM; // Target processor
const TargetInstrInfo *TII; // Target instruction information
const TargetRegisterInfo *TRI; // Target processor register info
@@ -506,8 +506,8 @@ namespace llvm {
///
virtual void Schedule() = 0;
- /// ForceUnitLatencies - Return true if all scheduling edges should be given a
- /// latency value of one. The default is to return false; schedulers may
+ /// ForceUnitLatencies - Return true if all scheduling edges should be given
+ /// a latency value of one. The default is to return false; schedulers may
/// override this as needed.
virtual bool ForceUnitLatencies() const { return false; }
@@ -535,7 +535,8 @@ namespace llvm {
void EmitLiveInCopies(MachineBasicBlock *MBB);
};
- class SUnitIterator : public std::iterator<std::forward_iterator_tag, SUnit, ptrdiff_t> {
+ class SUnitIterator : public std::iterator<std::forward_iterator_tag,
+ SUnit, ptrdiff_t> {
SUnit *Node;
unsigned Operand;
@@ -547,7 +548,7 @@ namespace llvm {
bool operator!=(const SUnitIterator& x) const { return !operator==(x); }
const SUnitIterator &operator=(const SUnitIterator &I) {
- assert(I.Node == Node && "Cannot assign iterators to two different nodes!");
+ assert(I.Node==Node && "Cannot assign iterators to two different nodes!");
Operand = I.Operand;
return *this;
}
diff --git a/include/llvm/CodeGen/SelectionDAGNodes.h b/include/llvm/CodeGen/SelectionDAGNodes.h
index af8c833..161642f 100644
--- a/include/llvm/CodeGen/SelectionDAGNodes.h
+++ b/include/llvm/CodeGen/SelectionDAGNodes.h
@@ -291,7 +291,7 @@ namespace ISD {
EXTRACT_SUBVECTOR,
/// VECTOR_SHUFFLE(VEC1, VEC2) - Returns a vector, of the same type as
- /// VEC1/VEC2. A VECTOR_SHUFFLE node also contains an array of constant int
+ /// VEC1/VEC2. A VECTOR_SHUFFLE node also contains an array of constant int
/// values that indicate which value (or undef) each result element will
/// get. These constant ints are accessible through the
/// ShuffleVectorSDNode class. This is quite similar to the Altivec
@@ -1134,8 +1134,10 @@ public:
}
friend class SDNode;
public:
- typedef std::iterator<std::forward_iterator_tag, SDUse, ptrdiff_t>::reference reference;
- typedef std::iterator<std::forward_iterator_tag, SDUse, ptrdiff_t>::pointer pointer;
+ typedef std::iterator<std::forward_iterator_tag,
+ SDUse, ptrdiff_t>::reference reference;
+ typedef std::iterator<std::forward_iterator_tag,
+ SDUse, ptrdiff_t>::pointer pointer;
use_iterator(const use_iterator &I) : Op(I.Op) {}
use_iterator() : Op(0) {}
@@ -2353,7 +2355,8 @@ public:
};
-class SDNodeIterator : public std::iterator<std::forward_iterator_tag, SDNode, ptrdiff_t> {
+class SDNodeIterator : public std::iterator<std::forward_iterator_tag,
+ SDNode, ptrdiff_t> {
SDNode *Node;
unsigned Operand;