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-rw-r--r--include/llvm/Target/Target.td8
1 files changed, 8 insertions, 0 deletions
diff --git a/include/llvm/Target/Target.td b/include/llvm/Target/Target.td
index 607dac7..94430bc 100644
--- a/include/llvm/Target/Target.td
+++ b/include/llvm/Target/Target.td
@@ -21,6 +21,14 @@ include "llvm/Intrinsics.td"
class RegisterClass; // Forward def
+class SubRegIndex {
+ string Namespace = "";
+
+ // This explicit numbering is going away after RegisterClass::SubRegClassList
+ // is replaced.
+ int NumberHack;
+}
+
// Register - You should define one instance of this class for each register
// in the target machine. String n will become the "name" of the register.
class Register<string n> {