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-rw-r--r--include/llvm/Target/TargetLowering.h6
-rw-r--r--include/llvm/Target/TargetSelectionDAG.td13
2 files changed, 4 insertions, 15 deletions
diff --git a/include/llvm/Target/TargetLowering.h b/include/llvm/Target/TargetLowering.h
index 477505e..a5f064d 100644
--- a/include/llvm/Target/TargetLowering.h
+++ b/include/llvm/Target/TargetLowering.h
@@ -328,7 +328,7 @@ public:
/// support *some* VECTOR_SHUFFLE operations, those with specific masks.
/// By default, if a target supports the VECTOR_SHUFFLE node, all mask values
/// are assumed to be legal.
- virtual bool isShuffleMaskLegal(SDValue Mask, MVT VT) const {
+ virtual bool isShuffleMaskLegal(const int *Mask, MVT VT) const {
return true;
}
@@ -336,9 +336,7 @@ public:
/// used by Targets can use this to indicate if there is a suitable
/// VECTOR_SHUFFLE that can be used to replace a VAND with a constant
/// pool entry.
- virtual bool isVectorClearMaskLegal(const std::vector<SDValue> &BVOps,
- MVT EVT,
- SelectionDAG &DAG) const {
+ virtual bool isVectorClearMaskLegal(const int *Mask, MVT VT) const {
return false;
}
diff --git a/include/llvm/Target/TargetSelectionDAG.td b/include/llvm/Target/TargetSelectionDAG.td
index 7f39bb2..2cd2967 100644
--- a/include/llvm/Target/TargetSelectionDAG.td
+++ b/include/llvm/Target/TargetSelectionDAG.td
@@ -51,15 +51,6 @@ class SDTCisOpSmallerThanOp<int SmallOp, int BigOp> : SDTypeConstraint<SmallOp>{
int BigOperandNum = BigOp;
}
-/// SDTCisIntVectorOfSameSize - This indicates that ThisOp and OtherOp are
-/// vector types, and that ThisOp is the result of
-/// MVT::getIntVectorWithNumElements with the number of elements
-/// that ThisOp has.
-class SDTCisIntVectorOfSameSize<int ThisOp, int OtherOp>
- : SDTypeConstraint<ThisOp> {
- int OtherOpNum = OtherOp;
-}
-
/// SDTCisEltOfVec - This indicates that ThisOp is a scalar type of the same
/// type as the element type of OtherOp, which is a vector type.
class SDTCisEltOfVec<int ThisOp, int OtherOp>
@@ -175,8 +166,8 @@ def SDTIStore : SDTypeProfile<1, 3, [ // indexed store
SDTCisSameAs<0, 2>, SDTCisPtrTy<0>, SDTCisPtrTy<3>
]>;
-def SDTVecShuffle : SDTypeProfile<1, 3, [
- SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>, SDTCisIntVectorOfSameSize<3, 0>
+def SDTVecShuffle : SDTypeProfile<1, 2, [
+ SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>
]>;
def SDTVecExtract : SDTypeProfile<1, 2, [ // vector extract
SDTCisEltOfVec<0, 1>, SDTCisPtrTy<2>