diff options
Diffstat (limited to 'include/llvm/Target')
| -rw-r--r-- | include/llvm/Target/Target.td | 4 | ||||
| -rw-r--r-- | include/llvm/Target/TargetAsmInfo.h | 68 | ||||
| -rw-r--r-- | include/llvm/Target/TargetData.h | 31 | ||||
| -rw-r--r-- | include/llvm/Target/TargetFrameLowering.h | 5 | ||||
| -rw-r--r-- | include/llvm/Target/TargetIntrinsicInfo.h | 4 | ||||
| -rw-r--r-- | include/llvm/Target/TargetLowering.h | 23 | ||||
| -rw-r--r-- | include/llvm/Target/TargetLoweringObjectFile.h | 119 | ||||
| -rw-r--r-- | include/llvm/Target/TargetMachine.h | 24 | ||||
| -rw-r--r-- | include/llvm/Target/TargetRegisterInfo.h | 20 | ||||
| -rw-r--r-- | include/llvm/Target/TargetRegistry.h | 95 | ||||
| -rw-r--r-- | include/llvm/Target/TargetSelect.h | 30 |
11 files changed, 156 insertions, 267 deletions
diff --git a/include/llvm/Target/Target.td b/include/llvm/Target/Target.td index 018ccbd..06c2299 100644 --- a/include/llvm/Target/Target.td +++ b/include/llvm/Target/Target.td @@ -297,6 +297,10 @@ class Instruction { // from the opcode. int Size = 0; + // DecoderNamespace - The "namespace" in which this instruction exists, on + // targets like ARM which multiple ISA namespaces exist. + string DecoderNamespace = ""; + // Code size, for instruction selection. // FIXME: What does this actually mean? int CodeSize = 0; diff --git a/include/llvm/Target/TargetAsmInfo.h b/include/llvm/Target/TargetAsmInfo.h index 5a526dc..38bbab4 100644 --- a/include/llvm/Target/TargetAsmInfo.h +++ b/include/llvm/Target/TargetAsmInfo.h @@ -14,89 +14,21 @@ #ifndef LLVM_TARGET_TARGETASMINFO_H #define LLVM_TARGET_TARGETASMINFO_H -#include "llvm/CodeGen/MachineLocation.h" #include "llvm/Target/TargetLoweringObjectFile.h" -#include "llvm/Target/TargetFrameLowering.h" -#include "llvm/Target/TargetRegisterInfo.h" namespace llvm { - template <typename T> class ArrayRef; - class MCSection; - class MCContext; - class MachineFunction; class TargetMachine; class TargetLoweringObjectFile; class TargetAsmInfo { - std::vector<MachineMove> InitialFrameState; - const TargetRegisterInfo *TRI; - const TargetFrameLowering *TFI; const TargetLoweringObjectFile *TLOF; public: explicit TargetAsmInfo(const TargetMachine &TM); - const MCSection *getDwarfLineSection() const { - return TLOF->getDwarfLineSection(); - } - - const MCSection *getEHFrameSection() const { - return TLOF->getEHFrameSection(); - } - - const MCSection *getCompactUnwindSection() const { - return TLOF->getCompactUnwindSection(); - } - - const MCSection *getDwarfFrameSection() const { - return TLOF->getDwarfFrameSection(); - } - - const MCSection *getWin64EHFuncTableSection(StringRef Suffix) const { - return TLOF->getWin64EHFuncTableSection(Suffix); - } - - const MCSection *getWin64EHTableSection(StringRef Suffix) const { - return TLOF->getWin64EHTableSection(Suffix); - } - unsigned getFDEEncoding(bool CFI) const { return TLOF->getFDEEncoding(CFI); } - - bool isFunctionEHFrameSymbolPrivate() const { - return TLOF->isFunctionEHFrameSymbolPrivate(); - } - - int getCompactUnwindEncoding(ArrayRef<MCCFIInstruction> Instrs, - int DataAlignmentFactor, - bool IsEH) const { - return TFI->getCompactUnwindEncoding(Instrs, DataAlignmentFactor, IsEH); - } - - const unsigned *getCalleeSavedRegs(MachineFunction *MF = 0) const { - return TRI->getCalleeSavedRegs(MF); - } - - unsigned getDwarfRARegNum(bool isEH) const { - return TRI->getDwarfRegNum(TRI->getRARegister(), isEH); - } - - const std::vector<MachineMove> &getInitialFrameState() const { - return InitialFrameState; - } - - int getDwarfRegNum(unsigned RegNum, bool isEH) const { - return TRI->getDwarfRegNum(RegNum, isEH); - } - - int getLLVMRegNum(unsigned DwarfRegNum, bool isEH) const { - return TRI->getLLVMRegNum(DwarfRegNum, isEH); - } - - int getSEHRegNum(unsigned RegNum) const { - return TRI->getSEHRegNum(RegNum); - } }; } diff --git a/include/llvm/Target/TargetData.h b/include/llvm/Target/TargetData.h index c280810..315bee9 100644 --- a/include/llvm/Target/TargetData.h +++ b/include/llvm/Target/TargetData.h @@ -33,6 +33,8 @@ class StructType; class StructLayout; class GlobalVariable; class LLVMContext; +template<typename T> +class ArrayRef; /// Enum used to categorize the alignment types stored by TargetAlignElem enum AlignTypeEnum { @@ -90,9 +92,9 @@ private: void setAlignment(AlignTypeEnum align_type, unsigned abi_align, unsigned pref_align, uint32_t bit_width); unsigned getAlignmentInfo(AlignTypeEnum align_type, uint32_t bit_width, - bool ABIAlign, const Type *Ty) const; + bool ABIAlign, Type *Ty) const; //! Internal helper method that returns requested alignment for type. - unsigned getAlignment(const Type *Ty, bool abi_or_pref) const; + unsigned getAlignment(Type *Ty, bool abi_or_pref) const; /// Valid alignment predicate. /// @@ -200,19 +202,19 @@ public: /// getTypeSizeInBits - Return the number of bits necessary to hold the /// specified type. For example, returns 36 for i36 and 80 for x86_fp80. - uint64_t getTypeSizeInBits(const Type* Ty) const; + uint64_t getTypeSizeInBits(Type* Ty) const; /// getTypeStoreSize - Return the maximum number of bytes that may be /// overwritten by storing the specified type. For example, returns 5 /// for i36 and 10 for x86_fp80. - uint64_t getTypeStoreSize(const Type *Ty) const { + uint64_t getTypeStoreSize(Type *Ty) const { return (getTypeSizeInBits(Ty)+7)/8; } /// getTypeStoreSizeInBits - Return the maximum number of bits that may be /// overwritten by storing the specified type; always a multiple of 8. For /// example, returns 40 for i36 and 80 for x86_fp80. - uint64_t getTypeStoreSizeInBits(const Type *Ty) const { + uint64_t getTypeStoreSizeInBits(Type *Ty) const { return 8*getTypeStoreSize(Ty); } @@ -220,7 +222,7 @@ public: /// of the specified type, including alignment padding. This is the amount /// that alloca reserves for this type. For example, returns 12 or 16 for /// x86_fp80, depending on alignment. - uint64_t getTypeAllocSize(const Type* Ty) const { + uint64_t getTypeAllocSize(Type* Ty) const { // Round up to the next alignment boundary. return RoundUpAlignment(getTypeStoreSize(Ty), getABITypeAlignment(Ty)); } @@ -229,13 +231,13 @@ public: /// objects of the specified type, including alignment padding; always a /// multiple of 8. This is the amount that alloca reserves for this type. /// For example, returns 96 or 128 for x86_fp80, depending on alignment. - uint64_t getTypeAllocSizeInBits(const Type* Ty) const { + uint64_t getTypeAllocSizeInBits(Type* Ty) const { return 8*getTypeAllocSize(Ty); } /// getABITypeAlignment - Return the minimum ABI-required alignment for the /// specified type. - unsigned getABITypeAlignment(const Type *Ty) const; + unsigned getABITypeAlignment(Type *Ty) const; /// getABIIntegerTypeAlignment - Return the minimum ABI-required alignment for /// an integer type of the specified bitwidth. @@ -244,17 +246,17 @@ public: /// getCallFrameTypeAlignment - Return the minimum ABI-required alignment /// for the specified type when it is part of a call frame. - unsigned getCallFrameTypeAlignment(const Type *Ty) const; + unsigned getCallFrameTypeAlignment(Type *Ty) const; /// getPrefTypeAlignment - Return the preferred stack/global alignment for /// the specified type. This is always at least as good as the ABI alignment. - unsigned getPrefTypeAlignment(const Type *Ty) const; + unsigned getPrefTypeAlignment(Type *Ty) const; /// getPreferredTypeAlignmentShift - Return the preferred alignment for the /// specified type, returned as log2 of the value (a shift amount). /// - unsigned getPreferredTypeAlignmentShift(const Type *Ty) const; + unsigned getPreferredTypeAlignmentShift(Type *Ty) const; /// getIntPtrType - Return an unsigned integer type that is the same size or /// greater to the host pointer size. @@ -264,13 +266,12 @@ public: /// getIndexedOffset - return the offset from the beginning of the type for /// the specified indices. This is used to implement getelementptr. /// - uint64_t getIndexedOffset(const Type *Ty, - Value* const* Indices, unsigned NumIndices) const; + uint64_t getIndexedOffset(Type *Ty, ArrayRef<Value *> Indices) const; /// getStructLayout - Return a StructLayout object, indicating the alignment /// of the struct, its size, and the offsets of its fields. Note that this /// information is lazily cached. - const StructLayout *getStructLayout(const StructType *Ty) const; + const StructLayout *getStructLayout(StructType *Ty) const; /// getPreferredAlignment - Return the preferred alignment of the specified /// global. This includes an explicitly requested alignment (if the global @@ -333,7 +334,7 @@ public: private: friend class TargetData; // Only TargetData can create this class - StructLayout(const StructType *ST, const TargetData &TD); + StructLayout(StructType *ST, const TargetData &TD); }; } // End llvm namespace diff --git a/include/llvm/Target/TargetFrameLowering.h b/include/llvm/Target/TargetFrameLowering.h index e3d77cf..352b7ae 100644 --- a/include/llvm/Target/TargetFrameLowering.h +++ b/include/llvm/Target/TargetFrameLowering.h @@ -161,11 +161,6 @@ public: return hasReservedCallFrame(MF) || hasFP(MF); } - /// getInitialFrameState - Returns a list of machine moves that are assumed - /// on entry to all functions. Note that LabelID is ignored (assumed to be - /// the beginning of the function.) - virtual void getInitialFrameState(std::vector<MachineMove> &Moves) const; - /// getFrameIndexOffset - Returns the displacement from the frame register to /// the stack frame of the specified index. virtual int getFrameIndexOffset(const MachineFunction &MF, int FI) const; diff --git a/include/llvm/Target/TargetIntrinsicInfo.h b/include/llvm/Target/TargetIntrinsicInfo.h index ad8ac92..c44b923 100644 --- a/include/llvm/Target/TargetIntrinsicInfo.h +++ b/include/llvm/Target/TargetIntrinsicInfo.h @@ -39,7 +39,7 @@ public: /// intrinsic, Tys should point to an array of numTys pointers to Type, /// and must provide exactly one type for each overloaded type in the /// intrinsic. - virtual std::string getName(unsigned IID, const Type **Tys = 0, + virtual std::string getName(unsigned IID, Type **Tys = 0, unsigned numTys = 0) const = 0; /// Look up target intrinsic by name. Return intrinsic ID or 0 for unknown @@ -55,7 +55,7 @@ public: /// Create or insert an LLVM Function declaration for an intrinsic, /// and return it. The Tys and numTys are for intrinsics with overloaded /// types. See above for more information. - virtual Function *getDeclaration(Module *M, unsigned ID, const Type **Tys = 0, + virtual Function *getDeclaration(Module *M, unsigned ID, Type **Tys = 0, unsigned numTys = 0) const = 0; }; diff --git a/include/llvm/Target/TargetLowering.h b/include/llvm/Target/TargetLowering.h index 533c3ac..3484a79 100644 --- a/include/llvm/Target/TargetLowering.h +++ b/include/llvm/Target/TargetLowering.h @@ -383,9 +383,7 @@ public: /// isLoadExtLegal - Return true if the specified load with extension is legal /// on this target. bool isLoadExtLegal(unsigned ExtType, EVT VT) const { - return VT.isSimple() && - (getLoadExtAction(ExtType, VT) == Legal || - getLoadExtAction(ExtType, VT) == Custom); + return VT.isSimple() && getLoadExtAction(ExtType, VT) == Legal; } /// getTruncStoreAction - Return how this store with truncation should be @@ -404,8 +402,7 @@ public: /// legal on this target. bool isTruncStoreLegal(EVT ValVT, EVT MemVT) const { return isTypeLegal(ValVT) && MemVT.isSimple() && - (getTruncStoreAction(ValVT, MemVT) == Legal || - getTruncStoreAction(ValVT, MemVT) == Custom); + getTruncStoreAction(ValVT, MemVT) == Legal; } /// getIndexedLoadAction - Return how the indexed load should be treated: @@ -501,7 +498,7 @@ public: /// This is fixed by the LLVM operations except for the pointer size. If /// AllowUnknown is true, this will return MVT::Other for types with no EVT /// counterpart (e.g. structs), otherwise it will assert. - EVT getValueType(const Type *Ty, bool AllowUnknown = false) const { + EVT getValueType(Type *Ty, bool AllowUnknown = false) const { EVT VT = EVT::getEVT(Ty, AllowUnknown); return VT == MVT::iPTR ? PointerTy : VT; } @@ -509,7 +506,7 @@ public: /// getByValTypeAlignment - Return the desired alignment for ByVal aggregate /// function arguments in the caller parameter area. This is the actual /// alignment, not its logarithm. - virtual unsigned getByValTypeAlignment(const Type *Ty) const; + virtual unsigned getByValTypeAlignment(Type *Ty) const; /// getRegisterType - Return the type of registers that this ValueType will /// eventually require. @@ -1166,7 +1163,7 @@ public: /// lowering. struct ArgListEntry { SDValue Node; - const Type* Ty; + Type* Ty; bool isSExt : 1; bool isZExt : 1; bool isInReg : 1; @@ -1180,7 +1177,7 @@ public: }; typedef std::vector<ArgListEntry> ArgListTy; std::pair<SDValue, SDValue> - LowerCallTo(SDValue Chain, const Type *RetTy, bool RetSExt, bool RetZExt, + LowerCallTo(SDValue Chain, Type *RetTy, bool RetSExt, bool RetZExt, bool isVarArg, bool isInreg, unsigned NumFixedArgs, CallingConv::ID CallConv, bool isTailCall, bool isReturnValueUsed, SDValue Callee, ArgListTy &Args, @@ -1485,12 +1482,12 @@ public: /// The type may be VoidTy, in which case only return true if the addressing /// mode is legal for a load/store of any legal type. /// TODO: Handle pre/postinc as well. - virtual bool isLegalAddressingMode(const AddrMode &AM, const Type *Ty) const; + virtual bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const; /// isTruncateFree - Return true if it's free to truncate a value of /// type Ty1 to type Ty2. e.g. On x86 it's free to truncate a i32 value in /// register EAX to i16 by referencing its sub-register AX. - virtual bool isTruncateFree(const Type *Ty1, const Type *Ty2) const { + virtual bool isTruncateFree(Type *Ty1, Type *Ty2) const { return false; } @@ -1506,7 +1503,7 @@ public: /// does not necessarily apply to truncate instructions. e.g. on x86-64, /// all instructions that define 32-bit values implicit zero-extend the /// result out to 64 bits. - virtual bool isZExtFree(const Type *Ty1, const Type *Ty2) const { + virtual bool isZExtFree(Type *Ty1, Type *Ty2) const { return false; } @@ -1963,7 +1960,7 @@ private: /// GetReturnInfo - Given an LLVM IR type and return type attributes, /// compute the return value EVTs and flags, and optionally also /// the offsets, if the return value is being lowered to memory. -void GetReturnInfo(const Type* ReturnType, Attributes attr, +void GetReturnInfo(Type* ReturnType, Attributes attr, SmallVectorImpl<ISD::OutputArg> &Outs, const TargetLowering &TLI, SmallVectorImpl<uint64_t> *Offsets = 0); diff --git a/include/llvm/Target/TargetLoweringObjectFile.h b/include/llvm/Target/TargetLoweringObjectFile.h index 2e1d6b9..d6428ff 100644 --- a/include/llvm/Target/TargetLoweringObjectFile.h +++ b/include/llvm/Target/TargetLoweringObjectFile.h @@ -16,6 +16,7 @@ #define LLVM_TARGET_TARGETLOWERINGOBJECTFILE_H #include "llvm/ADT/StringRef.h" +#include "llvm/MC/MCObjectFileInfo.h" #include "llvm/MC/SectionKind.h" namespace llvm { @@ -31,137 +32,27 @@ namespace llvm { class GlobalValue; class TargetMachine; -class TargetLoweringObjectFile { +class TargetLoweringObjectFile : public MCObjectFileInfo { MCContext *Ctx; TargetLoweringObjectFile(const TargetLoweringObjectFile&); // DO NOT IMPLEMENT void operator=(const TargetLoweringObjectFile&); // DO NOT IMPLEMENT -protected: - - TargetLoweringObjectFile(); - - /// TextSection - Section directive for standard text. - /// - const MCSection *TextSection; - - /// DataSection - Section directive for standard data. - /// - const MCSection *DataSection; - /// BSSSection - Section that is default initialized to zero. - const MCSection *BSSSection; - - /// ReadOnlySection - Section that is readonly and can contain arbitrary - /// initialized data. Targets are not required to have a readonly section. - /// If they don't, various bits of code will fall back to using the data - /// section for constants. - const MCSection *ReadOnlySection; - - /// StaticCtorSection - This section contains the static constructor pointer - /// list. - const MCSection *StaticCtorSection; - - /// StaticDtorSection - This section contains the static destructor pointer - /// list. - const MCSection *StaticDtorSection; - - /// LSDASection - If exception handling is supported by the target, this is - /// the section the Language Specific Data Area information is emitted to. - const MCSection *LSDASection; - - /// CompactUnwindSection - If exception handling is supported by the target - /// and the target can support a compact representation of the CIE and FDE, - /// this is the section to emit them into. - const MCSection *CompactUnwindSection; - - // Dwarf sections for debug info. If a target supports debug info, these must - // be set. - const MCSection *DwarfAbbrevSection; - const MCSection *DwarfInfoSection; - const MCSection *DwarfLineSection; - const MCSection *DwarfFrameSection; - const MCSection *DwarfPubNamesSection; - const MCSection *DwarfPubTypesSection; - const MCSection *DwarfDebugInlineSection; - const MCSection *DwarfStrSection; - const MCSection *DwarfLocSection; - const MCSection *DwarfARangesSection; - const MCSection *DwarfRangesSection; - const MCSection *DwarfMacroInfoSection; - - // Extra TLS Variable Data section. If the target needs to put additional - // information for a TLS variable, it'll go here. - const MCSection *TLSExtraDataSection; - - /// CommDirectiveSupportsAlignment - True if .comm supports alignment. This - /// is a hack for as long as we support 10.4 Tiger, whose assembler doesn't - /// support alignment on comm. - bool CommDirectiveSupportsAlignment; - - /// SupportsWeakEmptyEHFrame - True if target object file supports a - /// weak_definition of constant 0 for an omitted EH frame. - bool SupportsWeakOmittedEHFrame; - - /// IsFunctionEHFrameSymbolPrivate - This flag is set to true if the - /// "EH_frame" symbol for EH information should be an assembler temporary (aka - /// private linkage, aka an L or .L label) or false if it should be a normal - /// non-.globl label. This defaults to true. - bool IsFunctionEHFrameSymbolPrivate; - public: MCContext &getContext() const { return *Ctx; } + + TargetLoweringObjectFile() : MCObjectFileInfo(), Ctx(0) {} virtual ~TargetLoweringObjectFile(); /// Initialize - this method must be called before any actual lowering is /// done. This specifies the current context for codegen, and gives the /// lowering implementations a chance to set up their default sections. - virtual void Initialize(MCContext &ctx, const TargetMachine &TM) { - Ctx = &ctx; - } + virtual void Initialize(MCContext &ctx, const TargetMachine &TM); - bool isFunctionEHFrameSymbolPrivate() const { - return IsFunctionEHFrameSymbolPrivate; - } - bool getSupportsWeakOmittedEHFrame() const { - return SupportsWeakOmittedEHFrame; - } - bool getCommDirectiveSupportsAlignment() const { - return CommDirectiveSupportsAlignment; - } - - const MCSection *getTextSection() const { return TextSection; } - const MCSection *getDataSection() const { return DataSection; } - const MCSection *getBSSSection() const { return BSSSection; } - const MCSection *getStaticCtorSection() const { return StaticCtorSection; } - const MCSection *getStaticDtorSection() const { return StaticDtorSection; } - const MCSection *getLSDASection() const { return LSDASection; } - const MCSection *getCompactUnwindSection() const{return CompactUnwindSection;} - virtual const MCSection *getEHFrameSection() const = 0; virtual void emitPersonalityValue(MCStreamer &Streamer, const TargetMachine &TM, const MCSymbol *Sym) const; - const MCSection *getDwarfAbbrevSection() const { return DwarfAbbrevSection; } - const MCSection *getDwarfInfoSection() const { return DwarfInfoSection; } - const MCSection *getDwarfLineSection() const { return DwarfLineSection; } - const MCSection *getDwarfFrameSection() const { return DwarfFrameSection; } - const MCSection *getDwarfPubNamesSection() const{return DwarfPubNamesSection;} - const MCSection *getDwarfPubTypesSection() const{return DwarfPubTypesSection;} - const MCSection *getDwarfDebugInlineSection() const { - return DwarfDebugInlineSection; - } - const MCSection *getDwarfStrSection() const { return DwarfStrSection; } - const MCSection *getDwarfLocSection() const { return DwarfLocSection; } - const MCSection *getDwarfARangesSection() const { return DwarfARangesSection;} - const MCSection *getDwarfRangesSection() const { return DwarfRangesSection; } - const MCSection *getDwarfMacroInfoSection() const { - return DwarfMacroInfoSection; - } - const MCSection *getTLSExtraDataSection() const { - return TLSExtraDataSection; - } - virtual const MCSection *getWin64EHFuncTableSection(StringRef suffix)const=0; - virtual const MCSection *getWin64EHTableSection(StringRef suffix) const = 0; /// shouldEmitUsedDirectiveFor - This hook allows targets to selectively /// decide not to emit the UsedDirective for some symbols in llvm.used. diff --git a/include/llvm/Target/TargetMachine.h b/include/llvm/Target/TargetMachine.h index ac41a58..f4c845a 100644 --- a/include/llvm/Target/TargetMachine.h +++ b/include/llvm/Target/TargetMachine.h @@ -14,6 +14,7 @@ #ifndef LLVM_TARGET_TARGETMACHINE_H #define LLVM_TARGET_TARGETMACHINE_H +#include "llvm/MC/MCCodeGenInfo.h" #include "llvm/ADT/StringRef.h" #include <cassert> #include <string> @@ -23,6 +24,7 @@ namespace llvm { class InstrItineraryData; class JITCodeEmitter; class MCAsmInfo; +class MCCodeGenInfo; class MCContext; class Pass; class PassManager; @@ -41,16 +43,6 @@ class TargetSubtargetInfo; class formatted_raw_ostream; class raw_ostream; -// Relocation model types. -namespace Reloc { - enum Model { - Default, - Static, - PIC_, // Cannot be named PIC due to collision with -DPIC - DynamicNoPIC - }; -} - // Code model types. namespace CodeModel { enum Model { @@ -108,6 +100,10 @@ protected: // Can only create subclasses. std::string TargetCPU; std::string TargetFS; + /// CodeGenInfo - Low level target information such as relocation model. + /// + const MCCodeGenInfo *CodeGenInfo; + /// AsmInfo - Contains target specific asm information. /// const MCAsmInfo *AsmInfo; @@ -214,11 +210,7 @@ public: /// getRelocationModel - Returns the code generation relocation model. The /// choices are static, PIC, and dynamic-no-pic, and target default. - static Reloc::Model getRelocationModel(); - - /// setRelocationModel - Sets the code generation relocation model. - /// - static void setRelocationModel(Reloc::Model Model); + Reloc::Model getRelocationModel() const; /// getCodeModel - Returns the code model. The choices are small, kernel, /// medium, large, and target default. @@ -309,7 +301,7 @@ public: class LLVMTargetMachine : public TargetMachine { protected: // Can only create subclasses. LLVMTargetMachine(const Target &T, StringRef TargetTriple, - StringRef CPU, StringRef FS); + StringRef CPU, StringRef FS, Reloc::Model RM); private: /// addCommonCodeGenPasses - Add standard LLVM codegen passes used for diff --git a/include/llvm/Target/TargetRegisterInfo.h b/include/llvm/Target/TargetRegisterInfo.h index 8d827f1..3113cd4 100644 --- a/include/llvm/Target/TargetRegisterInfo.h +++ b/include/llvm/Target/TargetRegisterInfo.h @@ -234,7 +234,7 @@ public: /// virtual ArrayRef<unsigned> getRawAllocationOrder(const MachineFunction &MF) const { - return ArrayRef<unsigned>(begin(), getNumRegs()); + return makeArrayRef(begin(), getNumRegs()); } /// getSize - Return the size of the register in bytes, which is also the size @@ -699,28 +699,10 @@ public: //===--------------------------------------------------------------------===// /// Debug information queries. - /// getDwarfRegNum - Map a target register to an equivalent dwarf register - /// number. Returns -1 if there is no equivalent value. The second - /// parameter allows targets to use different numberings for EH info and - /// debugging info. - virtual int getDwarfRegNum(unsigned RegNum, bool isEH) const = 0; - - virtual int getLLVMRegNum(unsigned RegNum, bool isEH) const = 0; - /// getFrameRegister - This method should return the register used as a base /// for values allocated in the current stack frame. virtual unsigned getFrameRegister(const MachineFunction &MF) const = 0; - /// getRARegister - This method should return the register where the return - /// address can be found. - virtual unsigned getRARegister() const = 0; - - /// getSEHRegNum - Map a target register to an equivalent SEH register - /// number. Returns -1 if there is no equivalent value. - virtual int getSEHRegNum(unsigned i) const { - return i; - } - /// getCompactUnwindRegNum - This function maps the register to the number for /// compact unwind encoding. Return -1 if the register isn't valid. virtual int getCompactUnwindRegNum(unsigned, bool) const { diff --git a/include/llvm/Target/TargetRegistry.h b/include/llvm/Target/TargetRegistry.h index 7e0ce19..7d63d56 100644 --- a/include/llvm/Target/TargetRegistry.h +++ b/include/llvm/Target/TargetRegistry.h @@ -19,6 +19,7 @@ #ifndef LLVM_TARGET_TARGETREGISTRY_H #define LLVM_TARGET_TARGETREGISTRY_H +#include "llvm/MC/MCCodeGenInfo.h" #include "llvm/ADT/Triple.h" #include <string> #include <cassert> @@ -37,6 +38,7 @@ namespace llvm { class MCRegisterInfo; class MCStreamer; class MCSubtargetInfo; + class MCCodeGenInfo; class TargetAsmBackend; class TargetAsmLexer; class TargetAsmParser; @@ -68,15 +70,17 @@ namespace llvm { typedef MCAsmInfo *(*MCAsmInfoCtorFnTy)(const Target &T, StringRef TT); + typedef MCCodeGenInfo *(*MCCodeGenInfoCtorFnTy)(StringRef TT, Reloc::Model M); typedef MCInstrInfo *(*MCInstrInfoCtorFnTy)(void); - typedef MCRegisterInfo *(*MCRegInfoCtorFnTy)(void); + typedef MCRegisterInfo *(*MCRegInfoCtorFnTy)(StringRef TT); typedef MCSubtargetInfo *(*MCSubtargetInfoCtorFnTy)(StringRef TT, StringRef CPU, StringRef Features); typedef TargetMachine *(*TargetMachineCtorTy)(const Target &T, - const std::string &TT, - const std::string &CPU, - const std::string &Features); + StringRef TT, + StringRef CPU, + StringRef Features, + Reloc::Model RM); typedef AsmPrinter *(*AsmPrinterCtorTy)(TargetMachine &TM, MCStreamer &Streamer); typedef TargetAsmBackend *(*AsmBackendCtorTy)(const Target &T, @@ -132,6 +136,10 @@ namespace llvm { /// registered. MCAsmInfoCtorFnTy MCAsmInfoCtorFn; + /// MCCodeGenInfoCtorFn - Constructor function for this target's MCCodeGenInfo, + /// if registered. + MCCodeGenInfoCtorFnTy MCCodeGenInfoCtorFn; + /// MCInstrInfoCtorFn - Constructor function for this target's MCInstrInfo, /// if registered. MCInstrInfoCtorFnTy MCInstrInfoCtorFn; @@ -253,6 +261,14 @@ namespace llvm { return MCAsmInfoCtorFn(*this, Triple); } + /// createMCCodeGenInfo - Create a MCCodeGenInfo implementation. + /// + MCCodeGenInfo *createMCCodeGenInfo(StringRef Triple, Reloc::Model M) const { + if (!MCCodeGenInfoCtorFn) + return 0; + return MCCodeGenInfoCtorFn(Triple, M); + } + /// createMCInstrInfo - Create a MCInstrInfo implementation. /// MCInstrInfo *createMCInstrInfo() const { @@ -263,10 +279,10 @@ namespace llvm { /// createMCRegInfo - Create a MCRegisterInfo implementation. /// - MCRegisterInfo *createMCRegInfo() const { + MCRegisterInfo *createMCRegInfo(StringRef Triple) const { if (!MCRegInfoCtorFn) return 0; - return MCRegInfoCtorFn(); + return MCRegInfoCtorFn(Triple); } /// createMCSubtargetInfo - Create a MCSubtargetInfo implementation. @@ -292,12 +308,12 @@ namespace llvm { /// feature set; it should always be provided. Generally this should be /// either the target triple from the module, or the target triple of the /// host if that does not exist. - TargetMachine *createTargetMachine(const std::string &Triple, - const std::string &CPU, - const std::string &Features) const { + TargetMachine *createTargetMachine(StringRef Triple, StringRef CPU, + StringRef Features, + Reloc::Model RM = Reloc::Default) const { if (!TargetMachineCtorFn) return 0; - return TargetMachineCtorFn(*this, Triple, CPU, Features); + return TargetMachineCtorFn(*this, Triple, CPU, Features, RM); } /// createAsmBackend - Create a target specific assembly parser. @@ -500,6 +516,22 @@ namespace llvm { T.MCAsmInfoCtorFn = Fn; } + /// RegisterMCCodeGenInfo - Register a MCCodeGenInfo implementation for the + /// given target. + /// + /// Clients are responsible for ensuring that registration doesn't occur + /// while another thread is attempting to access the registry. Typically + /// this is done by initializing all targets at program startup. + /// + /// @param T - The target being registered. + /// @param Fn - A function to construct a MCCodeGenInfo for the target. + static void RegisterMCCodeGenInfo(Target &T, + Target::MCCodeGenInfoCtorFnTy Fn) { + // Ignore duplicate registration. + if (!T.MCCodeGenInfoCtorFn) + T.MCCodeGenInfoCtorFn = Fn; + } + /// RegisterMCInstrInfo - Register a MCInstrInfo implementation for the /// given target. /// @@ -756,6 +788,39 @@ namespace llvm { } }; + /// RegisterMCCodeGenInfo - Helper template for registering a target codegen info + /// implementation. This invokes the static "Create" method on the class + /// to actually do the construction. Usage: + /// + /// extern "C" void LLVMInitializeFooTarget() { + /// extern Target TheFooTarget; + /// RegisterMCCodeGenInfo<FooMCCodeGenInfo> X(TheFooTarget); + /// } + template<class MCCodeGenInfoImpl> + struct RegisterMCCodeGenInfo { + RegisterMCCodeGenInfo(Target &T) { + TargetRegistry::RegisterMCCodeGenInfo(T, &Allocator); + } + private: + static MCCodeGenInfo *Allocator(StringRef TT, Reloc::Model M) { + return new MCCodeGenInfoImpl(); + } + }; + + /// RegisterMCCodeGenInfoFn - Helper template for registering a target codegen + /// info implementation. This invokes the specified function to do the + /// construction. Usage: + /// + /// extern "C" void LLVMInitializeFooTarget() { + /// extern Target TheFooTarget; + /// RegisterMCCodeGenInfoFn X(TheFooTarget, TheFunction); + /// } + struct RegisterMCCodeGenInfoFn { + RegisterMCCodeGenInfoFn(Target &T, Target::MCCodeGenInfoCtorFnTy Fn) { + TargetRegistry::RegisterMCCodeGenInfo(T, Fn); + } + }; + /// RegisterMCInstrInfo - Helper template for registering a target instruction /// info implementation. This invokes the static "Create" method on the class /// to actually do the construction. Usage: @@ -803,7 +868,7 @@ namespace llvm { TargetRegistry::RegisterMCRegInfo(T, &Allocator); } private: - static MCRegisterInfo *Allocator() { + static MCRegisterInfo *Allocator(StringRef TT) { return new MCRegisterInfoImpl(); } }; @@ -871,10 +936,10 @@ namespace llvm { } private: - static TargetMachine *Allocator(const Target &T, const std::string &TT, - const std::string &CPU, - const std::string &FS) { - return new TargetMachineImpl(T, TT, CPU, FS); + static TargetMachine *Allocator(const Target &T, StringRef TT, + StringRef CPU, StringRef FS, + Reloc::Model RM) { + return new TargetMachineImpl(T, TT, CPU, FS, RM); } }; diff --git a/include/llvm/Target/TargetSelect.h b/include/llvm/Target/TargetSelect.h index 272ee09..81fd9c9 100644 --- a/include/llvm/Target/TargetSelect.h +++ b/include/llvm/Target/TargetSelect.h @@ -31,10 +31,18 @@ extern "C" { #include "llvm/Config/Targets.def" #define LLVM_TARGET(TargetName) \ + void LLVMInitialize##TargetName##MCCodeGenInfo(); +#include "llvm/Config/Targets.def" + +#define LLVM_TARGET(TargetName) \ void LLVMInitialize##TargetName##MCInstrInfo(); #include "llvm/Config/Targets.def" #define LLVM_TARGET(TargetName) \ + void LLVMInitialize##TargetName##MCRegisterInfo(); +#include "llvm/Config/Targets.def" + +#define LLVM_TARGET(TargetName) \ void LLVMInitialize##TargetName##MCSubtargetInfo(); #include "llvm/Config/Targets.def" @@ -87,6 +95,16 @@ namespace llvm { #include "llvm/Config/Targets.def" } + /// InitializeAllMCCodeGenInfos - The main program should call this function + /// if it wants access to all targets machines that LLVM is configured to + /// support, to make them available via the TargetRegistry. + /// + /// It is legal for a client to make multiple calls to this function. + inline void InitializeAllMCCodeGenInfos() { +#define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##MCCodeGenInfo(); +#include "llvm/Config/Targets.def" + } + /// InitializeAllMCInstrInfos - The main program should call this function /// if it wants access to all available instruction infos for targets that /// LLVM is configured to support, to make them available via the @@ -98,6 +116,17 @@ namespace llvm { #include "llvm/Config/Targets.def" } + /// InitializeAllMCRegisterInfos - The main program should call this function + /// if it wants access to all available register infos for targets that + /// LLVM is configured to support, to make them available via the + /// TargetRegistry. + /// + /// It is legal for a client to make multiple calls to this function. + inline void InitializeAllMCRegisterInfos() { +#define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##MCRegisterInfo(); +#include "llvm/Config/Targets.def" + } + /// InitializeAllMCSubtargetInfos - The main program should call this function /// if it wants access to all available subtarget infos for targets that LLVM /// is configured to support, to make them available via the TargetRegistry. @@ -149,6 +178,7 @@ namespace llvm { LLVM_NATIVE_TARGETINFO(); LLVM_NATIVE_TARGET(); LLVM_NATIVE_MCASMINFO(); + LLVM_NATIVE_MCCODEGENINFO(); return false; #else return true; |