diff options
Diffstat (limited to 'include/llvm')
-rw-r--r-- | include/llvm/CodeGen/ISDOpcodes.h | 8 | ||||
-rw-r--r-- | include/llvm/Target/TargetSelectionDAG.td | 3 |
2 files changed, 0 insertions, 11 deletions
diff --git a/include/llvm/CodeGen/ISDOpcodes.h b/include/llvm/CodeGen/ISDOpcodes.h index 442729b..0fd211b 100644 --- a/include/llvm/CodeGen/ISDOpcodes.h +++ b/include/llvm/CodeGen/ISDOpcodes.h @@ -602,14 +602,6 @@ namespace ISD { /// specifier. PREFETCH, - /// OUTCHAIN = MEMBARRIER(INCHAIN, load-load, load-store, store-load, - /// store-store, device) - /// This corresponds to the memory.barrier intrinsic. - /// it takes an input chain, 4 operands to specify the type of barrier, an - /// operand specifying if the barrier applies to device and uncached memory - /// and produces an output chain. - MEMBARRIER, - /// OUTCHAIN = ATOMIC_FENCE(INCHAIN, ordering, scope) /// This corresponds to the fence instruction. It takes an input chain, and /// two integer constants: an AtomicOrdering and a SynchronizationScope. diff --git a/include/llvm/Target/TargetSelectionDAG.td b/include/llvm/Target/TargetSelectionDAG.td index 83bd787..d89a6e6 100644 --- a/include/llvm/Target/TargetSelectionDAG.td +++ b/include/llvm/Target/TargetSelectionDAG.td @@ -414,9 +414,6 @@ def prefetch : SDNode<"ISD::PREFETCH" , SDTPrefetch, def readcyclecounter : SDNode<"ISD::READCYCLECOUNTER", SDTIntLeaf, [SDNPHasChain, SDNPSideEffect]>; -def membarrier : SDNode<"ISD::MEMBARRIER" , SDTMemBarrier, - [SDNPHasChain, SDNPSideEffect]>; - def atomic_fence : SDNode<"ISD::ATOMIC_FENCE" , SDTAtomicFence, [SDNPHasChain, SDNPSideEffect]>; |