diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/llvm/CodeGen/CallingConvLower.h | 40 | ||||
| -rw-r--r-- | include/llvm/CodeGen/DAGISelHeader.h | 2 | ||||
| -rw-r--r-- | include/llvm/CodeGen/FastISel.h | 44 | ||||
| -rw-r--r-- | include/llvm/CodeGen/RuntimeLibcalls.h | 12 | ||||
| -rw-r--r-- | include/llvm/CodeGen/SelectionDAG.h | 264 | ||||
| -rw-r--r-- | include/llvm/CodeGen/SelectionDAGISel.h | 2 | ||||
| -rw-r--r-- | include/llvm/CodeGen/SelectionDAGNodes.h | 100 | ||||
| -rw-r--r-- | include/llvm/CodeGen/ValueTypes.h | 80 | ||||
| -rw-r--r-- | include/llvm/Target/TargetLowering.h | 214 | ||||
| -rw-r--r-- | include/llvm/Target/TargetRegisterInfo.h | 14 | ||||
| -rw-r--r-- | include/llvm/Target/TargetSelectionDAG.td | 74 |
11 files changed, 423 insertions, 423 deletions
diff --git a/include/llvm/CodeGen/CallingConvLower.h b/include/llvm/CodeGen/CallingConvLower.h index 02a2bf5..eb91687 100644 --- a/include/llvm/CodeGen/CallingConvLower.h +++ b/include/llvm/CodeGen/CallingConvLower.h @@ -54,14 +54,14 @@ private: LocInfo HTP : 6; /// ValVT - The type of the value being assigned. - MVT ValVT; + EVT ValVT; /// LocVT - The type of the location being assigned to. - MVT LocVT; + EVT LocVT; public: - static CCValAssign getReg(unsigned ValNo, MVT ValVT, - unsigned RegNo, MVT LocVT, + static CCValAssign getReg(unsigned ValNo, EVT ValVT, + unsigned RegNo, EVT LocVT, LocInfo HTP) { CCValAssign Ret; Ret.ValNo = ValNo; @@ -74,8 +74,8 @@ public: return Ret; } - static CCValAssign getCustomReg(unsigned ValNo, MVT ValVT, - unsigned RegNo, MVT LocVT, + static CCValAssign getCustomReg(unsigned ValNo, EVT ValVT, + unsigned RegNo, EVT LocVT, LocInfo HTP) { CCValAssign Ret; Ret = getReg(ValNo, ValVT, RegNo, LocVT, HTP); @@ -83,8 +83,8 @@ public: return Ret; } - static CCValAssign getMem(unsigned ValNo, MVT ValVT, - unsigned Offset, MVT LocVT, + static CCValAssign getMem(unsigned ValNo, EVT ValVT, + unsigned Offset, EVT LocVT, LocInfo HTP) { CCValAssign Ret; Ret.ValNo = ValNo; @@ -97,8 +97,8 @@ public: return Ret; } - static CCValAssign getCustomMem(unsigned ValNo, MVT ValVT, - unsigned Offset, MVT LocVT, + static CCValAssign getCustomMem(unsigned ValNo, EVT ValVT, + unsigned Offset, EVT LocVT, LocInfo HTP) { CCValAssign Ret; Ret = getMem(ValNo, ValVT, Offset, LocVT, HTP); @@ -107,7 +107,7 @@ public: } unsigned getValNo() const { return ValNo; } - MVT getValVT() const { return ValVT; } + EVT getValVT() const { return ValVT; } bool isRegLoc() const { return !isMem; } bool isMemLoc() const { return isMem; } @@ -116,7 +116,7 @@ public: unsigned getLocReg() const { assert(isRegLoc()); return Loc; } unsigned getLocMemOffset() const { assert(isMemLoc()); return Loc; } - MVT getLocVT() const { return LocVT; } + EVT getLocVT() const { return LocVT; } LocInfo getLocInfo() const { return HTP; } bool isExtInLoc() const { @@ -127,15 +127,15 @@ public: /// CCAssignFn - This function assigns a location for Val, updating State to /// reflect the change. -typedef bool CCAssignFn(unsigned ValNo, MVT ValVT, - MVT LocVT, CCValAssign::LocInfo LocInfo, +typedef bool CCAssignFn(unsigned ValNo, EVT ValVT, + EVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State); /// CCCustomFn - This function assigns a location for Val, possibly updating /// all args to reflect changes and indicates if it handled it. It must set /// isCustom if it handles the arg and returns true. -typedef bool CCCustomFn(unsigned &ValNo, MVT &ValVT, - MVT &LocVT, CCValAssign::LocInfo &LocInfo, +typedef bool CCCustomFn(unsigned &ValNo, EVT &ValVT, + EVT &LocVT, CCValAssign::LocInfo &LocInfo, ISD::ArgFlagsTy &ArgFlags, CCState &State); /// CCState - This class holds information needed while lowering arguments and @@ -189,7 +189,7 @@ public: /// AnalyzeCallOperands - Same as above except it takes vectors of types /// and argument flags. - void AnalyzeCallOperands(SmallVectorImpl<MVT> &ArgVTs, + void AnalyzeCallOperands(SmallVectorImpl<EVT> &ArgVTs, SmallVectorImpl<ISD::ArgFlagsTy> &Flags, CCAssignFn Fn); @@ -200,7 +200,7 @@ public: /// AnalyzeCallResult - Same as above except it's specialized for calls which /// produce a single value. - void AnalyzeCallResult(MVT VT, CCAssignFn Fn); + void AnalyzeCallResult(EVT VT, CCAssignFn Fn); /// getFirstUnallocated - Return the first unallocated register in the set, or /// NumRegs if they are all allocated. @@ -269,8 +269,8 @@ public: // HandleByVal - Allocate a stack slot large enough to pass an argument by // value. The size and alignment information of the argument is encoded in its // parameter attribute. - void HandleByVal(unsigned ValNo, MVT ValVT, - MVT LocVT, CCValAssign::LocInfo LocInfo, + void HandleByVal(unsigned ValNo, EVT ValVT, + EVT LocVT, CCValAssign::LocInfo LocInfo, int MinSize, int MinAlign, ISD::ArgFlagsTy ArgFlags); private: diff --git a/include/llvm/CodeGen/DAGISelHeader.h b/include/llvm/CodeGen/DAGISelHeader.h index b2acbc1..d0a24eb 100644 --- a/include/llvm/CodeGen/DAGISelHeader.h +++ b/include/llvm/CodeGen/DAGISelHeader.h @@ -35,7 +35,7 @@ static bool IsChainCompatible(SDNode *Chain, SDNode *Op) { return false; if (Chain->getNumOperands() > 0) { SDValue C0 = Chain->getOperand(0); - if (C0.getValueType() == MVT::Other) + if (C0.getValueType() == EVT::Other) return C0.getNode() != Op && IsChainCompatible(C0.getNode(), Op); } return true; diff --git a/include/llvm/CodeGen/FastISel.h b/include/llvm/CodeGen/FastISel.h index c7b1a42..b159dd9 100644 --- a/include/llvm/CodeGen/FastISel.h +++ b/include/llvm/CodeGen/FastISel.h @@ -137,24 +137,24 @@ protected: /// FastEmit_r - This method is called by target-independent code /// to request that an instruction with the given type and opcode /// be emitted. - virtual unsigned FastEmit_(MVT::SimpleValueType VT, - MVT::SimpleValueType RetVT, + virtual unsigned FastEmit_(EVT::SimpleValueType VT, + EVT::SimpleValueType RetVT, ISD::NodeType Opcode); /// FastEmit_r - This method is called by target-independent code /// to request that an instruction with the given type, opcode, and /// register operand be emitted. /// - virtual unsigned FastEmit_r(MVT::SimpleValueType VT, - MVT::SimpleValueType RetVT, + virtual unsigned FastEmit_r(EVT::SimpleValueType VT, + EVT::SimpleValueType RetVT, ISD::NodeType Opcode, unsigned Op0); /// FastEmit_rr - This method is called by target-independent code /// to request that an instruction with the given type, opcode, and /// register operands be emitted. /// - virtual unsigned FastEmit_rr(MVT::SimpleValueType VT, - MVT::SimpleValueType RetVT, + virtual unsigned FastEmit_rr(EVT::SimpleValueType VT, + EVT::SimpleValueType RetVT, ISD::NodeType Opcode, unsigned Op0, unsigned Op1); @@ -162,8 +162,8 @@ protected: /// to request that an instruction with the given type, opcode, and /// register and immediate operands be emitted. /// - virtual unsigned FastEmit_ri(MVT::SimpleValueType VT, - MVT::SimpleValueType RetVT, + virtual unsigned FastEmit_ri(EVT::SimpleValueType VT, + EVT::SimpleValueType RetVT, ISD::NodeType Opcode, unsigned Op0, uint64_t Imm); @@ -171,8 +171,8 @@ protected: /// to request that an instruction with the given type, opcode, and /// register and floating-point immediate operands be emitted. /// - virtual unsigned FastEmit_rf(MVT::SimpleValueType VT, - MVT::SimpleValueType RetVT, + virtual unsigned FastEmit_rf(EVT::SimpleValueType VT, + EVT::SimpleValueType RetVT, ISD::NodeType Opcode, unsigned Op0, ConstantFP *FPImm); @@ -180,8 +180,8 @@ protected: /// to request that an instruction with the given type, opcode, and /// register and immediate operands be emitted. /// - virtual unsigned FastEmit_rri(MVT::SimpleValueType VT, - MVT::SimpleValueType RetVT, + virtual unsigned FastEmit_rri(EVT::SimpleValueType VT, + EVT::SimpleValueType RetVT, ISD::NodeType Opcode, unsigned Op0, unsigned Op1, uint64_t Imm); @@ -189,33 +189,33 @@ protected: /// to emit an instruction with an immediate operand using FastEmit_ri. /// If that fails, it materializes the immediate into a register and try /// FastEmit_rr instead. - unsigned FastEmit_ri_(MVT::SimpleValueType VT, + unsigned FastEmit_ri_(EVT::SimpleValueType VT, ISD::NodeType Opcode, unsigned Op0, uint64_t Imm, - MVT::SimpleValueType ImmType); + EVT::SimpleValueType ImmType); /// FastEmit_rf_ - This method is a wrapper of FastEmit_rf. It first tries /// to emit an instruction with an immediate operand using FastEmit_rf. /// If that fails, it materializes the immediate into a register and try /// FastEmit_rr instead. - unsigned FastEmit_rf_(MVT::SimpleValueType VT, + unsigned FastEmit_rf_(EVT::SimpleValueType VT, ISD::NodeType Opcode, unsigned Op0, ConstantFP *FPImm, - MVT::SimpleValueType ImmType); + EVT::SimpleValueType ImmType); /// FastEmit_i - This method is called by target-independent code /// to request that an instruction with the given type, opcode, and /// immediate operand be emitted. - virtual unsigned FastEmit_i(MVT::SimpleValueType VT, - MVT::SimpleValueType RetVT, + virtual unsigned FastEmit_i(EVT::SimpleValueType VT, + EVT::SimpleValueType RetVT, ISD::NodeType Opcode, uint64_t Imm); /// FastEmit_f - This method is called by target-independent code /// to request that an instruction with the given type, opcode, and /// floating-point immediate operand be emitted. - virtual unsigned FastEmit_f(MVT::SimpleValueType VT, - MVT::SimpleValueType RetVT, + virtual unsigned FastEmit_f(EVT::SimpleValueType VT, + EVT::SimpleValueType RetVT, ISD::NodeType Opcode, ConstantFP *FPImm); @@ -268,12 +268,12 @@ protected: /// FastEmitInst_extractsubreg - Emit a MachineInstr for an extract_subreg /// from a specified index of a superregister to a specified type. - unsigned FastEmitInst_extractsubreg(MVT::SimpleValueType RetVT, + unsigned FastEmitInst_extractsubreg(EVT::SimpleValueType RetVT, unsigned Op0, uint32_t Idx); /// FastEmitZExtFromI1 - Emit MachineInstrs to compute the value of Op /// with all but the least significant bit set to zero. - unsigned FastEmitZExtFromI1(MVT::SimpleValueType VT, + unsigned FastEmitZExtFromI1(EVT::SimpleValueType VT, unsigned Op); /// FastEmitBranch - Emit an unconditional branch to the given block, diff --git a/include/llvm/CodeGen/RuntimeLibcalls.h b/include/llvm/CodeGen/RuntimeLibcalls.h index ae708c9..7a40f02 100644 --- a/include/llvm/CodeGen/RuntimeLibcalls.h +++ b/include/llvm/CodeGen/RuntimeLibcalls.h @@ -237,27 +237,27 @@ namespace RTLIB { /// getFPEXT - Return the FPEXT_*_* value for the given types, or /// UNKNOWN_LIBCALL if there is none. - Libcall getFPEXT(MVT OpVT, MVT RetVT); + Libcall getFPEXT(EVT OpVT, EVT RetVT); /// getFPROUND - Return the FPROUND_*_* value for the given types, or /// UNKNOWN_LIBCALL if there is none. - Libcall getFPROUND(MVT OpVT, MVT RetVT); + Libcall getFPROUND(EVT OpVT, EVT RetVT); /// getFPTOSINT - Return the FPTOSINT_*_* value for the given types, or /// UNKNOWN_LIBCALL if there is none. - Libcall getFPTOSINT(MVT OpVT, MVT RetVT); + Libcall getFPTOSINT(EVT OpVT, EVT RetVT); /// getFPTOUINT - Return the FPTOUINT_*_* value for the given types, or /// UNKNOWN_LIBCALL if there is none. - Libcall getFPTOUINT(MVT OpVT, MVT RetVT); + Libcall getFPTOUINT(EVT OpVT, EVT RetVT); /// getSINTTOFP - Return the SINTTOFP_*_* value for the given types, or /// UNKNOWN_LIBCALL if there is none. - Libcall getSINTTOFP(MVT OpVT, MVT RetVT); + Libcall getSINTTOFP(EVT OpVT, EVT RetVT); /// getUINTTOFP - Return the UINTTOFP_*_* value for the given types, or /// UNKNOWN_LIBCALL if there is none. - Libcall getUINTTOFP(MVT OpVT, MVT RetVT); + Libcall getUINTTOFP(EVT OpVT, EVT RetVT); } } diff --git a/include/llvm/CodeGen/SelectionDAG.h b/include/llvm/CodeGen/SelectionDAG.h index 6d3fdc4..73b8895 100644 --- a/include/llvm/CodeGen/SelectionDAG.h +++ b/include/llvm/CodeGen/SelectionDAG.h @@ -193,7 +193,7 @@ public: /// setRoot - Set the current root tag of the SelectionDAG. /// const SDValue &setRoot(SDValue N) { - assert((!N.getNode() || N.getValueType() == MVT::Other) && + assert((!N.getNode() || N.getValueType() == EVT::Other) && "DAG root value is not a chain!"); return Root = N; } @@ -244,70 +244,70 @@ public: /// getVTList - Return an SDVTList that represents the list of values /// specified. - SDVTList getVTList(MVT VT); - SDVTList getVTList(MVT VT1, MVT VT2); - SDVTList getVTList(MVT VT1, MVT VT2, MVT VT3); - SDVTList getVTList(MVT VT1, MVT VT2, MVT VT3, MVT VT4); - SDVTList getVTList(const MVT *VTs, unsigned NumVTs); + SDVTList getVTList(EVT VT); + SDVTList getVTList(EVT VT1, EVT VT2); + SDVTList getVTList(EVT VT1, EVT VT2, EVT VT3); + SDVTList getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4); + SDVTList getVTList(const EVT *VTs, unsigned NumVTs); //===--------------------------------------------------------------------===// // Node creation methods. // - SDValue getConstant(uint64_t Val, MVT VT, bool isTarget = false); - SDValue getConstant(const APInt &Val, MVT VT, bool isTarget = false); - SDValue getConstant(const ConstantInt &Val, MVT VT, bool isTarget = false); + SDValue getConstant(uint64_t Val, EVT VT, bool isTarget = false); + SDValue getConstant(const APInt &Val, EVT VT, bool isTarget = false); + SDValue getConstant(const ConstantInt &Val, EVT VT, bool isTarget = false); SDValue getIntPtrConstant(uint64_t Val, bool isTarget = false); - SDValue getTargetConstant(uint64_t Val, MVT VT) { + SDValue getTargetConstant(uint64_t Val, EVT VT) { return getConstant(Val, VT, true); } - SDValue getTargetConstant(const APInt &Val, MVT VT) { + SDValue getTargetConstant(const APInt &Val, EVT VT) { return getConstant(Val, VT, true); } - SDValue getTargetConstant(const ConstantInt &Val, MVT VT) { + SDValue getTargetConstant(const ConstantInt &Val, EVT VT) { return getConstant(Val, VT, true); } - SDValue getConstantFP(double Val, MVT VT, bool isTarget = false); - SDValue getConstantFP(const APFloat& Val, MVT VT, bool isTarget = false); - SDValue getConstantFP(const ConstantFP &CF, MVT VT, bool isTarget = false); - SDValue getTargetConstantFP(double Val, MVT VT) { + SDValue getConstantFP(double Val, EVT VT, bool isTarget = false); + SDValue getConstantFP(const APFloat& Val, EVT VT, bool isTarget = false); + SDValue getConstantFP(const ConstantFP &CF, EVT VT, bool isTarget = false); + SDValue getTargetConstantFP(double Val, EVT VT) { return getConstantFP(Val, VT, true); } - SDValue getTargetConstantFP(const APFloat& Val, MVT VT) { + SDValue getTargetConstantFP(const APFloat& Val, EVT VT) { return getConstantFP(Val, VT, true); } - SDValue getTargetConstantFP(const ConstantFP &Val, MVT VT) { + SDValue getTargetConstantFP(const ConstantFP &Val, EVT VT) { return getConstantFP(Val, VT, true); } - SDValue getGlobalAddress(const GlobalValue *GV, MVT VT, + SDValue getGlobalAddress(const GlobalValue *GV, EVT VT, int64_t offset = 0, bool isTargetGA = false, unsigned char TargetFlags = 0); - SDValue getTargetGlobalAddress(const GlobalValue *GV, MVT VT, + SDValue getTargetGlobalAddress(const GlobalValue *GV, EVT VT, int64_t offset = 0, unsigned char TargetFlags = 0) { return getGlobalAddress(GV, VT, offset, true, TargetFlags); } - SDValue getFrameIndex(int FI, MVT VT, bool isTarget = false); - SDValue getTargetFrameIndex(int FI, MVT VT) { + SDValue getFrameIndex(int FI, EVT VT, bool isTarget = false); + SDValue getTargetFrameIndex(int FI, EVT VT) { return getFrameIndex(FI, VT, true); } - SDValue getJumpTable(int JTI, MVT VT, bool isTarget = false, + SDValue getJumpTable(int JTI, EVT VT, bool isTarget = false, unsigned char TargetFlags = 0); - SDValue getTargetJumpTable(int JTI, MVT VT, unsigned char TargetFlags = 0) { + SDValue getTargetJumpTable(int JTI, EVT VT, unsigned char TargetFlags = 0) { return getJumpTable(JTI, VT, true, TargetFlags); } - SDValue getConstantPool(Constant *C, MVT VT, + SDValue getConstantPool(Constant *C, EVT VT, unsigned Align = 0, int Offs = 0, bool isT=false, unsigned char TargetFlags = 0); - SDValue getTargetConstantPool(Constant *C, MVT VT, + SDValue getTargetConstantPool(Constant *C, EVT VT, unsigned Align = 0, int Offset = 0, unsigned char TargetFlags = 0) { return getConstantPool(C, VT, Align, Offset, true, TargetFlags); } - SDValue getConstantPool(MachineConstantPoolValue *C, MVT VT, + SDValue getConstantPool(MachineConstantPoolValue *C, EVT VT, unsigned Align = 0, int Offs = 0, bool isT=false, unsigned char TargetFlags = 0); SDValue getTargetConstantPool(MachineConstantPoolValue *C, - MVT VT, unsigned Align = 0, + EVT VT, unsigned Align = 0, int Offset = 0, unsigned char TargetFlags=0) { return getConstantPool(C, VT, Align, Offset, true, TargetFlags); } @@ -315,19 +315,19 @@ public: // to provide debug info for the BB at that time, so keep this one around. SDValue getBasicBlock(MachineBasicBlock *MBB); SDValue getBasicBlock(MachineBasicBlock *MBB, DebugLoc dl); - SDValue getExternalSymbol(const char *Sym, MVT VT); - SDValue getExternalSymbol(const char *Sym, DebugLoc dl, MVT VT); - SDValue getTargetExternalSymbol(const char *Sym, MVT VT, + SDValue getExternalSymbol(const char *Sym, EVT VT); + SDValue getExternalSymbol(const char *Sym, DebugLoc dl, EVT VT); + SDValue getTargetExternalSymbol(const char *Sym, EVT VT, unsigned char TargetFlags = 0); - SDValue getValueType(MVT); - SDValue getRegister(unsigned Reg, MVT VT); + SDValue getValueType(EVT); + SDValue getRegister(unsigned Reg, EVT VT); SDValue getDbgStopPoint(DebugLoc DL, SDValue Root, unsigned Line, unsigned Col, Value *CU); SDValue getLabel(unsigned Opcode, DebugLoc dl, SDValue Root, unsigned LabelID); SDValue getCopyToReg(SDValue Chain, DebugLoc dl, unsigned Reg, SDValue N) { - return getNode(ISD::CopyToReg, dl, MVT::Other, Chain, + return getNode(ISD::CopyToReg, dl, EVT::Other, Chain, getRegister(Reg, N.getValueType()), N); } @@ -336,7 +336,7 @@ public: // null) and that there should be a flag result. SDValue getCopyToReg(SDValue Chain, DebugLoc dl, unsigned Reg, SDValue N, SDValue Flag) { - SDVTList VTs = getVTList(MVT::Other, MVT::Flag); + SDVTList VTs = getVTList(EVT::Other, EVT::Flag); SDValue Ops[] = { Chain, getRegister(Reg, N.getValueType()), N, Flag }; return getNode(ISD::CopyToReg, dl, VTs, Ops, Flag.getNode() ? 4 : 3); } @@ -344,13 +344,13 @@ public: // Similar to last getCopyToReg() except parameter Reg is a SDValue SDValue getCopyToReg(SDValue Chain, DebugLoc dl, SDValue Reg, SDValue N, SDValue Flag) { - SDVTList VTs = getVTList(MVT::Other, MVT::Flag); + SDVTList VTs = getVTList(EVT::Other, EVT::Flag); SDValue Ops[] = { Chain, Reg, N, Flag }; return getNode(ISD::CopyToReg, dl, VTs, Ops, Flag.getNode() ? 4 : 3); } - SDValue getCopyFromReg(SDValue Chain, DebugLoc dl, unsigned Reg, MVT VT) { - SDVTList VTs = getVTList(VT, MVT::Other); + SDValue getCopyFromReg(SDValue Chain, DebugLoc dl, unsigned Reg, EVT VT) { + SDVTList VTs = getVTList(VT, EVT::Other); SDValue Ops[] = { Chain, getRegister(Reg, VT) }; return getNode(ISD::CopyFromReg, dl, VTs, Ops, 2); } @@ -358,9 +358,9 @@ public: // This version of the getCopyFromReg method takes an extra operand, which // indicates that there is potentially an incoming flag value (if Flag is not // null) and that there should be a flag result. - SDValue getCopyFromReg(SDValue Chain, DebugLoc dl, unsigned Reg, MVT VT, + SDValue getCopyFromReg(SDValue Chain, DebugLoc dl, unsigned Reg, EVT VT, SDValue Flag) { - SDVTList VTs = getVTList(VT, MVT::Other, MVT::Flag); + SDVTList VTs = getVTList(VT, EVT::Other, EVT::Flag); SDValue Ops[] = { Chain, getRegister(Reg, VT), Flag }; return getNode(ISD::CopyFromReg, dl, VTs, Ops, Flag.getNode() ? 3 : 2); } @@ -369,7 +369,7 @@ public: /// Returns the ConvertRndSat Note: Avoid using this node because it may /// disappear in the future and most targets don't support it. - SDValue getConvertRndSat(MVT VT, DebugLoc dl, SDValue Val, SDValue DTy, + SDValue getConvertRndSat(EVT VT, DebugLoc dl, SDValue Val, SDValue DTy, SDValue STy, SDValue Rnd, SDValue Sat, ISD::CvtCode Code); @@ -377,21 +377,21 @@ public: /// elements in VT, which must be a vector type, must match the number of /// mask elements NumElts. A integer mask element equal to -1 is treated as /// undefined. - SDValue getVectorShuffle(MVT VT, DebugLoc dl, SDValue N1, SDValue N2, + SDValue getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1, SDValue N2, const int *MaskElts); /// getZeroExtendInReg - Return the expression required to zero extend the Op /// value assuming it was the smaller SrcTy value. - SDValue getZeroExtendInReg(SDValue Op, DebugLoc DL, MVT SrcTy); + SDValue getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT SrcTy); /// getNOT - Create a bitwise NOT operation as (XOR Val, -1). - SDValue getNOT(DebugLoc DL, SDValue Val, MVT VT); + SDValue getNOT(DebugLoc DL, SDValue Val, EVT VT); /// getCALLSEQ_START - Return a new CALLSEQ_START node, which always must have /// a flag result (to ensure it's not CSE'd). CALLSEQ_START does not have a /// useful DebugLoc. SDValue getCALLSEQ_START(SDValue Chain, SDValue Op) { - SDVTList VTs = getVTList(MVT::Other, MVT::Flag); + SDVTList VTs = getVTList(EVT::Other, EVT::Flag); SDValue Ops[] = { Chain, Op }; return getNode(ISD::CALLSEQ_START, DebugLoc::getUnknownLoc(), VTs, Ops, 2); @@ -402,7 +402,7 @@ public: /// a useful DebugLoc. SDValue getCALLSEQ_END(SDValue Chain, SDValue Op1, SDValue Op2, SDValue InFlag) { - SDVTList NodeTys = getVTList(MVT::Other, MVT::Flag); + SDVTList NodeTys = getVTList(EVT::Other, EVT::Flag); SmallVector<SDValue, 4> Ops; Ops.push_back(Chain); Ops.push_back(Op1); @@ -414,36 +414,36 @@ public: } /// getUNDEF - Return an UNDEF node. UNDEF does not have a useful DebugLoc. - SDValue getUNDEF(MVT VT) { + SDValue getUNDEF(EVT VT) { return getNode(ISD::UNDEF, DebugLoc::getUnknownLoc(), VT); } /// getGLOBAL_OFFSET_TABLE - Return a GLOBAL_OFFSET_TABLE node. This does /// not have a useful DebugLoc. - SDValue getGLOBAL_OFFSET_TABLE(MVT VT) { + SDValue getGLOBAL_OFFSET_TABLE(EVT VT) { return getNode(ISD::GLOBAL_OFFSET_TABLE, DebugLoc::getUnknownLoc(), VT); } /// getNode - Gets or creates the specified node. /// - SDValue getNode(unsigned Opcode, DebugLoc DL, MVT VT); - SDValue getNode(unsigned Opcode, DebugLoc DL, MVT VT, SDValue N); - SDValue getNode(unsigned Opcode, DebugLoc DL, MVT VT, SDValue N1, SDValue N2); - SDValue getNode(unsigned Opcode, DebugLoc DL, MVT VT, + SDValue getNode(unsigned Opcode, DebugLoc DL, EVT VT); + SDValue getNode(unsigned Opcode, DebugLoc DL, EVT VT, SDValue N); + SDValue getNode(unsigned Opcode, DebugLoc DL, EVT VT, SDValue N1, SDValue N2); + SDValue getNode(unsigned Opcode, DebugLoc DL, EVT VT, SDValue N1, SDValue N2, SDValue N3); - SDValue getNode(unsigned Opcode, DebugLoc DL, MVT VT, + SDValue getNode(unsigned Opcode, DebugLoc DL, EVT VT, SDValue N1, SDValue N2, SDValue N3, SDValue N4); - SDValue getNode(unsigned Opcode, DebugLoc DL, MVT VT, + SDValue getNode(unsigned Opcode, DebugLoc DL, EVT VT, SDValue N1, SDValue N2, SDValue N3, SDValue N4, SDValue N5); - SDValue getNode(unsigned Opcode, DebugLoc DL, MVT VT, + SDValue getNode(unsigned Opcode, DebugLoc DL, EVT VT, const SDUse *Ops, unsigned NumOps); - SDValue getNode(unsigned Opcode, DebugLoc DL, MVT VT, + SDValue getNode(unsigned Opcode, DebugLoc DL, EVT VT, const SDValue *Ops, unsigned NumOps); SDValue getNode(unsigned Opcode, DebugLoc DL, - const std::vector<MVT> &ResultTys, + const std::vector<EVT> &ResultTys, const SDValue *Ops, unsigned NumOps); - SDValue getNode(unsigned Opcode, DebugLoc DL, const MVT *VTs, unsigned NumVTs, + SDValue getNode(unsigned Opcode, DebugLoc DL, const EVT *VTs, unsigned NumVTs, const SDValue *Ops, unsigned NumOps); SDValue getNode(unsigned Opcode, DebugLoc DL, SDVTList VTs, const SDValue *Ops, unsigned NumOps); @@ -482,7 +482,7 @@ public: /// getSetCC - Helper function to make it easier to build SetCC's if you just /// have an ISD::CondCode instead of an SDValue. /// - SDValue getSetCC(DebugLoc DL, MVT VT, SDValue LHS, SDValue RHS, + SDValue getSetCC(DebugLoc DL, EVT VT, SDValue LHS, SDValue RHS, ISD::CondCode Cond) { return getNode(ISD::SETCC, DL, VT, LHS, RHS, getCondCode(Cond)); } @@ -490,7 +490,7 @@ public: /// getVSetCC - Helper function to make it easier to build VSetCC's nodes /// if you just have an ISD::CondCode instead of an SDValue. /// - SDValue getVSetCC(DebugLoc DL, MVT VT, SDValue LHS, SDValue RHS, + SDValue getVSetCC(DebugLoc DL, EVT VT, SDValue LHS, SDValue RHS, ISD::CondCode Cond) { return getNode(ISD::VSETCC, DL, VT, LHS, RHS, getCondCode(Cond)); } @@ -506,33 +506,33 @@ public: /// getVAArg - VAArg produces a result and token chain, and takes a pointer /// and a source value as input. - SDValue getVAArg(MVT VT, DebugLoc dl, SDValue Chain, SDValue Ptr, + SDValue getVAArg(EVT VT, DebugLoc dl, SDValue Chain, SDValue Ptr, SDValue SV); /// getAtomic - Gets a node for an atomic op, produces result and chain and /// takes 3 operands - SDValue getAtomic(unsigned Opcode, DebugLoc dl, MVT MemVT, SDValue Chain, + SDValue getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, SDValue Chain, SDValue Ptr, SDValue Cmp, SDValue Swp, const Value* PtrVal, unsigned Alignment=0); /// getAtomic - Gets a node for an atomic op, produces result and chain and /// takes 2 operands. - SDValue getAtomic(unsigned Opcode, DebugLoc dl, MVT MemVT, SDValue Chain, + SDValue getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, SDValue Chain, SDValue Ptr, SDValue Val, const Value* PtrVal, unsigned Alignment = 0); /// getMemIntrinsicNode - Creates a MemIntrinsicNode that may produce a /// result and takes a list of operands. SDValue getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, - const MVT *VTs, unsigned NumVTs, + const EVT *VTs, unsigned NumVTs, const SDValue *Ops, unsigned NumOps, - MVT MemVT, const Value *srcValue, int SVOff, + EVT MemVT, const Value *srcValue, int SVOff, unsigned Align = 0, bool Vol = false, bool ReadMem = true, bool WriteMem = true); SDValue getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, const SDValue *Ops, unsigned NumOps, - MVT MemVT, const Value *srcValue, int SVOff, + EVT MemVT, const Value *srcValue, int SVOff, unsigned Align = 0, bool Vol = false, bool ReadMem = true, bool WriteMem = true); @@ -542,19 +542,19 @@ public: /// getLoad - Loads are not normal binary operators: their result type is not /// determined by their operands, and they produce a value AND a token chain. /// - SDValue getLoad(MVT VT, DebugLoc dl, SDValue Chain, SDValue Ptr, + SDValue getLoad(EVT VT, DebugLoc dl, SDValue Chain, SDValue Ptr, const Value *SV, int SVOffset, bool isVolatile=false, unsigned Alignment=0); - SDValue getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, MVT VT, + SDValue getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT, SDValue Chain, SDValue Ptr, const Value *SV, - int SVOffset, MVT EVT, bool isVolatile=false, + int SVOffset, EVT EVT, bool isVolatile=false, unsigned Alignment=0); SDValue getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base, SDValue Offset, ISD::MemIndexedMode AM); SDValue getLoad(ISD::MemIndexedMode AM, DebugLoc dl, ISD::LoadExtType ExtType, - MVT VT, SDValue Chain, + EVT VT, SDValue Chain, SDValue Ptr, SDValue Offset, - const Value *SV, int SVOffset, MVT EVT, + const Value *SV, int SVOffset, EVT EVT, bool isVolatile=false, unsigned Alignment=0); /// getStore - Helper function to build ISD::STORE nodes. @@ -563,7 +563,7 @@ public: const Value *SV, int SVOffset, bool isVolatile=false, unsigned Alignment=0); SDValue getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, SDValue Ptr, - const Value *SV, int SVOffset, MVT TVT, + const Value *SV, int SVOffset, EVT TVT, bool isVolatile=false, unsigned Alignment=0); SDValue getIndexedStore(SDValue OrigStoe, DebugLoc dl, SDValue Base, SDValue Offset, ISD::MemIndexedMode AM); @@ -600,54 +600,54 @@ public: /// specified node to have the specified return type, Target opcode, and /// operands. Note that target opcodes are stored as /// ~TargetOpcode in the node opcode field. The resultant node is returned. - SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, MVT VT); - SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, MVT VT, SDValue Op1); - SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, MVT VT, + SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT); + SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT, SDValue Op1); + SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT, SDValue Op1, SDValue Op2); - SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, MVT VT, + SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT, SDValue Op1, SDValue Op2, SDValue Op3); - SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, MVT VT, + SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT, const SDValue *Ops, unsigned NumOps); - SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, MVT VT1, MVT VT2); - SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, MVT VT1, - MVT VT2, const SDValue *Ops, unsigned NumOps); - SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, MVT VT1, - MVT VT2, MVT VT3, const SDValue *Ops, unsigned NumOps); - SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, MVT VT1, - MVT VT2, MVT VT3, MVT VT4, const SDValue *Ops, + SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT1, EVT VT2); + SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT1, + EVT VT2, const SDValue *Ops, unsigned NumOps); + SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT1, + EVT VT2, EVT VT3, const SDValue *Ops, unsigned NumOps); + SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1, + EVT VT2, EVT VT3, EVT VT4, const SDValue *Ops, unsigned NumOps); - SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, MVT VT1, - MVT VT2, SDValue Op1); - SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, MVT VT1, - MVT VT2, SDValue Op1, SDValue Op2); - SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, MVT VT1, - MVT VT2, SDValue Op1, SDValue Op2, SDValue Op3); - SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, MVT VT1, - MVT VT2, MVT VT3, SDValue Op1, SDValue Op2, SDValue Op3); + SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT1, + EVT VT2, SDValue Op1); + SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT1, + EVT VT2, SDValue Op1, SDValue Op2); + SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT1, + EVT VT2, SDValue Op1, SDValue Op2, SDValue Op3); + SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT1, + EVT VT2, EVT VT3, SDValue Op1, SDValue Op2, SDValue Op3); SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, SDVTList VTs, const SDValue *Ops, unsigned NumOps); /// MorphNodeTo - These *mutate* the specified node to have the specified /// return type, opcode, and operands. - SDNode *MorphNodeTo(SDNode *N, unsigned Opc, MVT VT); - SDNode *MorphNodeTo(SDNode *N, unsigned Opc, MVT VT, SDValue Op1); - SDNode *MorphNodeTo(SDNode *N, unsigned Opc, MVT VT, + SDNode *MorphNodeTo(SDNode *N, unsigned Opc, EVT VT); + SDNode *MorphNodeTo(SDNode *N, unsigned Opc, EVT VT, SDValue Op1); + SDNode *MorphNodeTo(SDNode *N, unsigned Opc, EVT VT, SDValue Op1, SDValue Op2); - SDNode *MorphNodeTo(SDNode *N, unsigned Opc, MVT VT, + SDNode *MorphNodeTo(SDNode *N, unsigned Opc, EVT VT, SDValue Op1, SDValue Op2, SDValue Op3); - SDNode *MorphNodeTo(SDNode *N, unsigned Opc, MVT VT, + SDNode *MorphNodeTo(SDNode *N, unsigned Opc, EVT VT, const SDValue *Ops, unsigned NumOps); - SDNode *MorphNodeTo(SDNode *N, unsigned Opc, MVT VT1, MVT VT2); - SDNode *MorphNodeTo(SDNode *N, unsigned Opc, MVT VT1, - MVT VT2, const SDValue *Ops, unsigned NumOps); - SDNode *MorphNodeTo(SDNode *N, unsigned Opc, MVT VT1, - MVT VT2, MVT VT3, const SDValue *Ops, unsigned NumOps); - SDNode *MorphNodeTo(SDNode *N, unsigned Opc, MVT VT1, - MVT VT2, SDValue Op1); - SDNode *MorphNodeTo(SDNode *N, unsigned Opc, MVT VT1, - MVT VT2, SDValue Op1, SDValue Op2); - SDNode *MorphNodeTo(SDNode *N, unsigned Opc, MVT VT1, - MVT VT2, SDValue Op1, SDValue Op2, SDValue Op3); + SDNode *MorphNodeTo(SDNode *N, unsigned Opc, EVT VT1, EVT VT2); + SDNode *MorphNodeTo(SDNode *N, unsigned Opc, EVT VT1, + EVT VT2, const SDValue *Ops, unsigned NumOps); + SDNode *MorphNodeTo(SDNode *N, unsigned Opc, EVT VT1, + EVT VT2, EVT VT3, const SDValue *Ops, unsigned NumOps); + SDNode *MorphNodeTo(SDNode *N, unsigned Opc, EVT VT1, + EVT VT2, SDValue Op1); + SDNode *MorphNodeTo(SDNode *N, unsigned Opc, EVT VT1, + EVT VT2, SDValue Op1, SDValue Op2); + SDNode *MorphNodeTo(SDNode *N, unsigned Opc, EVT VT1, + EVT VT2, SDValue Op1, SDValue Op2, SDValue Op3); SDNode *MorphNodeTo(SDNode *N, unsigned Opc, SDVTList VTs, const SDValue *Ops, unsigned NumOps); @@ -657,33 +657,33 @@ public: /// Note that getTargetNode returns the resultant node. If there is already a /// node of the specified opcode and operands, it returns that node instead of /// the current one. - SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT); - SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT, SDValue Op1); - SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT, SDValue Op1, + SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT); + SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1); + SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1, SDValue Op2); - SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT, + SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1, SDValue Op2, SDValue Op3); - SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT, + SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT, const SDValue *Ops, unsigned NumOps); - SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1, MVT VT2); - SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1, MVT VT2, + SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2); + SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2, SDValue Op1); - SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1, - MVT VT2, SDValue Op1, SDValue Op2); - SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1, - MVT VT2, SDValue Op1, SDValue Op2, SDValue Op3); - SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1, MVT VT2, + SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1, + EVT VT2, SDValue Op1, SDValue Op2); + SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1, + EVT VT2, SDValue Op1, SDValue Op2, SDValue Op3); + SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2, const SDValue *Ops, unsigned NumOps); - SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1, MVT VT2, MVT VT3, + SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2, EVT VT3, SDValue Op1, SDValue Op2); - SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1, MVT VT2, MVT VT3, + SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2, EVT VT3, SDValue Op1, SDValue Op2, SDValue Op3); - SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1, MVT VT2, MVT VT3, + SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2, EVT VT3, const SDValue *Ops, unsigned NumOps); - SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1, MVT VT2, MVT VT3, - MVT VT4, const SDValue *Ops, unsigned NumOps); + SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2, EVT VT3, + EVT VT4, const SDValue *Ops, unsigned NumOps); SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, - const std::vector<MVT> &ResultTys, const SDValue *Ops, + const std::vector<EVT> &ResultTys, const SDValue *Ops, unsigned NumOps); /// getNodeIfExists - Get the specified node if it's already available, or @@ -792,20 +792,20 @@ public: /// CreateStackTemporary - Create a stack temporary, suitable for holding the /// specified value type. If minAlign is specified, the slot size will have /// at least that alignment. - SDValue CreateStackTemporary(MVT VT, unsigned minAlign = 1); + SDValue CreateStackTemporary(EVT VT, unsigned minAlign = 1); /// CreateStackTemporary - Create a stack temporary suitable for holding /// either of the specified value types. - SDValue CreateStackTemporary(MVT VT1, MVT VT2); + SDValue CreateStackTemporary(EVT VT1, EVT VT2); /// FoldConstantArithmetic - SDValue FoldConstantArithmetic(unsigned Opcode, - MVT VT, + EVT VT, ConstantSDNode *Cst1, ConstantSDNode *Cst2); /// FoldSetCC - Constant fold a setcc to true or false. - SDValue FoldSetCC(MVT VT, SDValue N1, + SDValue FoldSetCC(EVT VT, SDValue N1, SDValue N2, ISD::CondCode Cond, DebugLoc dl); /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We @@ -855,7 +855,7 @@ private: void DeleteNodeNotInCSEMaps(SDNode *N); void DeallocateNode(SDNode *N); - unsigned getMVTAlignment(MVT MemoryVT) const; + unsigned getEVTAlignment(EVT MemoryVT) const; void allnodes_clear(); @@ -866,7 +866,7 @@ private: std::vector<CondCodeSDNode*> CondCodeNodes; std::vector<SDNode*> ValueTypeNodes; - std::map<MVT, SDNode*, MVT::compareRawBits> ExtendedValueTypeNodes; + std::map<EVT, SDNode*, EVT::compareRawBits> ExtendedValueTypeNodes; StringMap<SDNode*> ExternalSymbols; std::map<std::pair<std::string, unsigned char>,SDNode*> TargetExternalSymbols; diff --git a/include/llvm/CodeGen/SelectionDAGISel.h b/include/llvm/CodeGen/SelectionDAGISel.h index 51f90ac..2b713f1 100644 --- a/include/llvm/CodeGen/SelectionDAGISel.h +++ b/include/llvm/CodeGen/SelectionDAGISel.h @@ -65,7 +65,7 @@ public: virtual bool runOnMachineFunction(MachineFunction &MF); - unsigned MakeReg(MVT VT); + unsigned MakeReg(EVT VT); virtual void EmitFunctionEntryCode(Function &Fn, MachineFunction &MF) {} virtual void InstructionSelect() = 0; diff --git a/include/llvm/CodeGen/SelectionDAGNodes.h b/include/llvm/CodeGen/SelectionDAGNodes.h index 9749d8f..bbb1f3b 100644 --- a/include/llvm/CodeGen/SelectionDAGNodes.h +++ b/include/llvm/CodeGen/SelectionDAGNodes.h @@ -52,7 +52,7 @@ template <typename T> struct ilist_traits; /// SelectionDAG::getVTList(...). /// struct SDVTList { - const MVT *VTs; + const EVT *VTs; unsigned int NumVTs; }; @@ -856,7 +856,7 @@ public: /// getValueType - Return the ValueType of the referenced return value. /// - inline MVT getValueType() const; + inline EVT getValueType() const; /// getValueSizeInBits - Returns the size of the value in bits. /// @@ -965,7 +965,7 @@ public: /// getResNo - Convenience function for get().getResNo(). unsigned getResNo() const { return Val.getResNo(); } /// getValueType - Convenience function for get().getValueType(). - MVT getValueType() const { return Val.getValueType(); } + EVT getValueType() const { return Val.getValueType(); } /// operator== - Convenience function for get().operator== bool operator==(const SDValue &V) const { @@ -1055,7 +1055,7 @@ private: /// ValueList - The types of the values this node defines. SDNode's may /// define multiple values simultaneously. - const MVT *ValueList; + const EVT *ValueList; /// UseList - List of uses for this SDNode. SDUse *UseList; @@ -1067,7 +1067,7 @@ private: DebugLoc debugLoc; /// getValueTypeList - Return a pointer to the specified value type. - static const MVT *getValueTypeList(MVT VT); + static const EVT *getValueTypeList(EVT VT); friend class SelectionDAG; friend struct ilist_traits<SDNode>; @@ -1241,7 +1241,7 @@ public: /// to which the flag operand points. Otherwise return NULL. SDNode *getFlaggedNode() const { if (getNumOperands() != 0 && - getOperand(getNumOperands()-1).getValueType() == MVT::Flag) + getOperand(getNumOperands()-1).getValueType() == EVT::Flag) return getOperand(getNumOperands()-1).getNode(); return 0; } @@ -1269,18 +1269,18 @@ public: /// getValueType - Return the type of a specified result. /// - MVT getValueType(unsigned ResNo) const { + EVT getValueType(unsigned ResNo) const { assert(ResNo < NumValues && "Illegal result number!"); return ValueList[ResNo]; } - /// getValueSizeInBits - Returns MVT::getSizeInBits(getValueType(ResNo)). + /// getValueSizeInBits - Returns EVT::getSizeInBits(getValueType(ResNo)). /// unsigned getValueSizeInBits(unsigned ResNo) const { return getValueType(ResNo).getSizeInBits(); } - typedef const MVT* value_iterator; + typedef const EVT* value_iterator; value_iterator value_begin() const { return ValueList; } value_iterator value_end() const { return ValueList+NumValues; } @@ -1307,7 +1307,7 @@ public: void addUse(SDUse &U) { U.addToList(&UseList); } protected: - static SDVTList getSDVTList(MVT VT) { + static SDVTList getSDVTList(EVT VT) { SDVTList Ret = { getValueTypeList(VT), 1 }; return Ret; } @@ -1401,7 +1401,7 @@ protected: inline unsigned SDValue::getOpcode() const { return Node->getOpcode(); } -inline MVT SDValue::getValueType() const { +inline EVT SDValue::getValueType() const { return Node->getValueType(ResNo); } inline unsigned SDValue::getNumOperands() const { @@ -1501,7 +1501,7 @@ public: explicit HandleSDNode(SDValue X) #endif : SDNode(ISD::HANDLENODE, DebugLoc::getUnknownLoc(), - getSDVTList(MVT::Other)) { + getSDVTList(EVT::Other)) { InitOperands(&Op, X); } ~HandleSDNode(); @@ -1512,7 +1512,7 @@ public: class MemSDNode : public SDNode { private: // MemoryVT - VT of in-memory value. - MVT MemoryVT; + EVT MemoryVT; //! SrcValue - Memory location for alias analysis. const Value *SrcValue; @@ -1521,12 +1521,12 @@ private: int SVOffset; public: - MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, MVT MemoryVT, + MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT MemoryVT, const Value *srcValue, int SVOff, unsigned alignment, bool isvolatile); MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, const SDValue *Ops, - unsigned NumOps, MVT MemoryVT, const Value *srcValue, int SVOff, + unsigned NumOps, EVT MemoryVT, const Value *srcValue, int SVOff, unsigned alignment, bool isvolatile); /// Returns alignment and volatility of the memory access @@ -1546,7 +1546,7 @@ public: int getSrcValueOffset() const { return SVOffset; } /// getMemoryVT - Return the type of the in-memory value. - MVT getMemoryVT() const { return MemoryVT; } + EVT getMemoryVT() const { return MemoryVT; } /// getMemOperand - Return a MachineMemOperand object describing the memory /// reference performed by operation. @@ -1596,7 +1596,7 @@ public: // Swp: swap value // SrcVal: address to update as a Value (used for MemOperand) // Align: alignment of memory - AtomicSDNode(unsigned Opc, DebugLoc dl, SDVTList VTL, MVT MemVT, + AtomicSDNode(unsigned Opc, DebugLoc dl, SDVTList VTL, EVT MemVT, SDValue Chain, SDValue Ptr, SDValue Cmp, SDValue Swp, const Value* SrcVal, unsigned Align=0) @@ -1604,7 +1604,7 @@ public: Align, /*isVolatile=*/true) { InitOperands(Ops, Chain, Ptr, Cmp, Swp); } - AtomicSDNode(unsigned Opc, DebugLoc dl, SDVTList VTL, MVT MemVT, + AtomicSDNode(unsigned Opc, DebugLoc dl, SDVTList VTL, EVT MemVT, SDValue Chain, SDValue Ptr, SDValue Val, const Value* SrcVal, unsigned Align=0) : MemSDNode(Opc, dl, VTL, MemVT, SrcVal, /*SVOffset=*/0, @@ -1647,7 +1647,7 @@ class MemIntrinsicSDNode : public MemSDNode { public: MemIntrinsicSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, const SDValue *Ops, unsigned NumOps, - MVT MemoryVT, const Value *srcValue, int SVO, + EVT MemoryVT, const Value *srcValue, int SVO, unsigned Align, bool Vol, bool ReadMem, bool WriteMem) : MemSDNode(Opc, dl, VTs, Ops, NumOps, MemoryVT, srcValue, SVO, Align, Vol), ReadMem(ReadMem), WriteMem(WriteMem) { @@ -1683,7 +1683,7 @@ class ShuffleVectorSDNode : public SDNode { const int *Mask; protected: friend class SelectionDAG; - ShuffleVectorSDNode(MVT VT, DebugLoc dl, SDValue N1, SDValue N2, + ShuffleVectorSDNode(EVT VT, DebugLoc dl, SDValue N1, SDValue N2, const int *M) : SDNode(ISD::VECTOR_SHUFFLE, dl, getSDVTList(VT)), Mask(M) { InitOperands(Ops, N1, N2); @@ -1691,7 +1691,7 @@ protected: public: void getMask(SmallVectorImpl<int> &M) const { - MVT VT = getValueType(0); + EVT VT = getValueType(0); M.clear(); for (unsigned i = 0, e = VT.getVectorNumElements(); i != e; ++i) M.push_back(Mask[i]); @@ -1706,7 +1706,7 @@ public: assert(isSplat() && "Cannot get splat index for non-splat!"); return Mask[0]; } - static bool isSplatMask(const int *Mask, MVT VT); + static bool isSplatMask(const int *Mask, EVT VT); static bool classof(const ShuffleVectorSDNode *) { return true; } static bool classof(const SDNode *N) { @@ -1717,7 +1717,7 @@ public: class ConstantSDNode : public SDNode { const ConstantInt *Value; friend class SelectionDAG; - ConstantSDNode(bool isTarget, const ConstantInt *val, MVT VT) + ConstantSDNode(bool isTarget, const ConstantInt *val, EVT VT) : SDNode(isTarget ? ISD::TargetConstant : ISD::Constant, DebugLoc::getUnknownLoc(), getSDVTList(VT)), Value(val) { } @@ -1741,7 +1741,7 @@ public: class ConstantFPSDNode : public SDNode { const ConstantFP *Value; friend class SelectionDAG; - ConstantFPSDNode(bool isTarget, const ConstantFP *val, MVT VT) + ConstantFPSDNode(bool isTarget, const ConstantFP *val, EVT VT) : SDNode(isTarget ? ISD::TargetConstantFP : ISD::ConstantFP, DebugLoc::getUnknownLoc(), getSDVTList(VT)), Value(val) { } @@ -1770,7 +1770,7 @@ public: } bool isExactlyValue(const APFloat& V) const; - bool isValueValidForType(MVT VT, const APFloat& Val); + bool isValueValidForType(EVT VT, const APFloat& Val); static bool classof(const ConstantFPSDNode *) { return true; } static bool classof(const SDNode *N) { @@ -1784,7 +1784,7 @@ class GlobalAddressSDNode : public SDNode { int64_t Offset; unsigned char TargetFlags; friend class SelectionDAG; - GlobalAddressSDNode(unsigned Opc, const GlobalValue *GA, MVT VT, + GlobalAddressSDNode(unsigned Opc, const GlobalValue *GA, EVT VT, int64_t o, unsigned char TargetFlags); public: @@ -1806,7 +1806,7 @@ public: class FrameIndexSDNode : public SDNode { int FI; friend class SelectionDAG; - FrameIndexSDNode(int fi, MVT VT, bool isTarg) + FrameIndexSDNode(int fi, EVT VT, bool isTarg) : SDNode(isTarg ? ISD::TargetFrameIndex : ISD::FrameIndex, DebugLoc::getUnknownLoc(), getSDVTList(VT)), FI(fi) { } @@ -1825,7 +1825,7 @@ class JumpTableSDNode : public SDNode { int JTI; unsigned char TargetFlags; friend class SelectionDAG; - JumpTableSDNode(int jti, MVT VT, bool isTarg, unsigned char TF) + JumpTableSDNode(int jti, EVT VT, bool isTarg, unsigned char TF) : SDNode(isTarg ? ISD::TargetJumpTable : ISD::JumpTable, DebugLoc::getUnknownLoc(), getSDVTList(VT)), JTI(jti), TargetFlags(TF) { } @@ -1850,7 +1850,7 @@ class ConstantPoolSDNode : public SDNode { unsigned Alignment; // Minimum alignment requirement of CP (not log2 value). unsigned char TargetFlags; friend class SelectionDAG; - ConstantPoolSDNode(bool isTarget, Constant *c, MVT VT, int o, unsigned Align, + ConstantPoolSDNode(bool isTarget, Constant *c, EVT VT, int o, unsigned Align, unsigned char TF) : SDNode(isTarget ? ISD::TargetConstantPool : ISD::ConstantPool, DebugLoc::getUnknownLoc(), @@ -1859,7 +1859,7 @@ class ConstantPoolSDNode : public SDNode { Val.ConstVal = c; } ConstantPoolSDNode(bool isTarget, MachineConstantPoolValue *v, - MVT VT, int o, unsigned Align, unsigned char TF) + EVT VT, int o, unsigned Align, unsigned char TF) : SDNode(isTarget ? ISD::TargetConstantPool : ISD::ConstantPool, DebugLoc::getUnknownLoc(), getSDVTList(VT)), Offset(o), Alignment(Align), TargetFlags(TF) { @@ -1910,7 +1910,7 @@ class BasicBlockSDNode : public SDNode { /// harder. Let's see if we need it first. explicit BasicBlockSDNode(MachineBasicBlock *mbb) : SDNode(ISD::BasicBlock, DebugLoc::getUnknownLoc(), - getSDVTList(MVT::Other)), MBB(mbb) { + getSDVTList(EVT::Other)), MBB(mbb) { } public: @@ -1961,7 +1961,7 @@ class SrcValueSDNode : public SDNode { /// Create a SrcValue for a general value. explicit SrcValueSDNode(const Value *v) : SDNode(ISD::SRCVALUE, DebugLoc::getUnknownLoc(), - getSDVTList(MVT::Other)), V(v) {} + getSDVTList(EVT::Other)), V(v) {} public: /// getValue - return the contained Value. @@ -1983,7 +1983,7 @@ class MemOperandSDNode : public SDNode { /// Create a MachineMemOperand node explicit MemOperandSDNode(const MachineMemOperand &mo) : SDNode(ISD::MEMOPERAND, DebugLoc::getUnknownLoc(), - getSDVTList(MVT::Other)), MO(mo) {} + getSDVTList(EVT::Other)), MO(mo) {} public: /// MO - The contained MachineMemOperand. @@ -1999,7 +1999,7 @@ public: class RegisterSDNode : public SDNode { unsigned Reg; friend class SelectionDAG; - RegisterSDNode(unsigned reg, MVT VT) + RegisterSDNode(unsigned reg, EVT VT) : SDNode(ISD::Register, DebugLoc::getUnknownLoc(), getSDVTList(VT)), Reg(reg) { } @@ -2022,7 +2022,7 @@ class DbgStopPointSDNode : public SDNode { DbgStopPointSDNode(SDValue ch, unsigned l, unsigned c, Value *cu) : SDNode(ISD::DBG_STOPPOINT, DebugLoc::getUnknownLoc(), - getSDVTList(MVT::Other)), Line(l), Column(c), CU(cu) { + getSDVTList(EVT::Other)), Line(l), Column(c), CU(cu) { InitOperands(&Chain, ch); } public: @@ -2041,7 +2041,7 @@ class LabelSDNode : public SDNode { unsigned LabelID; friend class SelectionDAG; LabelSDNode(unsigned NodeTy, DebugLoc dl, SDValue ch, unsigned id) - : SDNode(NodeTy, dl, getSDVTList(MVT::Other)), LabelID(id) { + : SDNode(NodeTy, dl, getSDVTList(EVT::Other)), LabelID(id) { InitOperands(&Chain, ch); } public: @@ -2059,7 +2059,7 @@ class ExternalSymbolSDNode : public SDNode { unsigned char TargetFlags; friend class SelectionDAG; - ExternalSymbolSDNode(bool isTarget, const char *Sym, unsigned char TF, MVT VT) + ExternalSymbolSDNode(bool isTarget, const char *Sym, unsigned char TF, EVT VT) : SDNode(isTarget ? ISD::TargetExternalSymbol : ISD::ExternalSymbol, DebugLoc::getUnknownLoc(), getSDVTList(VT)), Symbol(Sym), TargetFlags(TF) { @@ -2081,7 +2081,7 @@ class CondCodeSDNode : public SDNode { friend class SelectionDAG; explicit CondCodeSDNode(ISD::CondCode Cond) : SDNode(ISD::CONDCODE, DebugLoc::getUnknownLoc(), - getSDVTList(MVT::Other)), Condition(Cond) { + getSDVTList(EVT::Other)), Condition(Cond) { } public: @@ -2098,7 +2098,7 @@ public: class CvtRndSatSDNode : public SDNode { ISD::CvtCode CvtCode; friend class SelectionDAG; - explicit CvtRndSatSDNode(MVT VT, DebugLoc dl, const SDValue *Ops, + explicit CvtRndSatSDNode(EVT VT, DebugLoc dl, const SDValue *Ops, unsigned NumOps, ISD::CvtCode Code) : SDNode(ISD::CONVERT_RNDSAT, dl, getSDVTList(VT), Ops, NumOps), CvtCode(Code) { @@ -2203,11 +2203,11 @@ namespace ISD { /// struct InputArg { ArgFlagsTy Flags; - MVT VT; + EVT VT; bool Used; - InputArg() : VT(MVT::Other), Used(false) {} - InputArg(ISD::ArgFlagsTy flags, MVT vt, bool used) + InputArg() : VT(EVT::Other), Used(false) {} + InputArg(ISD::ArgFlagsTy flags, EVT vt, bool used) : Flags(flags), VT(vt), Used(used) { assert(VT.isSimple() && "InputArg value type must be Simple!"); @@ -2232,18 +2232,18 @@ namespace ISD { }; } -/// VTSDNode - This class is used to represent MVT's, which are used +/// VTSDNode - This class is used to represent EVT's, which are used /// to parameterize some operations. class VTSDNode : public SDNode { - MVT ValueType; + EVT ValueType; friend class SelectionDAG; - explicit VTSDNode(MVT VT) + explicit VTSDNode(EVT VT) : SDNode(ISD::VALUETYPE, DebugLoc::getUnknownLoc(), - getSDVTList(MVT::Other)), ValueType(VT) { + getSDVTList(EVT::Other)), ValueType(VT) { } public: - MVT getVT() const { return ValueType; } + EVT getVT() const { return ValueType; } static bool classof(const VTSDNode *) { return true; } static bool classof(const SDNode *N) { @@ -2264,7 +2264,7 @@ class LSBaseSDNode : public MemSDNode { public: LSBaseSDNode(ISD::NodeType NodeTy, DebugLoc dl, SDValue *Operands, unsigned numOperands, SDVTList VTs, ISD::MemIndexedMode AM, - MVT VT, const Value *SV, int SVO, unsigned Align, bool Vol) + EVT VT, const Value *SV, int SVO, unsigned Align, bool Vol) : MemSDNode(NodeTy, dl, VTs, VT, SV, SVO, Align, Vol) { assert(Align != 0 && "Loads and stores should have non-zero aligment"); SubclassData |= AM << 2; @@ -2302,7 +2302,7 @@ public: class LoadSDNode : public LSBaseSDNode { friend class SelectionDAG; LoadSDNode(SDValue *ChainPtrOff, DebugLoc dl, SDVTList VTs, - ISD::MemIndexedMode AM, ISD::LoadExtType ETy, MVT LVT, + ISD::MemIndexedMode AM, ISD::LoadExtType ETy, EVT LVT, const Value *SV, int O=0, unsigned Align=0, bool Vol=false) : LSBaseSDNode(ISD::LOAD, dl, ChainPtrOff, 3, VTs, AM, LVT, SV, O, Align, Vol) { @@ -2331,7 +2331,7 @@ public: class StoreSDNode : public LSBaseSDNode { friend class SelectionDAG; StoreSDNode(SDValue *ChainValuePtrOff, DebugLoc dl, SDVTList VTs, - ISD::MemIndexedMode AM, bool isTrunc, MVT SVT, + ISD::MemIndexedMode AM, bool isTrunc, EVT SVT, const Value *SV, int O=0, unsigned Align=0, bool Vol=false) : LSBaseSDNode(ISD::STORE, dl, ChainValuePtrOff, 4, VTs, AM, SVT, SV, O, Align, Vol) { diff --git a/include/llvm/CodeGen/ValueTypes.h b/include/llvm/CodeGen/ValueTypes.h index 7ba6572..a77ed50 100644 --- a/include/llvm/CodeGen/ValueTypes.h +++ b/include/llvm/CodeGen/ValueTypes.h @@ -25,7 +25,7 @@ namespace llvm { class Type; struct LLVMContext; - struct MVT { // MVT = Machine Value Type + struct EVT { // EVT = Machine Value Type public: enum SimpleValueType { // If you change this numbering, you must change the values in @@ -78,7 +78,7 @@ namespace llvm { LAST_VALUETYPE = 34, // This always remains at the end of the list. // This is the current maximum for LAST_VALUETYPE. - // MVT::MAX_ALLOWED_VALUETYPE is used for asserts and to size bit vectors + // EVT::MAX_ALLOWED_VALUETYPE is used for asserts and to size bit vectors // This value must be a multiple of 32. MAX_ALLOWED_VALUETYPE = 64, @@ -111,7 +111,7 @@ namespace llvm { private: /// This union holds low-level value types. Valid values include any of /// the values in the SimpleValueType enum, or any value returned from one - /// of the MVT methods. Any value type equal to one of the SimpleValueType + /// of the EVT methods. Any value type equal to one of the SimpleValueType /// enum values is a "simple" value type. All others are "extended". /// /// Note that simple doesn't necessary mean legal for the target machine. @@ -124,20 +124,20 @@ namespace llvm { }; public: - MVT() {} - MVT(SimpleValueType S) : V(S) {} + EVT() {} + EVT(SimpleValueType S) : V(S) {} - bool operator==(const MVT VT) const { + bool operator==(const EVT VT) const { return getRawBits() == VT.getRawBits(); } - bool operator!=(const MVT VT) const { + bool operator!=(const EVT VT) const { return getRawBits() != VT.getRawBits(); } - /// getFloatingPointVT - Returns the MVT that represents a floating point + /// getFloatingPointVT - Returns the EVT that represents a floating point /// type with the given number of bits. There are two floating point types /// with 128 bits - this returns f128 rather than ppcf128. - static MVT getFloatingPointVT(unsigned BitWidth) { + static EVT getFloatingPointVT(unsigned BitWidth) { switch (BitWidth) { default: assert(false && "Bad bit width!"); @@ -152,9 +152,9 @@ namespace llvm { } } - /// getIntegerVT - Returns the MVT that represents an integer with the given + /// getIntegerVT - Returns the EVT that represents an integer with the given /// number of bits. - static MVT getIntegerVT(unsigned BitWidth) { + static EVT getIntegerVT(unsigned BitWidth) { switch (BitWidth) { default: break; @@ -174,9 +174,9 @@ namespace llvm { return getExtendedIntegerVT(BitWidth); } - /// getVectorVT - Returns the MVT that represents a vector NumElements in + /// getVectorVT - Returns the EVT that represents a vector NumElements in /// length, where each element is of type VT. - static MVT getVectorVT(MVT VT, unsigned NumElements) { + static EVT getVectorVT(EVT VT, unsigned NumElements) { switch (VT.V) { default: break; @@ -218,7 +218,7 @@ namespace llvm { /// getIntVectorWithNumElements - Return any integer vector type that has /// the specified number of elements. - static MVT getIntVectorWithNumElements(unsigned NumElts) { + static EVT getIntVectorWithNumElements(unsigned NumElts) { switch (NumElts) { default: return getVectorVT(i8, NumElts); case 1: return v1i64; @@ -229,13 +229,13 @@ namespace llvm { } } - /// isSimple - Test if the given MVT is simple (as opposed to being + /// isSimple - Test if the given EVT is simple (as opposed to being /// extended). bool isSimple() const { return V <= LastSimpleValueType; } - /// isExtended - Test if the given MVT is extended (as opposed to + /// isExtended - Test if the given EVT is extended (as opposed to /// being simple). bool isExtended() const { return !isSimple(); @@ -296,33 +296,33 @@ namespace llvm { } /// bitsEq - Return true if this has the same number of bits as VT. - bool bitsEq(MVT VT) const { + bool bitsEq(EVT VT) const { return getSizeInBits() == VT.getSizeInBits(); } /// bitsGT - Return true if this has more bits than VT. - bool bitsGT(MVT VT) const { + bool bitsGT(EVT VT) const { return getSizeInBits() > VT.getSizeInBits(); } /// bitsGE - Return true if this has no less bits than VT. - bool bitsGE(MVT VT) const { + bool bitsGE(EVT VT) const { return getSizeInBits() >= VT.getSizeInBits(); } /// bitsLT - Return true if this has less bits than VT. - bool bitsLT(MVT VT) const { + bool bitsLT(EVT VT) const { return getSizeInBits() < VT.getSizeInBits(); } /// bitsLE - Return true if this has no more bits than VT. - bool bitsLE(MVT VT) const { + bool bitsLE(EVT VT) const { return getSizeInBits() <= VT.getSizeInBits(); } /// getSimpleVT - Return the SimpleValueType held in the specified - /// simple MVT. + /// simple EVT. SimpleValueType getSimpleVT() const { assert(isSimple() && "Expected a SimpleValueType!"); return SimpleValueType(V); @@ -330,7 +330,7 @@ namespace llvm { /// getVectorElementType - Given a vector type, return the type of /// each element. - MVT getVectorElementType() const { + EVT getVectorElementType() const { assert(isVector() && "Invalid vector type!"); switch (V) { default: @@ -439,10 +439,10 @@ namespace llvm { return (getSizeInBits() + 7)/8*8; } - /// getRoundIntegerType - Rounds the bit-width of the given integer MVT up + /// getRoundIntegerType - Rounds the bit-width of the given integer EVT up /// to the nearest power of two (and at least to eight), and returns the - /// integer MVT with that number of bits. - MVT getRoundIntegerType() const { + /// integer EVT with that number of bits. + EVT getRoundIntegerType() const { assert(isInteger() && !isVector() && "Invalid integer type!"); unsigned BitWidth = getSizeInBits(); if (BitWidth <= 8) @@ -457,32 +457,32 @@ namespace llvm { return !(NElts & (NElts - 1)); } - /// getPow2VectorType - Widens the length of the given vector MVT up to + /// getPow2VectorType - Widens the length of the given vector EVT up to /// the nearest power of 2 and returns that type. - MVT getPow2VectorType() const { + EVT getPow2VectorType() const { if (!isPow2VectorType()) { unsigned NElts = getVectorNumElements(); unsigned Pow2NElts = 1 << Log2_32_Ceil(NElts); - return MVT::getVectorVT(getVectorElementType(), Pow2NElts); + return EVT::getVectorVT(getVectorElementType(), Pow2NElts); } else { return *this; } } - /// getMVTString - This function returns value type as a string, + /// getEVTString - This function returns value type as a string, /// e.g. "i32". - std::string getMVTString() const; + std::string getEVTString() const; - /// getTypeForMVT - This method returns an LLVM type corresponding to the - /// specified MVT. For integer types, this returns an unsigned type. Note + /// getTypeForEVT - This method returns an LLVM type corresponding to the + /// specified EVT. For integer types, this returns an unsigned type. Note /// that this will abort for types that cannot be represented. - const Type *getTypeForMVT() const; + const Type *getTypeForEVT() const; - /// getMVT - Return the value type corresponding to the specified type. + /// getEVT - Return the value type corresponding to the specified type. /// This returns all pointers as iPTR. If HandleUnknown is true, unknown /// types are returned as Other, otherwise they are invalid. - static MVT getMVT(const Type *Ty, bool HandleUnknown = false); + static EVT getEVT(const Type *Ty, bool HandleUnknown = false); /// getRawBits - Represent the type as a bunch of bits. uintptr_t getRawBits() const { return V; } @@ -490,7 +490,7 @@ namespace llvm { /// compareRawBits - A meaningless but well-behaved order, useful for /// constructing containers. struct compareRawBits { - bool operator()(MVT L, MVT R) const { + bool operator()(EVT L, EVT R) const { return L.getRawBits() < R.getRawBits(); } }; @@ -499,15 +499,15 @@ namespace llvm { // Methods for handling the Extended-type case in functions above. // These are all out-of-line to prevent users of this header file // from having a dependency on Type.h. - static MVT getExtendedIntegerVT(unsigned BitWidth); - static MVT getExtendedVectorVT(MVT VT, unsigned NumElements); + static EVT getExtendedIntegerVT(unsigned BitWidth); + static EVT getExtendedVectorVT(EVT VT, unsigned NumElements); bool isExtendedFloatingPoint() const; bool isExtendedInteger() const; bool isExtendedVector() const; bool isExtended64BitVector() const; bool isExtended128BitVector() const; bool isExtended256BitVector() const; - MVT getExtendedVectorElementType() const; + EVT getExtendedVectorElementType() const; unsigned getExtendedVectorNumElements() const; unsigned getExtendedSizeInBits() const; }; diff --git a/include/llvm/Target/TargetLowering.h b/include/llvm/Target/TargetLowering.h index 46b6320..aa3a651 100644 --- a/include/llvm/Target/TargetLowering.h +++ b/include/llvm/Target/TargetLowering.h @@ -111,8 +111,8 @@ public: bool isBigEndian() const { return !IsLittleEndian; } bool isLittleEndian() const { return IsLittleEndian; } - MVT::SimpleValueType getPointerTy() const { return PointerTy; } - MVT::SimpleValueType getShiftAmountTy() const { return ShiftAmountTy; } + EVT::SimpleValueType getPointerTy() const { return PointerTy; } + EVT::SimpleValueType getShiftAmountTy() const { return ShiftAmountTy; } /// usesGlobalOffsetTable - Return true if this target uses a GOT for PIC /// codegen. @@ -133,10 +133,10 @@ public: /// getSetCCResultType - Return the ValueType of the result of SETCC /// operations. Also used to obtain the target's preferred type for /// the condition operand of SELECT and BRCOND nodes. In the case of - /// BRCOND the argument passed is MVT::Other since there are no other + /// BRCOND the argument passed is EVT::Other since there are no other /// operands to get a type hint from. virtual - MVT::SimpleValueType getSetCCResultType(MVT VT) const; + EVT::SimpleValueType getSetCCResultType(EVT VT) const; /// getBooleanContents - For targets without i1 registers, this gives the /// nature of the high-bits of boolean values held in types wider than i1. @@ -152,7 +152,7 @@ public: /// getRegClassFor - Return the register class that should be used for the /// specified value type. This may only be called on legal types. - TargetRegisterClass *getRegClassFor(MVT VT) const { + TargetRegisterClass *getRegClassFor(EVT VT) const { assert(VT.isSimple() && "getRegClassFor called on illegal type!"); TargetRegisterClass *RC = RegClassForVT[VT.getSimpleVT()]; assert(RC && "This value type is not natively supported!"); @@ -162,7 +162,7 @@ public: /// isTypeLegal - Return true if the target has native support for the /// specified value type. This means that it has a register that directly /// holds it without promotions or expansions. - bool isTypeLegal(MVT VT) const { + bool isTypeLegal(EVT VT) const { assert(!VT.isSimple() || (unsigned)VT.getSimpleVT() < array_lengthof(RegClassForVT)); return VT.isSimple() && RegClassForVT[VT.getSimpleVT()] != 0; @@ -172,8 +172,8 @@ public: /// ValueTypeActions - This is a bitvector that contains two bits for each /// value type, where the two bits correspond to the LegalizeAction enum. /// This can be queried with "getTypeAction(VT)". - /// dimension by (MVT::MAX_ALLOWED_VALUETYPE/32) * 2 - uint32_t ValueTypeActions[(MVT::MAX_ALLOWED_VALUETYPE/32)*2]; + /// dimension by (EVT::MAX_ALLOWED_VALUETYPE/32) * 2 + uint32_t ValueTypeActions[(EVT::MAX_ALLOWED_VALUETYPE/32)*2]; public: ValueTypeActionImpl() { ValueTypeActions[0] = ValueTypeActions[1] = 0; @@ -186,7 +186,7 @@ public: ValueTypeActions[3] = RHS.ValueTypeActions[3]; } - LegalizeAction getTypeAction(MVT VT) const { + LegalizeAction getTypeAction(EVT VT) const { if (VT.isExtended()) { if (VT.isVector()) { return VT.isPow2VectorType() ? Expand : Promote; @@ -201,7 +201,7 @@ public: assert(I<4*array_lengthof(ValueTypeActions)*sizeof(ValueTypeActions[0])); return (LegalizeAction)((ValueTypeActions[I>>4] >> ((2*I) & 31)) & 3); } - void setTypeAction(MVT VT, LegalizeAction Action) { + void setTypeAction(EVT VT, LegalizeAction Action) { unsigned I = VT.getSimpleVT(); assert(I<4*array_lengthof(ValueTypeActions)*sizeof(ValueTypeActions[0])); ValueTypeActions[I>>4] |= Action << ((I*2) & 31); @@ -216,7 +216,7 @@ public: /// it is already legal (return 'Legal') or we need to promote it to a larger /// type (return 'Promote'), or we need to expand it into multiple registers /// of smaller integer type (return 'Expand'). 'Custom' is not an option. - LegalizeAction getTypeAction(MVT VT) const { + LegalizeAction getTypeAction(EVT VT) const { return ValueTypeActions.getTypeAction(VT); } @@ -226,43 +226,43 @@ public: /// than the largest integer register, this contains one step in the expansion /// to get to the smaller register. For illegal floating point types, this /// returns the integer type to transform to. - MVT getTypeToTransformTo(MVT VT) const { + EVT getTypeToTransformTo(EVT VT) const { if (VT.isSimple()) { assert((unsigned)VT.getSimpleVT() < array_lengthof(TransformToType)); - MVT NVT = TransformToType[VT.getSimpleVT()]; + EVT NVT = TransformToType[VT.getSimpleVT()]; assert(getTypeAction(NVT) != Promote && "Promote may not follow Expand or Promote"); return NVT; } if (VT.isVector()) { - MVT NVT = VT.getPow2VectorType(); + EVT NVT = VT.getPow2VectorType(); if (NVT == VT) { // Vector length is a power of 2 - split to half the size. unsigned NumElts = VT.getVectorNumElements(); - MVT EltVT = VT.getVectorElementType(); - return (NumElts == 1) ? EltVT : MVT::getVectorVT(EltVT, NumElts / 2); + EVT EltVT = VT.getVectorElementType(); + return (NumElts == 1) ? EltVT : EVT::getVectorVT(EltVT, NumElts / 2); } // Promote to a power of two size, avoiding multi-step promotion. return getTypeAction(NVT) == Promote ? getTypeToTransformTo(NVT) : NVT; } else if (VT.isInteger()) { - MVT NVT = VT.getRoundIntegerType(); + EVT NVT = VT.getRoundIntegerType(); if (NVT == VT) // Size is a power of two - expand to half the size. - return MVT::getIntegerVT(VT.getSizeInBits() / 2); + return EVT::getIntegerVT(VT.getSizeInBits() / 2); else // Promote to a power of two size, avoiding multi-step promotion. return getTypeAction(NVT) == Promote ? getTypeToTransformTo(NVT) : NVT; } assert(0 && "Unsupported extended type!"); - return MVT(MVT::Other); // Not reached + return EVT(EVT::Other); // Not reached } /// getTypeToExpandTo - For types supported by the target, this is an /// identity function. For types that must be expanded (i.e. integer types /// that are larger than the largest integer register or illegal floating /// point types), this returns the largest legal type it will be expanded to. - MVT getTypeToExpandTo(MVT VT) const { + EVT getTypeToExpandTo(EVT VT) const { assert(!VT.isVector()); while (true) { switch (getTypeAction(VT)) { @@ -280,18 +280,18 @@ public: } /// getVectorTypeBreakdown - Vector types are broken down into some number of - /// legal first class types. For example, MVT::v8f32 maps to 2 MVT::v4f32 - /// with Altivec or SSE1, or 8 promoted MVT::f64 values with the X86 FP stack. - /// Similarly, MVT::v2i64 turns into 4 MVT::i32 values with both PPC and X86. + /// legal first class types. For example, EVT::v8f32 maps to 2 EVT::v4f32 + /// with Altivec or SSE1, or 8 promoted EVT::f64 values with the X86 FP stack. + /// Similarly, EVT::v2i64 turns into 4 EVT::i32 values with both PPC and X86. /// /// This method returns the number of registers needed, and the VT for each /// register. It also returns the VT and quantity of the intermediate values /// before they are promoted/expanded. /// - unsigned getVectorTypeBreakdown(MVT VT, - MVT &IntermediateVT, + unsigned getVectorTypeBreakdown(EVT VT, + EVT &IntermediateVT, unsigned &NumIntermediates, - MVT &RegisterVT) const; + EVT &RegisterVT) const; /// getTgtMemIntrinsic: Given an intrinsic, checks if on the target the /// intrinsic will need to map to a MemIntrinsicNode (touches memory). If @@ -299,7 +299,7 @@ public: /// information into the IntrinsicInfo that was passed to the function. typedef struct IntrinsicInfo { unsigned opc; // target opcode - MVT memVT; // memory VT + EVT memVT; // memory VT const Value* ptrVal; // value representing memory location int offset; // offset off of ptrVal unsigned align; // alignment @@ -315,10 +315,10 @@ public: /// getWidenVectorType: given a vector type, returns the type to widen to /// (e.g., v7i8 to v8i8). If the vector type is legal, it returns itself. - /// If there is no vector type that we want to widen to, returns MVT::Other + /// If there is no vector type that we want to widen to, returns EVT::Other /// When and were to widen is target dependent based on the cost of /// scalarizing vs using the wider vector type. - virtual MVT getWidenVectorType(MVT VT) const; + virtual EVT getWidenVectorType(EVT VT) const; typedef std::vector<APFloat>::const_iterator legal_fpimm_iterator; legal_fpimm_iterator legal_fpimm_begin() const { @@ -333,7 +333,7 @@ public: /// By default, if a target supports the VECTOR_SHUFFLE node, all mask values /// are assumed to be legal. virtual bool isShuffleMaskLegal(const SmallVectorImpl<int> &Mask, - MVT VT) const { + EVT VT) const { return true; } @@ -342,7 +342,7 @@ public: /// VECTOR_SHUFFLE that can be used to replace a VAND with a constant /// pool entry. virtual bool isVectorClearMaskLegal(const SmallVectorImpl<int> &Mask, - MVT VT) const { + EVT VT) const { return false; } @@ -350,7 +350,7 @@ public: /// it is legal, needs to be promoted to a larger size, needs to be /// expanded to some other code sequence, or the target has a custom expander /// for it. - LegalizeAction getOperationAction(unsigned Op, MVT VT) const { + LegalizeAction getOperationAction(unsigned Op, EVT VT) const { if (VT.isExtended()) return Expand; assert(Op < array_lengthof(OpActions[0]) && (unsigned)VT.getSimpleVT() < sizeof(OpActions[0][0])*8 && @@ -364,16 +364,16 @@ public: /// isOperationLegalOrCustom - Return true if the specified operation is /// legal on this target or can be made legal with custom lowering. This /// is used to help guide high-level lowering decisions. - bool isOperationLegalOrCustom(unsigned Op, MVT VT) const { - return (VT == MVT::Other || isTypeLegal(VT)) && + bool isOperationLegalOrCustom(unsigned Op, EVT VT) const { + return (VT == EVT::Other || isTypeLegal(VT)) && (getOperationAction(Op, VT) == Legal || getOperationAction(Op, VT) == Custom); } /// isOperationLegal - Return true if the specified operation is legal on this /// target. - bool isOperationLegal(unsigned Op, MVT VT) const { - return (VT == MVT::Other || isTypeLegal(VT)) && + bool isOperationLegal(unsigned Op, EVT VT) const { + return (VT == EVT::Other || isTypeLegal(VT)) && getOperationAction(Op, VT) == Legal; } @@ -381,7 +381,7 @@ public: /// either it is legal, needs to be promoted to a larger size, needs to be /// expanded to some other code sequence, or the target has a custom expander /// for it. - LegalizeAction getLoadExtAction(unsigned LType, MVT VT) const { + LegalizeAction getLoadExtAction(unsigned LType, EVT VT) const { assert(LType < array_lengthof(LoadExtActions) && (unsigned)VT.getSimpleVT() < sizeof(LoadExtActions[0])*4 && "Table isn't big enough!"); @@ -390,7 +390,7 @@ public: /// isLoadExtLegal - Return true if the specified load with extension is legal /// on this target. - bool isLoadExtLegal(unsigned LType, MVT VT) const { + bool isLoadExtLegal(unsigned LType, EVT VT) const { return VT.isSimple() && (getLoadExtAction(LType, VT) == Legal || getLoadExtAction(LType, VT) == Custom); @@ -400,8 +400,8 @@ public: /// treated: either it is legal, needs to be promoted to a larger size, needs /// to be expanded to some other code sequence, or the target has a custom /// expander for it. - LegalizeAction getTruncStoreAction(MVT ValVT, - MVT MemVT) const { + LegalizeAction getTruncStoreAction(EVT ValVT, + EVT MemVT) const { assert((unsigned)ValVT.getSimpleVT() < array_lengthof(TruncStoreActions) && (unsigned)MemVT.getSimpleVT() < sizeof(TruncStoreActions[0])*4 && "Table isn't big enough!"); @@ -411,7 +411,7 @@ public: /// isTruncStoreLegal - Return true if the specified store with truncation is /// legal on this target. - bool isTruncStoreLegal(MVT ValVT, MVT MemVT) const { + bool isTruncStoreLegal(EVT ValVT, EVT MemVT) const { return isTypeLegal(ValVT) && MemVT.isSimple() && (getTruncStoreAction(ValVT, MemVT) == Legal || getTruncStoreAction(ValVT, MemVT) == Custom); @@ -422,16 +422,16 @@ public: /// expanded to some other code sequence, or the target has a custom expander /// for it. LegalizeAction - getIndexedLoadAction(unsigned IdxMode, MVT VT) const { + getIndexedLoadAction(unsigned IdxMode, EVT VT) const { assert( IdxMode < array_lengthof(IndexedModeActions[0][0]) && - ((unsigned)VT.getSimpleVT()) < MVT::LAST_VALUETYPE && + ((unsigned)VT.getSimpleVT()) < EVT::LAST_VALUETYPE && "Table isn't big enough!"); return (LegalizeAction)((IndexedModeActions[(unsigned)VT.getSimpleVT()][0][IdxMode])); } /// isIndexedLoadLegal - Return true if the specified indexed load is legal /// on this target. - bool isIndexedLoadLegal(unsigned IdxMode, MVT VT) const { + bool isIndexedLoadLegal(unsigned IdxMode, EVT VT) const { return VT.isSimple() && (getIndexedLoadAction(IdxMode, VT) == Legal || getIndexedLoadAction(IdxMode, VT) == Custom); @@ -442,16 +442,16 @@ public: /// expanded to some other code sequence, or the target has a custom expander /// for it. LegalizeAction - getIndexedStoreAction(unsigned IdxMode, MVT VT) const { + getIndexedStoreAction(unsigned IdxMode, EVT VT) const { assert(IdxMode < array_lengthof(IndexedModeActions[0][1]) && - (unsigned)VT.getSimpleVT() < MVT::LAST_VALUETYPE && + (unsigned)VT.getSimpleVT() < EVT::LAST_VALUETYPE && "Table isn't big enough!"); return (LegalizeAction)((IndexedModeActions[(unsigned)VT.getSimpleVT()][1][IdxMode])); } /// isIndexedStoreLegal - Return true if the specified indexed load is legal /// on this target. - bool isIndexedStoreLegal(unsigned IdxMode, MVT VT) const { + bool isIndexedStoreLegal(unsigned IdxMode, EVT VT) const { return VT.isSimple() && (getIndexedStoreAction(IdxMode, VT) == Legal || getIndexedStoreAction(IdxMode, VT) == Custom); @@ -462,7 +462,7 @@ public: /// expanded to some other code sequence, or the target has a custom expander /// for it. LegalizeAction - getConvertAction(MVT FromVT, MVT ToVT) const { + getConvertAction(EVT FromVT, EVT ToVT) const { assert((unsigned)FromVT.getSimpleVT() < array_lengthof(ConvertActions) && (unsigned)ToVT.getSimpleVT() < sizeof(ConvertActions[0])*4 && "Table isn't big enough!"); @@ -472,7 +472,7 @@ public: /// isConvertLegal - Return true if the specified conversion is legal /// on this target. - bool isConvertLegal(MVT FromVT, MVT ToVT) const { + bool isConvertLegal(EVT FromVT, EVT ToVT) const { return isTypeLegal(FromVT) && isTypeLegal(ToVT) && (getConvertAction(FromVT, ToVT) == Legal || getConvertAction(FromVT, ToVT) == Custom); @@ -482,7 +482,7 @@ public: /// either it is legal, needs to be expanded to some other code sequence, /// or the target has a custom expander for it. LegalizeAction - getCondCodeAction(ISD::CondCode CC, MVT VT) const { + getCondCodeAction(ISD::CondCode CC, EVT VT) const { assert((unsigned)CC < array_lengthof(CondCodeActions) && (unsigned)VT.getSimpleVT() < sizeof(CondCodeActions[0])*4 && "Table isn't big enough!"); @@ -494,7 +494,7 @@ public: /// isCondCodeLegal - Return true if the specified condition code is legal /// on this target. - bool isCondCodeLegal(ISD::CondCode CC, MVT VT) const { + bool isCondCodeLegal(ISD::CondCode CC, EVT VT) const { return getCondCodeAction(CC, VT) == Legal || getCondCodeAction(CC, VT) == Custom; } @@ -502,36 +502,36 @@ public: /// getTypeToPromoteTo - If the action for this operation is to promote, this /// method returns the ValueType to promote to. - MVT getTypeToPromoteTo(unsigned Op, MVT VT) const { + EVT getTypeToPromoteTo(unsigned Op, EVT VT) const { assert(getOperationAction(Op, VT) == Promote && "This operation isn't promoted!"); // See if this has an explicit type specified. - std::map<std::pair<unsigned, MVT::SimpleValueType>, - MVT::SimpleValueType>::const_iterator PTTI = + std::map<std::pair<unsigned, EVT::SimpleValueType>, + EVT::SimpleValueType>::const_iterator PTTI = PromoteToType.find(std::make_pair(Op, VT.getSimpleVT())); if (PTTI != PromoteToType.end()) return PTTI->second; assert((VT.isInteger() || VT.isFloatingPoint()) && "Cannot autopromote this type, add it with AddPromotedToType."); - MVT NVT = VT; + EVT NVT = VT; do { - NVT = (MVT::SimpleValueType)(NVT.getSimpleVT()+1); - assert(NVT.isInteger() == VT.isInteger() && NVT != MVT::isVoid && + NVT = (EVT::SimpleValueType)(NVT.getSimpleVT()+1); + assert(NVT.isInteger() == VT.isInteger() && NVT != EVT::isVoid && "Didn't find type to promote to!"); } while (!isTypeLegal(NVT) || getOperationAction(Op, NVT) == Promote); return NVT; } - /// getValueType - Return the MVT corresponding to this LLVM type. + /// getValueType - Return the EVT corresponding to this LLVM type. /// This is fixed by the LLVM operations except for the pointer size. If - /// AllowUnknown is true, this will return MVT::Other for types with no MVT + /// AllowUnknown is true, this will return EVT::Other for types with no EVT /// counterpart (e.g. structs), otherwise it will assert. - MVT getValueType(const Type *Ty, bool AllowUnknown = false) const { - MVT VT = MVT::getMVT(Ty, AllowUnknown); - return VT == MVT::iPTR ? PointerTy : VT; + EVT getValueType(const Type *Ty, bool AllowUnknown = false) const { + EVT VT = EVT::getEVT(Ty, AllowUnknown); + return VT == EVT::iPTR ? PointerTy : VT; } /// getByValTypeAlignment - Return the desired alignment for ByVal aggregate @@ -541,13 +541,13 @@ public: /// getRegisterType - Return the type of registers that this ValueType will /// eventually require. - MVT getRegisterType(MVT VT) const { + EVT getRegisterType(EVT VT) const { if (VT.isSimple()) { assert((unsigned)VT.getSimpleVT() < array_lengthof(RegisterTypeForVT)); return RegisterTypeForVT[VT.getSimpleVT()]; } if (VT.isVector()) { - MVT VT1, RegisterVT; + EVT VT1, RegisterVT; unsigned NumIntermediates; (void)getVectorTypeBreakdown(VT, VT1, NumIntermediates, RegisterVT); return RegisterVT; @@ -556,7 +556,7 @@ public: return getRegisterType(getTypeToTransformTo(VT)); } assert(0 && "Unsupported extended type!"); - return MVT(MVT::Other); // Not reached + return EVT(EVT::Other); // Not reached } /// getNumRegisters - Return the number of registers that this ValueType will @@ -565,13 +565,13 @@ public: /// into pieces. For types like i140, which are first promoted then expanded, /// it is the number of registers needed to hold all the bits of the original /// type. For an i140 on a 32 bit machine this means 5 registers. - unsigned getNumRegisters(MVT VT) const { + unsigned getNumRegisters(EVT VT) const { if (VT.isSimple()) { assert((unsigned)VT.getSimpleVT() < array_lengthof(NumRegistersForVT)); return NumRegistersForVT[VT.getSimpleVT()]; } if (VT.isVector()) { - MVT VT1, VT2; + EVT VT1, VT2; unsigned NumIntermediates; return getVectorTypeBreakdown(VT, VT1, NumIntermediates, VT2); } @@ -587,7 +587,7 @@ public: /// ShouldShrinkFPConstant - If true, then instruction selection should /// seek to shrink the FP constant of the specified type to a smaller type /// in order to save space and / or reduce runtime. - virtual bool ShouldShrinkFPConstant(MVT VT) const { return true; } + virtual bool ShouldShrinkFPConstant(EVT VT) const { return true; } /// hasTargetDAGCombine - If true, the target has custom DAG combine /// transformations that it can perform for the specified node. @@ -633,12 +633,12 @@ public: /// getOptimalMemOpType - Returns the target specific optimal type for load /// and store operations as a result of memset, memcpy, and memmove lowering. - /// It returns MVT::iAny if SelectionDAG should be responsible for + /// It returns EVT::iAny if SelectionDAG should be responsible for /// determining it. - virtual MVT getOptimalMemOpType(uint64_t Size, unsigned Align, + virtual EVT getOptimalMemOpType(uint64_t Size, unsigned Align, bool isSrcConst, bool isSrcStr, SelectionDAG &DAG) const { - return MVT::iAny; + return EVT::iAny; } /// usesUnderscoreSetJmp - Determine if we should use _setjmp or setjmp @@ -827,7 +827,7 @@ public: /// SimplifySetCC - Try to simplify a setcc built with the specified operands /// and cc. If it is unable to simplify it, return a null SDValue. - SDValue SimplifySetCC(MVT VT, SDValue N0, SDValue N1, + SDValue SimplifySetCC(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond, bool foldBooleans, DAGCombinerInfo &DCI, DebugLoc dl) const; @@ -869,7 +869,7 @@ protected: /// setShiftAmountType - Describe the type that should be used for shift /// amounts. This type defaults to the pointer type. - void setShiftAmountType(MVT::SimpleValueType VT) { ShiftAmountTy = VT; } + void setShiftAmountType(EVT::SimpleValueType VT) { ShiftAmountTy = VT; } /// setBooleanContents - Specify how the target extends the result of a /// boolean value from i1 to a wider type. See getBooleanContents. @@ -932,7 +932,7 @@ protected: /// addRegisterClass - Add the specified register class as an available /// regclass for the specified value type. This indicates the selector can /// handle values of that class natively. - void addRegisterClass(MVT VT, TargetRegisterClass *RC) { + void addRegisterClass(EVT VT, TargetRegisterClass *RC) { assert((unsigned)VT.getSimpleVT() < array_lengthof(RegClassForVT)); AvailableRegClasses.push_back(std::make_pair(VT, RC)); RegClassForVT[VT.getSimpleVT()] = RC; @@ -944,7 +944,7 @@ protected: /// setOperationAction - Indicate that the specified operation does not work /// with the specified type and indicate what to do about it. - void setOperationAction(unsigned Op, MVT::SimpleValueType VT, + void setOperationAction(unsigned Op, EVT::SimpleValueType VT, LegalizeAction Action) { unsigned I = (unsigned)VT; unsigned J = I & 31; @@ -955,7 +955,7 @@ protected: /// setLoadExtAction - Indicate that the specified load with extension does /// not work with the with specified type and indicate what to do about it. - void setLoadExtAction(unsigned ExtType, MVT::SimpleValueType VT, + void setLoadExtAction(unsigned ExtType, EVT::SimpleValueType VT, LegalizeAction Action) { assert((unsigned)VT < sizeof(LoadExtActions[0])*4 && ExtType < array_lengthof(LoadExtActions) && @@ -966,8 +966,8 @@ protected: /// setTruncStoreAction - Indicate that the specified truncating store does /// not work with the with specified type and indicate what to do about it. - void setTruncStoreAction(MVT::SimpleValueType ValVT, - MVT::SimpleValueType MemVT, + void setTruncStoreAction(EVT::SimpleValueType ValVT, + EVT::SimpleValueType MemVT, LegalizeAction Action) { assert((unsigned)ValVT < array_lengthof(TruncStoreActions) && (unsigned)MemVT < sizeof(TruncStoreActions[0])*4 && @@ -980,9 +980,9 @@ protected: /// does not work with the with specified type and indicate what to do abort /// it. NOTE: All indexed mode loads are initialized to Expand in /// TargetLowering.cpp - void setIndexedLoadAction(unsigned IdxMode, MVT::SimpleValueType VT, + void setIndexedLoadAction(unsigned IdxMode, EVT::SimpleValueType VT, LegalizeAction Action) { - assert((unsigned)VT < MVT::LAST_VALUETYPE && + assert((unsigned)VT < EVT::LAST_VALUETYPE && IdxMode < array_lengthof(IndexedModeActions[0][0]) && "Table isn't big enough!"); IndexedModeActions[(unsigned)VT][0][IdxMode] = (uint8_t)Action; @@ -992,9 +992,9 @@ protected: /// does not work with the with specified type and indicate what to do about /// it. NOTE: All indexed mode stores are initialized to Expand in /// TargetLowering.cpp - void setIndexedStoreAction(unsigned IdxMode, MVT::SimpleValueType VT, + void setIndexedStoreAction(unsigned IdxMode, EVT::SimpleValueType VT, LegalizeAction Action) { - assert((unsigned)VT < MVT::LAST_VALUETYPE && + assert((unsigned)VT < EVT::LAST_VALUETYPE && IdxMode < array_lengthof(IndexedModeActions[0][1] ) && "Table isn't big enough!"); IndexedModeActions[(unsigned)VT][1][IdxMode] = (uint8_t)Action; @@ -1002,7 +1002,7 @@ protected: /// setConvertAction - Indicate that the specified conversion does or does /// not work with the with specified type and indicate what to do about it. - void setConvertAction(MVT::SimpleValueType FromVT, MVT::SimpleValueType ToVT, + void setConvertAction(EVT::SimpleValueType FromVT, EVT::SimpleValueType ToVT, LegalizeAction Action) { assert((unsigned)FromVT < array_lengthof(ConvertActions) && (unsigned)ToVT < sizeof(ConvertActions[0])*4 && @@ -1013,7 +1013,7 @@ protected: /// setCondCodeAction - Indicate that the specified condition code is or isn't /// supported on the target and indicate what to do about it. - void setCondCodeAction(ISD::CondCode CC, MVT::SimpleValueType VT, + void setCondCodeAction(ISD::CondCode CC, EVT::SimpleValueType VT, LegalizeAction Action) { assert((unsigned)VT < sizeof(CondCodeActions[0])*4 && (unsigned)CC < array_lengthof(CondCodeActions) && @@ -1026,8 +1026,8 @@ protected: /// promotion code defaults to trying a larger integer/fp until it can find /// one that works. If that default is insufficient, this method can be used /// by the target to override the default. - void AddPromotedToType(unsigned Opc, MVT::SimpleValueType OrigVT, - MVT::SimpleValueType DestVT) { + void AddPromotedToType(unsigned Opc, EVT::SimpleValueType OrigVT, + EVT::SimpleValueType DestVT) { PromoteToType[std::make_pair(Opc, OrigVT)] = DestVT; } @@ -1342,7 +1342,7 @@ public: Value *CallOperandVal; /// ConstraintVT - The ValueType for the operand value. - MVT ConstraintVT; + EVT ConstraintVT; /// isMatchingInputConstraint - Return true of this is an input operand that /// is a matching constraint like "4". @@ -1355,7 +1355,7 @@ public: AsmOperandInfo(const InlineAsm::ConstraintInfo &info) : InlineAsm::ConstraintInfo(info), ConstraintType(TargetLowering::C_Unknown), - CallOperandVal(0), ConstraintVT(MVT::Other) { + CallOperandVal(0), ConstraintVT(EVT::Other) { } }; @@ -1379,7 +1379,7 @@ public: /// This should only be used for C_RegisterClass constraints. virtual std::vector<unsigned> getRegClassForInlineAsmConstraint(const std::string &Constraint, - MVT VT) const; + EVT VT) const; /// getRegForInlineAsmConstraint - Given a physical register constraint (e.g. /// {edx}), return the register number and the register class for the @@ -1393,13 +1393,13 @@ public: /// this returns a register number of 0 and a null register class pointer.. virtual std::pair<unsigned, const TargetRegisterClass*> getRegForInlineAsmConstraint(const std::string &Constraint, - MVT VT) const; + EVT VT) const; /// LowerXConstraint - try to replace an X constraint, which matches anything, /// with another that has more specific requirements based on the type of the /// corresponding operand. This returns null if there is no replacement to /// make. - virtual const char *LowerXConstraint(MVT ConstraintVT) const; + virtual const char *LowerXConstraint(EVT ConstraintVT) const; /// LowerAsmOperandForConstraint - Lower the specified operand into the Ops /// vector. If it is invalid, don't add anything to Ops. If hasMemory is true @@ -1456,7 +1456,7 @@ public: return false; } - virtual bool isTruncateFree(MVT VT1, MVT VT2) const { + virtual bool isTruncateFree(EVT VT1, EVT VT2) const { return false; } @@ -1472,14 +1472,14 @@ public: return false; } - virtual bool isZExtFree(MVT VT1, MVT VT2) const { + virtual bool isZExtFree(EVT VT1, EVT VT2) const { return false; } /// isNarrowingProfitable - Return true if it's profitable to narrow /// operations of type VT1 to VT2. e.g. on x86, it's profitable to narrow /// from i32 to i8 but not from i32 to i16. - virtual bool isNarrowingProfitable(MVT VT1, MVT VT2) const { + virtual bool isNarrowingProfitable(EVT VT1, EVT VT2) const { return false; } @@ -1527,7 +1527,7 @@ private: /// PointerTy - The type to use for pointers, usually i32 or i64. /// - MVT::SimpleValueType PointerTy; + EVT::SimpleValueType PointerTy; /// IsLittleEndian - True if this is a little endian target. /// @@ -1562,7 +1562,7 @@ private: /// ShiftAmountTy - The type to use for shift amounts, usually i8 or whatever /// PointerTy is. - MVT::SimpleValueType ShiftAmountTy; + EVT::SimpleValueType ShiftAmountTy; /// BooleanContents - Information about the contents of the high-bits in /// boolean values held in a type wider than i1. See getBooleanContents. @@ -1608,16 +1608,16 @@ private: /// RegClassForVT - This indicates the default register class to use for /// each ValueType the target supports natively. - TargetRegisterClass *RegClassForVT[MVT::LAST_VALUETYPE]; - unsigned char NumRegistersForVT[MVT::LAST_VALUETYPE]; - MVT RegisterTypeForVT[MVT::LAST_VALUETYPE]; + TargetRegisterClass *RegClassForVT[EVT::LAST_VALUETYPE]; + unsigned char NumRegistersForVT[EVT::LAST_VALUETYPE]; + EVT RegisterTypeForVT[EVT::LAST_VALUETYPE]; /// TransformToType - For any value types we are promoting or expanding, this /// contains the value type that we are changing to. For Expanded types, this /// contains one step of the expand (e.g. i64 -> i32), even if there are /// multiple steps required (e.g. i64 -> i16). For types natively supported /// by the system, this holds the same type (e.g. i32 -> i32). - MVT TransformToType[MVT::LAST_VALUETYPE]; + EVT TransformToType[EVT::LAST_VALUETYPE]; /// OpActions - For each operation and each value type, keep a LegalizeAction /// that indicates how instruction selection should deal with the operation. @@ -1625,8 +1625,8 @@ private: /// operations that are not should be described. Note that operations on /// non-legal value types are not described here. /// This array is accessed using VT.getSimpleVT(), so it is subject to - /// the MVT::MAX_ALLOWED_VALUETYPE * 2 bits. - uint64_t OpActions[MVT::MAX_ALLOWED_VALUETYPE/(sizeof(uint64_t)*4)][ISD::BUILTIN_OP_END]; + /// the EVT::MAX_ALLOWED_VALUETYPE * 2 bits. + uint64_t OpActions[EVT::MAX_ALLOWED_VALUETYPE/(sizeof(uint64_t)*4)][ISD::BUILTIN_OP_END]; /// LoadExtActions - For each load of load extension type and each value type, /// keep a LegalizeAction that indicates how instruction selection should deal @@ -1635,7 +1635,7 @@ private: /// TruncStoreActions - For each truncating store, keep a LegalizeAction that /// indicates how instruction selection should deal with the store. - uint64_t TruncStoreActions[MVT::LAST_VALUETYPE]; + uint64_t TruncStoreActions[EVT::LAST_VALUETYPE]; /// IndexedModeActions - For each indexed mode and each value type, /// keep a pair of LegalizeAction that indicates how instruction @@ -1643,14 +1643,14 @@ private: /// dimension is now the value_type for the reference. The second /// dimension is the load [0] vs. store[1]. The third dimension /// represents the various modes for load store. - uint8_t IndexedModeActions[MVT::LAST_VALUETYPE][2][ISD::LAST_INDEXED_MODE]; + uint8_t IndexedModeActions[EVT::LAST_VALUETYPE][2][ISD::LAST_INDEXED_MODE]; /// ConvertActions - For each conversion from source type to destination type, /// keep a LegalizeAction that indicates how instruction selection should /// deal with the conversion. /// Currently, this is used only for floating->floating conversions /// (FP_EXTEND and FP_ROUND). - uint64_t ConvertActions[MVT::LAST_VALUETYPE]; + uint64_t ConvertActions[EVT::LAST_VALUETYPE]; /// CondCodeActions - For each condition code (ISD::CondCode) keep a /// LegalizeAction that indicates how instruction selection should @@ -1661,7 +1661,7 @@ private: std::vector<APFloat> LegalFPImmediates; - std::vector<std::pair<MVT, TargetRegisterClass*> > AvailableRegClasses; + std::vector<std::pair<EVT, TargetRegisterClass*> > AvailableRegClasses; /// TargetDAGCombineArray - Targets can specify ISD nodes that they would /// like PerformDAGCombine callbacks for by calling setTargetDAGCombine(), @@ -1675,7 +1675,7 @@ private: /// /// Targets add entries to this map with AddPromotedToType(..), clients access /// this with getTypeToPromoteTo(..). - std::map<std::pair<unsigned, MVT::SimpleValueType>, MVT::SimpleValueType> + std::map<std::pair<unsigned, EVT::SimpleValueType>, EVT::SimpleValueType> PromoteToType; /// LibcallRoutineNames - Stores the name each libcall. diff --git a/include/llvm/Target/TargetRegisterInfo.h b/include/llvm/Target/TargetRegisterInfo.h index 9e57c0e..ac0d7da 100644 --- a/include/llvm/Target/TargetRegisterInfo.h +++ b/include/llvm/Target/TargetRegisterInfo.h @@ -53,7 +53,7 @@ public: typedef const unsigned* iterator; typedef const unsigned* const_iterator; - typedef const MVT* vt_iterator; + typedef const EVT* vt_iterator; typedef const TargetRegisterClass* const * sc_iterator; private: unsigned ID; @@ -70,7 +70,7 @@ private: public: TargetRegisterClass(unsigned id, const char *name, - const MVT *vts, + const EVT *vts, const TargetRegisterClass * const *subcs, const TargetRegisterClass * const *supcs, const TargetRegisterClass * const *subregcs, @@ -117,8 +117,8 @@ public: /// hasType - return true if this TargetRegisterClass has the ValueType vt. /// - bool hasType(MVT vt) const { - for(int i = 0; VTs[i] != MVT::Other; ++i) + bool hasType(EVT vt) const { + for(int i = 0; VTs[i] != EVT::Other; ++i) if (VTs[i] == vt) return true; return false; @@ -132,7 +132,7 @@ public: vt_iterator vt_end() const { vt_iterator I = VTs; - while (*I != MVT::Other) ++I; + while (*I != EVT::Other) ++I; return I; } @@ -318,10 +318,10 @@ public: } /// getPhysicalRegisterRegClass - Returns the Register Class of a physical - /// register of the given type. If type is MVT::Other, then just return any + /// register of the given type. If type is EVT::Other, then just return any /// register class the register belongs to. virtual const TargetRegisterClass * - getPhysicalRegisterRegClass(unsigned Reg, MVT VT = MVT::Other) const; + getPhysicalRegisterRegClass(unsigned Reg, EVT VT = EVT::Other) const; /// getAllocatableSet - Returns a bitset indexed by register number /// indicating if a register is allocatable or not. If a register class is diff --git a/include/llvm/Target/TargetSelectionDAG.td b/include/llvm/Target/TargetSelectionDAG.td index 9a9125e..1ee52a7 100644 --- a/include/llvm/Target/TargetSelectionDAG.td +++ b/include/llvm/Target/TargetSelectionDAG.td @@ -512,48 +512,48 @@ def zextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ }]>; def extloadi1 : PatFrag<(ops node:$ptr), (extload node:$ptr), [{ - return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i1; + return cast<LoadSDNode>(N)->getMemoryVT() == EVT::i1; }]>; def extloadi8 : PatFrag<(ops node:$ptr), (extload node:$ptr), [{ - return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; + return cast<LoadSDNode>(N)->getMemoryVT() == EVT::i8; }]>; def extloadi16 : PatFrag<(ops node:$ptr), (extload node:$ptr), [{ - return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; + return cast<LoadSDNode>(N)->getMemoryVT() == EVT::i16; }]>; def extloadi32 : PatFrag<(ops node:$ptr), (extload node:$ptr), [{ - return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; + return cast<LoadSDNode>(N)->getMemoryVT() == EVT::i32; }]>; def extloadf32 : PatFrag<(ops node:$ptr), (extload node:$ptr), [{ - return cast<LoadSDNode>(N)->getMemoryVT() == MVT::f32; + return cast<LoadSDNode>(N)->getMemoryVT() == EVT::f32; }]>; def extloadf64 : PatFrag<(ops node:$ptr), (extload node:$ptr), [{ - return cast<LoadSDNode>(N)->getMemoryVT() == MVT::f64; + return cast<LoadSDNode>(N)->getMemoryVT() == EVT::f64; }]>; def sextloadi1 : PatFrag<(ops node:$ptr), (sextload node:$ptr), [{ - return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i1; + return cast<LoadSDNode>(N)->getMemoryVT() == EVT::i1; }]>; def sextloadi8 : PatFrag<(ops node:$ptr), (sextload node:$ptr), [{ - return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; + return cast<LoadSDNode>(N)->getMemoryVT() == EVT::i8; }]>; def sextloadi16 : PatFrag<(ops node:$ptr), (sextload node:$ptr), [{ - return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; + return cast<LoadSDNode>(N)->getMemoryVT() == EVT::i16; }]>; def sextloadi32 : PatFrag<(ops node:$ptr), (sextload node:$ptr), [{ - return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; + return cast<LoadSDNode>(N)->getMemoryVT() == EVT::i32; }]>; def zextloadi1 : PatFrag<(ops node:$ptr), (zextload node:$ptr), [{ - return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i1; + return cast<LoadSDNode>(N)->getMemoryVT() == EVT::i1; }]>; def zextloadi8 : PatFrag<(ops node:$ptr), (zextload node:$ptr), [{ - return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; + return cast<LoadSDNode>(N)->getMemoryVT() == EVT::i8; }]>; def zextloadi16 : PatFrag<(ops node:$ptr), (zextload node:$ptr), [{ - return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; + return cast<LoadSDNode>(N)->getMemoryVT() == EVT::i16; }]>; def zextloadi32 : PatFrag<(ops node:$ptr), (zextload node:$ptr), [{ - return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; + return cast<LoadSDNode>(N)->getMemoryVT() == EVT::i32; }]>; // store fragments. @@ -573,23 +573,23 @@ def truncstore : PatFrag<(ops node:$val, node:$ptr), }]>; def truncstorei8 : PatFrag<(ops node:$val, node:$ptr), (truncstore node:$val, node:$ptr), [{ - return cast<StoreSDNode>(N)->getMemoryVT() == MVT::i8; + return cast<StoreSDNode>(N)->getMemoryVT() == EVT::i8; }]>; def truncstorei16 : PatFrag<(ops node:$val, node:$ptr), (truncstore node:$val, node:$ptr), [{ - return cast<StoreSDNode>(N)->getMemoryVT() == MVT::i16; + return cast<StoreSDNode>(N)->getMemoryVT() == EVT::i16; }]>; def truncstorei32 : PatFrag<(ops node:$val, node:$ptr), (truncstore node:$val, node:$ptr), [{ - return cast<StoreSDNode>(N)->getMemoryVT() == MVT::i32; + return cast<StoreSDNode>(N)->getMemoryVT() == EVT::i32; }]>; def truncstoref32 : PatFrag<(ops node:$val, node:$ptr), (truncstore node:$val, node:$ptr), [{ - return cast<StoreSDNode>(N)->getMemoryVT() == MVT::f32; + return cast<StoreSDNode>(N)->getMemoryVT() == EVT::f32; }]>; def truncstoref64 : PatFrag<(ops node:$val, node:$ptr), (truncstore node:$val, node:$ptr), [{ - return cast<StoreSDNode>(N)->getMemoryVT() == MVT::f64; + return cast<StoreSDNode>(N)->getMemoryVT() == EVT::f64; }]>; // indexed store fragments. @@ -615,23 +615,23 @@ def pre_truncst : PatFrag<(ops node:$val, node:$base, node:$offset), }]>; def pre_truncsti1 : PatFrag<(ops node:$val, node:$base, node:$offset), (pre_truncst node:$val, node:$base, node:$offset), [{ - return cast<StoreSDNode>(N)->getMemoryVT() == MVT::i1; + return cast<StoreSDNode>(N)->getMemoryVT() == EVT::i1; }]>; def pre_truncsti8 : PatFrag<(ops node:$val, node:$base, node:$offset), (pre_truncst node:$val, node:$base, node:$offset), [{ - return cast<StoreSDNode>(N)->getMemoryVT() == MVT::i8; + return cast<StoreSDNode>(N)->getMemoryVT() == EVT::i8; }]>; def pre_truncsti16 : PatFrag<(ops node:$val, node:$base, node:$offset), (pre_truncst node:$val, node:$base, node:$offset), [{ - return cast<StoreSDNode>(N)->getMemoryVT() == MVT::i16; + return cast<StoreSDNode>(N)->getMemoryVT() == EVT::i16; }]>; def pre_truncsti32 : PatFrag<(ops node:$val, node:$base, node:$offset), (pre_truncst node:$val, node:$base, node:$offset), [{ - return cast<StoreSDNode>(N)->getMemoryVT() == MVT::i32; + return cast<StoreSDNode>(N)->getMemoryVT() == EVT::i32; }]>; def pre_truncstf32 : PatFrag<(ops node:$val, node:$base, node:$offset), (pre_truncst node:$val, node:$base, node:$offset), [{ - return cast<StoreSDNode>(N)->getMemoryVT() == MVT::f32; + return cast<StoreSDNode>(N)->getMemoryVT() == EVT::f32; }]>; def post_store : PatFrag<(ops node:$val, node:$ptr, node:$offset), @@ -647,23 +647,23 @@ def post_truncst : PatFrag<(ops node:$val, node:$base, node:$offset), }]>; def post_truncsti1 : PatFrag<(ops node:$val, node:$base, node:$offset), (post_truncst node:$val, node:$base, node:$offset), [{ - return cast<StoreSDNode>(N)->getMemoryVT() == MVT::i1; + return cast<StoreSDNode>(N)->getMemoryVT() == EVT::i1; }]>; def post_truncsti8 : PatFrag<(ops node:$val, node:$base, node:$offset), (post_truncst node:$val, node:$base, node:$offset), [{ - return cast<StoreSDNode>(N)->getMemoryVT() == MVT::i8; + return cast<StoreSDNode>(N)->getMemoryVT() == EVT::i8; }]>; def post_truncsti16 : PatFrag<(ops node:$val, node:$base, node:$offset), (post_truncst node:$val, node:$base, node:$offset), [{ - return cast<StoreSDNode>(N)->getMemoryVT() == MVT::i16; + return cast<StoreSDNode>(N)->getMemoryVT() == EVT::i16; }]>; def post_truncsti32 : PatFrag<(ops node:$val, node:$base, node:$offset), (post_truncst node:$val, node:$base, node:$offset), [{ - return cast<StoreSDNode>(N)->getMemoryVT() == MVT::i32; + return cast<StoreSDNode>(N)->getMemoryVT() == EVT::i32; }]>; def post_truncstf32 : PatFrag<(ops node:$val, node:$base, node:$offset), (post_truncst node:$val, node:$base, node:$offset), [{ - return cast<StoreSDNode>(N)->getMemoryVT() == MVT::f32; + return cast<StoreSDNode>(N)->getMemoryVT() == EVT::f32; }]>; // setcc convenience fragments. @@ -711,40 +711,40 @@ def setne : PatFrag<(ops node:$lhs, node:$rhs), def atomic_cmp_swap_8 : PatFrag<(ops node:$ptr, node:$cmp, node:$swap), (atomic_cmp_swap node:$ptr, node:$cmp, node:$swap), [{ - return cast<AtomicSDNode>(N)->getMemoryVT() == MVT::i8; + return cast<AtomicSDNode>(N)->getMemoryVT() == EVT::i8; }]>; def atomic_cmp_swap_16 : PatFrag<(ops node:$ptr, node:$cmp, node:$swap), (atomic_cmp_swap node:$ptr, node:$cmp, node:$swap), [{ - return cast<AtomicSDNode>(N)->getMemoryVT() == MVT::i16; + return cast<AtomicSDNode>(N)->getMemoryVT() == EVT::i16; }]>; def atomic_cmp_swap_32 : PatFrag<(ops node:$ptr, node:$cmp, node:$swap), (atomic_cmp_swap node:$ptr, node:$cmp, node:$swap), [{ - return cast<AtomicSDNode>(N)->getMemoryVT() == MVT::i32; + return cast<AtomicSDNode>(N)->getMemoryVT() == EVT::i32; }]>; def atomic_cmp_swap_64 : PatFrag<(ops node:$ptr, node:$cmp, node:$swap), (atomic_cmp_swap node:$ptr, node:$cmp, node:$swap), [{ - return cast<AtomicSDNode>(N)->getMemoryVT() == MVT::i64; + return cast<AtomicSDNode>(N)->getMemoryVT() == EVT::i64; }]>; multiclass binary_atomic_op<SDNode atomic_op> { def _8 : PatFrag<(ops node:$ptr, node:$val), (atomic_op node:$ptr, node:$val), [{ - return cast<AtomicSDNode>(N)->getMemoryVT() == MVT::i8; + return cast<AtomicSDNode>(N)->getMemoryVT() == EVT::i8; }]>; def _16 : PatFrag<(ops node:$ptr, node:$val), (atomic_op node:$ptr, node:$val), [{ - return cast<AtomicSDNode>(N)->getMemoryVT() == MVT::i16; + return cast<AtomicSDNode>(N)->getMemoryVT() == EVT::i16; }]>; def _32 : PatFrag<(ops node:$ptr, node:$val), (atomic_op node:$ptr, node:$val), [{ - return cast<AtomicSDNode>(N)->getMemoryVT() == MVT::i32; + return cast<AtomicSDNode>(N)->getMemoryVT() == EVT::i32; }]>; def _64 : PatFrag<(ops node:$ptr, node:$val), (atomic_op node:$ptr, node:$val), [{ - return cast<AtomicSDNode>(N)->getMemoryVT() == MVT::i64; + return cast<AtomicSDNode>(N)->getMemoryVT() == EVT::i64; }]>; } |