2 files changed, 19 insertions, 0 deletions
diff --git a/include/llvm/CodeGen/Passes.h b/include/llvm/CodeGen/Passes.h
index c881d74..0fcdf7a 100644
--- a/include/llvm/CodeGen/Passes.h
+++ b/include/llvm/CodeGen/Passes.h
@@ -180,6 +180,10 @@ namespace llvm {
   /// to take advantage of opportunities created during DAG legalization.
   FunctionPass *createOptimizePHIsPass();
 
+  /// createOptimizeCmpsPass - This pass performs redundant comparison removal
+  /// optimization.
+  FunctionPass *createOptimizeCmpsPass();
+
   /// createStackSlotColoringPass - This pass performs stack slot coloring.
   FunctionPass *createStackSlotColoringPass(bool);
 
diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h
index d5fe33f..1c6ac1a 100644
--- a/include/llvm/Target/TargetInstrInfo.h
+++ b/include/llvm/Target/TargetInstrInfo.h
@@ -576,6 +576,21 @@ public:
   /// register allocation.
   virtual ScheduleHazardRecognizer*
   CreateTargetPostRAHazardRecognizer(const InstrItineraryData&) const = 0;
+
+  /// isCompareInstr - If the machine instruction is a comparison instruction,
+  /// then return true. Also return the source register in SrcReg and the value
+  /// it compares against in CmpValue.
+  virtual bool isCompareInstr(const MachineInstr *MI,
+                              unsigned &SrcReg, int &CmpValue) const {
+    return false;
+  }
+
+  /// convertToSetZeroFlag - Convert the instruction to set the zero flag so
+  /// that we can remove a "comparison with zero".
+  virtual bool convertToSetZeroFlag(MachineInstr *Instr,
+                                    MachineInstr *CmpInstr) const {
+    return false;
+  }
 };
 
 /// TargetInstrInfoImpl - This is the default implementation of