diff options
Diffstat (limited to 'lib/CodeGen/LLVMTargetMachine.cpp')
| -rw-r--r-- | lib/CodeGen/LLVMTargetMachine.cpp | 58 |
1 files changed, 37 insertions, 21 deletions
diff --git a/lib/CodeGen/LLVMTargetMachine.cpp b/lib/CodeGen/LLVMTargetMachine.cpp index e4ad872..73f2902 100644 --- a/lib/CodeGen/LLVMTargetMachine.cpp +++ b/lib/CodeGen/LLVMTargetMachine.cpp @@ -38,12 +38,13 @@ static cl::opt<bool> EnableSinking("enable-sinking", cl::init(false), cl::Hidden, cl::desc("Perform sinking on machine code")); static cl::opt<bool> -AlignLoops("align-loops", cl::init(true), cl::Hidden, - cl::desc("Align loop headers")); +EnableStackColoring("stack-coloring", + cl::init(true), cl::Hidden, + cl::desc("Perform stack slot coloring")); static cl::opt<bool> -PerformLICM("machine-licm", - cl::init(false), cl::Hidden, - cl::desc("Perform loop-invariant code motion on machine code")); +EnableLICM("machine-licm", + cl::init(false), cl::Hidden, + cl::desc("Perform loop-invariant code motion on machine code")); // When this works it will be on by default. static cl::opt<bool> @@ -88,7 +89,7 @@ LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM, if (PrintMachineCode) PM.add(createMachineFunctionPrinterPass(cerr)); - if (PerformLICM) + if (EnableLICM) PM.add(createMachineLICMPass()); if (EnableSinking) @@ -101,21 +102,28 @@ LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM, // Perform register allocation to convert to a concrete x86 representation PM.add(createRegisterAllocator()); - if (PrintMachineCode) + // Perform stack slot coloring. + if (EnableStackColoring) + PM.add(createStackSlotColoringPass()); + + if (PrintMachineCode) // Print the register-allocated code PM.add(createMachineFunctionPrinterPass(cerr)); - - PM.add(createLowerSubregsPass()); - if (PrintMachineCode) // Print the subreg lowered code - PM.add(createMachineFunctionPrinterPass(cerr)); - // Run post-ra passes. if (addPostRegAlloc(PM, Fast) && PrintMachineCode) PM.add(createMachineFunctionPrinterPass(cerr)); + PM.add(createLowerSubregsPass()); + + if (PrintMachineCode) // Print the subreg lowered code + PM.add(createMachineFunctionPrinterPass(cerr)); + // Insert prolog/epilog code. Eliminate abstract frame index references... PM.add(createPrologEpilogCodeInserter()); + if (PrintMachineCode) + PM.add(createMachineFunctionPrinterPass(cerr)); + // Second pass scheduler. if (!Fast && !DisablePostRAScheduler) PM.add(createPostRAScheduler()); @@ -140,7 +148,7 @@ LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM, if (addPreEmitPass(PM, Fast) && PrintMachineCode) PM.add(createMachineFunctionPrinterPass(cerr)); - if (AlignLoops && !Fast && !OptimizeForSize) + if (!Fast && !OptimizeForSize) PM.add(createLoopAlignerPass()); switch (FileType) { @@ -218,7 +226,7 @@ bool LLVMTargetMachine::addPassesToEmitMachineCode(PassManagerBase &PM, if (PrintMachineCode) PM.add(createMachineFunctionPrinterPass(cerr)); - if (PerformLICM) + if (EnableLICM) PM.add(createMachineLICMPass()); if (EnableSinking) @@ -228,25 +236,32 @@ bool LLVMTargetMachine::addPassesToEmitMachineCode(PassManagerBase &PM, if (addPreRegAlloc(PM, Fast) && PrintMachineCode) PM.add(createMachineFunctionPrinterPass(cerr)); - // Perform register allocation to convert to a concrete x86 representation + // Perform register allocation. PM.add(createRegisterAllocator()); - + + // Perform stack slot coloring. + if (EnableStackColoring) + PM.add(createStackSlotColoringPass()); + if (PrintMachineCode) PM.add(createMachineFunctionPrinterPass(cerr)); + // Run post-ra passes. + if (addPostRegAlloc(PM, Fast) && PrintMachineCode) + PM.add(createMachineFunctionPrinterPass(cerr)); + + if (PrintMachineCode) // Print the register-allocated code + PM.add(createMachineFunctionPrinterPass(cerr)); + PM.add(createLowerSubregsPass()); if (PrintMachineCode) // Print the subreg lowered code PM.add(createMachineFunctionPrinterPass(cerr)); - // Run post-ra passes. - if (addPostRegAlloc(PM, Fast) && PrintMachineCode) - PM.add(createMachineFunctionPrinterPass(cerr)); - // Insert prolog/epilog code. Eliminate abstract frame index references... PM.add(createPrologEpilogCodeInserter()); - if (PrintMachineCode) // Print the register-allocated code + if (PrintMachineCode) PM.add(createMachineFunctionPrinterPass(cerr)); // Second pass scheduler. @@ -258,6 +273,7 @@ bool LLVMTargetMachine::addPassesToEmitMachineCode(PassManagerBase &PM, PM.add(createBranchFoldingPass(getEnableTailMergeDefault())); PM.add(createGCMachineCodeAnalysisPass()); + if (PrintMachineCode) PM.add(createMachineFunctionPrinterPass(cerr)); |