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-rw-r--r--lib/MC/MCAsmInfo.cpp4
-rw-r--r--lib/MC/MCAsmStreamer.cpp21
-rw-r--r--lib/MC/MCDisassembler/Disassembler.cpp5
-rw-r--r--lib/MC/MCDisassembler/EDDisassembler.cpp18
-rw-r--r--lib/MC/MCDisassembler/EDDisassembler.h1
-rw-r--r--lib/MC/MCDisassembler/EDInfo.h19
-rw-r--r--lib/MC/MCDisassembler/EDOperand.cpp21
-rw-r--r--lib/MC/MCDwarf.cpp89
-rw-r--r--lib/MC/MCELFStreamer.cpp1
-rw-r--r--lib/MC/MCLoggingStreamer.cpp6
-rw-r--r--lib/MC/MCMachOStreamer.cpp1
-rw-r--r--lib/MC/MCNullStreamer.cpp3
-rw-r--r--lib/MC/MCObjectStreamer.cpp5
-rw-r--r--lib/MC/MCParser/AsmParser.cpp2
-rw-r--r--lib/MC/MCParser/COFFAsmParser.cpp6
-rw-r--r--lib/MC/MCParser/MCAsmParser.cpp6
-rw-r--r--lib/MC/MCParser/TargetAsmParser.cpp4
-rw-r--r--lib/MC/MCStreamer.cpp3
-rw-r--r--lib/MC/MCSubtargetInfo.cpp60
-rw-r--r--lib/MC/MCWin64EH.cpp10
-rw-r--r--lib/MC/SubtargetFeature.cpp72
21 files changed, 240 insertions, 117 deletions
diff --git a/lib/MC/MCAsmInfo.cpp b/lib/MC/MCAsmInfo.cpp
index 73b259e..502b60b 100644
--- a/lib/MC/MCAsmInfo.cpp
+++ b/lib/MC/MCAsmInfo.cpp
@@ -23,6 +23,9 @@
using namespace llvm;
MCAsmInfo::MCAsmInfo() {
+ PointerSize = 4;
+ IsLittleEndian = true;
+ StackGrowsUp = false;
HasSubsectionsViaSymbols = false;
HasMachoZeroFillDirective = false;
HasMachoTBSSDirective = false;
@@ -78,6 +81,7 @@ MCAsmInfo::MCAsmInfo() {
DwarfRequiresRelocationForSectionOffset = true;
DwarfSectionOffsetDirective = 0;
DwarfUsesLabelOffsetForRanges = true;
+ DwarfRegNumForCFI = false;
HasMicrosoftFastStdCallMangling = false;
AsmTransCBE = 0;
diff --git a/lib/MC/MCAsmStreamer.cpp b/lib/MC/MCAsmStreamer.cpp
index acf7755..d5d08e8 100644
--- a/lib/MC/MCAsmStreamer.cpp
+++ b/lib/MC/MCAsmStreamer.cpp
@@ -137,7 +137,8 @@ public:
virtual void EmitWeakReference(MCSymbol *Alias, const MCSymbol *Symbol);
virtual void EmitDwarfAdvanceLineAddr(int64_t LineDelta,
const MCSymbol *LastLabel,
- const MCSymbol *Label);
+ const MCSymbol *Label,
+ unsigned PointerSize);
virtual void EmitDwarfAdvanceFrameAddr(const MCSymbol *LastLabel,
const MCSymbol *Label);
@@ -364,9 +365,9 @@ void MCAsmStreamer::EmitWeakReference(MCSymbol *Alias, const MCSymbol *Symbol) {
void MCAsmStreamer::EmitDwarfAdvanceLineAddr(int64_t LineDelta,
const MCSymbol *LastLabel,
- const MCSymbol *Label) {
- EmitDwarfSetLineAddr(LineDelta, Label,
- getContext().getTargetAsmInfo().getPointerSize());
+ const MCSymbol *Label,
+ unsigned PointerSize) {
+ EmitDwarfSetLineAddr(LineDelta, Label, PointerSize);
}
void MCAsmStreamer::EmitDwarfAdvanceFrameAddr(const MCSymbol *LastLabel,
@@ -603,7 +604,7 @@ void MCAsmStreamer::EmitValueImpl(const MCExpr *Value, unsigned Size,
int64_t IntValue;
if (!Value->EvaluateAsAbsolute(IntValue))
report_fatal_error("Don't know how to emit this value.");
- if (getContext().getTargetAsmInfo().isLittleEndian()) {
+ if (getContext().getAsmInfo().isLittleEndian()) {
EmitIntValue((uint32_t)(IntValue >> 0 ), 4, AddrSpace);
EmitIntValue((uint32_t)(IntValue >> 32), 4, AddrSpace);
} else {
@@ -825,9 +826,9 @@ void MCAsmStreamer::EmitCFIEndProc() {
}
void MCAsmStreamer::EmitRegisterName(int64_t Register) {
- if (InstPrinter) {
- const TargetAsmInfo &asmInfo = getContext().getTargetAsmInfo();
- unsigned LLVMRegister = asmInfo.getLLVMRegNum(Register, true);
+ if (InstPrinter && !MAI.useDwarfRegNumForCFI()) {
+ const TargetAsmInfo &TAI = getContext().getTargetAsmInfo();
+ unsigned LLVMRegister = TAI.getLLVMRegNum(Register, true);
InstPrinter->printRegName(OS, LLVMRegister);
} else {
OS << Register;
@@ -1088,7 +1089,7 @@ void MCAsmStreamer::AddEncodingComment(const MCInst &Inst) {
}
}
- // FIXME: Node the fixup comments for Thumb2 are completely bogus since the
+ // FIXME: Note the fixup comments for Thumb2 are completely bogus since the
// high order halfword of a 32-bit Thumb2 instruction is emitted first.
OS << "encoding: [";
for (unsigned i = 0, e = Code.size(); i != e; ++i) {
@@ -1123,7 +1124,7 @@ void MCAsmStreamer::AddEncodingComment(const MCInst &Inst) {
unsigned Bit = (Code[i] >> j) & 1;
unsigned FixupBit;
- if (getContext().getTargetAsmInfo().isLittleEndian())
+ if (getContext().getAsmInfo().isLittleEndian())
FixupBit = i * 8 + j;
else
FixupBit = i * 8 + (7-j);
diff --git a/lib/MC/MCDisassembler/Disassembler.cpp b/lib/MC/MCDisassembler/Disassembler.cpp
index 6d6777e..5480b4b 100644
--- a/lib/MC/MCDisassembler/Disassembler.cpp
+++ b/lib/MC/MCDisassembler/Disassembler.cpp
@@ -40,6 +40,7 @@ LLVMDisasmContextRef LLVMCreateDisasm(const char *TripleName, void *DisInfo,
llvm::InitializeAllTargetInfos();
// FIXME: We shouldn't need to initialize the Target(Machine)s.
llvm::InitializeAllTargets();
+ llvm::InitializeAllMCAsmInfos();
llvm::InitializeAllAsmPrinters();
llvm::InitializeAllAsmParsers();
llvm::InitializeAllDisassemblers();
@@ -50,7 +51,7 @@ LLVMDisasmContextRef LLVMCreateDisasm(const char *TripleName, void *DisInfo,
assert(TheTarget && "Unable to create target!");
// Get the assembler info needed to setup the MCContext.
- const MCAsmInfo *MAI = TheTarget->createAsmInfo(TripleName);
+ const MCAsmInfo *MAI = TheTarget->createMCAsmInfo(TripleName);
assert(MAI && "Unable to create target asm info!");
// Package up features to be passed to target/subtarget
@@ -79,7 +80,7 @@ LLVMDisasmContextRef LLVMCreateDisasm(const char *TripleName, void *DisInfo,
// Set up the instruction printer.
int AsmPrinterVariant = MAI->getAssemblerDialect();
- MCInstPrinter *IP = TheTarget->createMCInstPrinter(*TM, AsmPrinterVariant,
+ MCInstPrinter *IP = TheTarget->createMCInstPrinter(AsmPrinterVariant,
*MAI);
assert(IP && "Unable to create instruction printer!");
diff --git a/lib/MC/MCDisassembler/EDDisassembler.cpp b/lib/MC/MCDisassembler/EDDisassembler.cpp
index 2a46d37..bdd99af 100644
--- a/lib/MC/MCDisassembler/EDDisassembler.cpp
+++ b/lib/MC/MCDisassembler/EDDisassembler.cpp
@@ -23,6 +23,7 @@
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCInstPrinter.h"
#include "llvm/MC/MCStreamer.h"
+#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/MC/MCParser/AsmLexer.h"
#include "llvm/MC/MCParser/MCAsmParser.h"
#include "llvm/MC/MCParser/MCParsedAsmOperand.h"
@@ -106,6 +107,7 @@ void EDDisassembler::initialize() {
InitializeAllTargetInfos();
InitializeAllTargets();
+ InitializeAllMCAsmInfos();
InitializeAllAsmPrinters();
InitializeAllAsmParsers();
InitializeAllDisassemblers();
@@ -171,7 +173,7 @@ EDDisassembler::EDDisassembler(CPUKey &key) :
std::string featureString;
TargetMachine.reset(Tgt->createTargetMachine(tripleString, CPU,
featureString));
-
+
const TargetRegisterInfo *registerInfo = TargetMachine->getRegisterInfo();
if (!registerInfo)
@@ -179,11 +181,11 @@ EDDisassembler::EDDisassembler(CPUKey &key) :
initMaps(*registerInfo);
- AsmInfo.reset(Tgt->createAsmInfo(tripleString));
+ AsmInfo.reset(Tgt->createMCAsmInfo(tripleString));
if (!AsmInfo)
return;
-
+
Disassembler.reset(Tgt->createMCDisassembler());
if (!Disassembler)
@@ -193,8 +195,7 @@ EDDisassembler::EDDisassembler(CPUKey &key) :
InstString.reset(new std::string);
InstStream.reset(new raw_string_ostream(*InstString));
- InstPrinter.reset(Tgt->createMCInstPrinter(*TargetMachine, LLVMSyntaxVariant,
- *AsmInfo));
+ InstPrinter.reset(Tgt->createMCInstPrinter(LLVMSyntaxVariant, *AsmInfo));
if (!InstPrinter)
return;
@@ -372,8 +373,11 @@ int EDDisassembler::parseInst(SmallVectorImpl<MCParsedAsmOperand*> &operands,
OwningPtr<MCAsmParser> genericParser(createMCAsmParser(*Tgt, sourceMgr,
context, *streamer,
*AsmInfo));
- OwningPtr<TargetAsmParser> TargetParser(Tgt->createAsmParser(*genericParser,
- *TargetMachine));
+
+ StringRef triple = tripleFromArch(Key.Arch);
+ OwningPtr<MCSubtargetInfo> STI(Tgt->createMCSubtargetInfo(triple, "", ""));
+ OwningPtr<TargetAsmParser> TargetParser(Tgt->createAsmParser(*STI,
+ *genericParser));
AsmToken OpcodeToken = genericParser->Lex();
AsmToken NextToken = genericParser->Lex(); // consume next token, because specificParser expects us to
diff --git a/lib/MC/MCDisassembler/EDDisassembler.h b/lib/MC/MCDisassembler/EDDisassembler.h
index 2fcc09d..11d69c1 100644
--- a/lib/MC/MCDisassembler/EDDisassembler.h
+++ b/lib/MC/MCDisassembler/EDDisassembler.h
@@ -41,6 +41,7 @@ class MCInstPrinter;
class MCInst;
class MCParsedAsmOperand;
class MCStreamer;
+class MCSubtargetInfo;
template <typename T> class SmallVectorImpl;
class SourceMgr;
class Target;
diff --git a/lib/MC/MCDisassembler/EDInfo.h b/lib/MC/MCDisassembler/EDInfo.h
index ad57282..e43ad16 100644
--- a/lib/MC/MCDisassembler/EDInfo.h
+++ b/lib/MC/MCDisassembler/EDInfo.h
@@ -25,8 +25,11 @@ enum OperandTypes {
kOperandTypeARMBranchTarget,
kOperandTypeARMSoReg,
kOperandTypeARMSoImm,
+ kOperandTypeARMRotImm,
kOperandTypeARMSoImm2Part,
kOperandTypeARMPredicate,
+ kOperandTypeAddrModeImm12,
+ kOperandTypeLdStSOReg,
kOperandTypeARMAddrMode2,
kOperandTypeARMAddrMode2Offset,
kOperandTypeARMAddrMode3,
@@ -38,13 +41,20 @@ enum OperandTypes {
kOperandTypeARMAddrMode7,
kOperandTypeARMAddrModePC,
kOperandTypeARMRegisterList,
+ kOperandTypeARMDPRRegisterList,
+ kOperandTypeARMSPRRegisterList,
kOperandTypeARMTBAddrMode,
kOperandTypeThumbITMask,
- kOperandTypeThumbAddrModeS1,
- kOperandTypeThumbAddrModeS2,
- kOperandTypeThumbAddrModeS4,
+ kOperandTypeThumbAddrModeRegS1,
+ kOperandTypeThumbAddrModeRegS2,
+ kOperandTypeThumbAddrModeRegS4,
+ kOperandTypeThumbAddrModeImmS1,
+ kOperandTypeThumbAddrModeImmS2,
+ kOperandTypeThumbAddrModeImmS4,
kOperandTypeThumbAddrModeRR,
kOperandTypeThumbAddrModeSP,
+ kOperandTypeThumbAddrModePC,
+ kOperandTypeThumb2AddrModeReg,
kOperandTypeThumb2SoReg,
kOperandTypeThumb2SoImm,
kOperandTypeThumb2AddrModeImm8,
@@ -52,8 +62,7 @@ enum OperandTypes {
kOperandTypeThumb2AddrModeImm12,
kOperandTypeThumb2AddrModeSoReg,
kOperandTypeThumb2AddrModeImm8s4,
- kOperandTypeThumb2AddrModeImm8s4Offset,
- kOperandTypeThumb2AddrModeReg
+ kOperandTypeThumb2AddrModeImm8s4Offset
};
enum OperandFlags {
diff --git a/lib/MC/MCDisassembler/EDOperand.cpp b/lib/MC/MCDisassembler/EDOperand.cpp
index 492bb08..6a4e56f 100644
--- a/lib/MC/MCDisassembler/EDOperand.cpp
+++ b/lib/MC/MCDisassembler/EDOperand.cpp
@@ -61,11 +61,14 @@ EDOperand::EDOperand(const EDDisassembler &disassembler,
switch (operandType) {
default:
case kOperandTypeARMRegisterList:
+ case kOperandTypeARMDPRRegisterList:
+ case kOperandTypeARMSPRRegisterList:
break;
case kOperandTypeImmediate:
case kOperandTypeRegister:
case kOperandTypeARMBranchTarget:
case kOperandTypeARMSoImm:
+ case kOperandTypeARMRotImm:
case kOperandTypeThumb2SoImm:
case kOperandTypeARMSoImm2Part:
case kOperandTypeARMPredicate:
@@ -78,6 +81,7 @@ EDOperand::EDOperand(const EDDisassembler &disassembler,
numMCOperands = 1;
break;
case kOperandTypeThumb2SoReg:
+ case kOperandTypeAddrModeImm12:
case kOperandTypeARMAddrMode2Offset:
case kOperandTypeARMAddrMode3Offset:
case kOperandTypeARMAddrMode4:
@@ -86,17 +90,22 @@ EDOperand::EDOperand(const EDDisassembler &disassembler,
case kOperandTypeThumb2AddrModeImm8:
case kOperandTypeThumb2AddrModeImm12:
case kOperandTypeThumb2AddrModeImm8s4:
+ case kOperandTypeThumbAddrModeImmS1:
+ case kOperandTypeThumbAddrModeImmS2:
+ case kOperandTypeThumbAddrModeImmS4:
case kOperandTypeThumbAddrModeRR:
case kOperandTypeThumbAddrModeSP:
+ case kOperandTypeThumbAddrModePC:
numMCOperands = 2;
break;
case kOperandTypeARMSoReg:
+ case kOperandTypeLdStSOReg:
case kOperandTypeARMAddrMode2:
case kOperandTypeARMAddrMode3:
case kOperandTypeThumb2AddrModeSoReg:
- case kOperandTypeThumbAddrModeS1:
- case kOperandTypeThumbAddrModeS2:
- case kOperandTypeThumbAddrModeS4:
+ case kOperandTypeThumbAddrModeRegS1:
+ case kOperandTypeThumbAddrModeRegS2:
+ case kOperandTypeThumbAddrModeRegS4:
case kOperandTypeARMAddrMode6Offset:
numMCOperands = 3;
break;
@@ -270,9 +279,9 @@ int EDOperand::isMemory() {
case kOperandTypeARMAddrMode7:
case kOperandTypeARMAddrModePC:
case kOperandTypeARMBranchTarget:
- case kOperandTypeThumbAddrModeS1:
- case kOperandTypeThumbAddrModeS2:
- case kOperandTypeThumbAddrModeS4:
+ case kOperandTypeThumbAddrModeRegS1:
+ case kOperandTypeThumbAddrModeRegS2:
+ case kOperandTypeThumbAddrModeRegS4:
case kOperandTypeThumbAddrModeRR:
case kOperandTypeThumbAddrModeSP:
case kOperandTypeThumb2SoImm:
diff --git a/lib/MC/MCDwarf.cpp b/lib/MC/MCDwarf.cpp
index 13164ed..ad86db1 100644
--- a/lib/MC/MCDwarf.cpp
+++ b/lib/MC/MCDwarf.cpp
@@ -7,22 +7,21 @@
//
//===----------------------------------------------------------------------===//
-#include "llvm/ADT/FoldingSet.h"
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/MC/MCDwarf.h"
-#include "llvm/MC/MCAssembler.h"
#include "llvm/MC/MCStreamer.h"
#include "llvm/MC/MCSymbol.h"
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCObjectWriter.h"
-#include "llvm/ADT/SmallString.h"
-#include "llvm/ADT/Twine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"
-#include "llvm/Target/TargetAsmBackend.h"
#include "llvm/Target/TargetAsmInfo.h"
+#include "llvm/ADT/FoldingSet.h"
+#include "llvm/ADT/SmallString.h"
+#include "llvm/ADT/StringExtras.h"
+#include "llvm/ADT/Twine.h"
using namespace llvm;
// Given a special op, return the address skip amount (in units of
@@ -173,7 +172,9 @@ static inline void EmitDwarfLineTable(MCStreamer *MCOS,
// At this point we want to emit/create the sequence to encode the delta in
// line numbers and the increment of the address from the previous Label
// and the current Label.
- MCOS->EmitDwarfAdvanceLineAddr(LineDelta, LastLabel, Label);
+ const MCAsmInfo &asmInfo = MCOS->getContext().getAsmInfo();
+ MCOS->EmitDwarfAdvanceLineAddr(LineDelta, LastLabel, Label,
+ asmInfo.getPointerSize());
LastLine = it->getLine();
LastLabel = Label;
@@ -197,7 +198,9 @@ static inline void EmitDwarfLineTable(MCStreamer *MCOS,
// Switch back the the dwarf line section.
MCOS->SwitchSection(context.getTargetAsmInfo().getDwarfLineSection());
- MCOS->EmitDwarfAdvanceLineAddr(INT64_MAX, LastLabel, SectionEnd);
+ const MCAsmInfo &asmInfo = MCOS->getContext().getAsmInfo();
+ MCOS->EmitDwarfAdvanceLineAddr(INT64_MAX, LastLabel, SectionEnd,
+ asmInfo.getPointerSize());
}
//
@@ -428,25 +431,24 @@ void MCDwarfFile::dump() const {
static int getDataAlignmentFactor(MCStreamer &streamer) {
MCContext &context = streamer.getContext();
- const TargetAsmInfo &asmInfo = context.getTargetAsmInfo();
+ const MCAsmInfo &asmInfo = context.getAsmInfo();
int size = asmInfo.getPointerSize();
- if (asmInfo.getStackGrowthDirection() == TargetFrameLowering::StackGrowsUp)
+ if (asmInfo.isStackGrowthDirectionUp())
return size;
- else
- return -size;
+ else
+ return -size;
}
static unsigned getSizeForEncoding(MCStreamer &streamer,
unsigned symbolEncoding) {
MCContext &context = streamer.getContext();
- const TargetAsmInfo &asmInfo = context.getTargetAsmInfo();
unsigned format = symbolEncoding & 0x0f;
switch (format) {
default:
assert(0 && "Unknown Encoding");
case dwarf::DW_EH_PE_absptr:
case dwarf::DW_EH_PE_signed:
- return asmInfo.getPointerSize();
+ return context.getAsmInfo().getPointerSize();
case dwarf::DW_EH_PE_udata2:
case dwarf::DW_EH_PE_sdata2:
return 2;
@@ -483,11 +485,11 @@ static void EmitPersonality(MCStreamer &streamer, const MCSymbol &symbol,
}
static const MachineLocation TranslateMachineLocation(
- const TargetAsmInfo &AsmInfo,
+ const TargetAsmInfo &TAI,
const MachineLocation &Loc) {
unsigned Reg = Loc.getReg() == MachineLocation::VirtualFP ?
MachineLocation::VirtualFP :
- unsigned(AsmInfo.getDwarfRegNum(Loc.getReg(), true));
+ unsigned(TAI.getDwarfRegNum(Loc.getReg(), true));
const MachineLocation &NewLoc = Loc.isReg() ?
MachineLocation(Reg) : MachineLocation(Reg, Loc.getOffset());
return NewLoc;
@@ -500,7 +502,6 @@ namespace {
bool UsingCFI;
bool IsEH;
const MCSymbol *SectionStart;
-
public:
FrameEmitterImpl(bool usingCFI, bool isEH, const MCSymbol *sectionStart) :
CFAOffset(0), CIENum(0), UsingCFI(usingCFI), IsEH(isEH),
@@ -715,6 +716,15 @@ bool FrameEmitterImpl::EmitCompactUnwind(MCStreamer &Streamer,
// .quad __gxx_personality
// .quad except_tab1
+ uint32_t Encoding =
+ TAI.getCompactUnwindEncoding(Frame.Instructions,
+ getDataAlignmentFactor(Streamer), IsEH);
+ if (!Encoding) return false;
+
+ // The encoding needs to know we have an LSDA.
+ if (Frame.Lsda)
+ Encoding |= 0x40000000;
+
Streamer.SwitchSection(TAI.getCompactUnwindSection());
// Range Start
@@ -729,16 +739,14 @@ bool FrameEmitterImpl::EmitCompactUnwind(MCStreamer &Streamer,
if (VerboseAsm) Streamer.AddComment("Range Length");
Streamer.EmitAbsValue(Range, 4);
- // FIXME:
// Compact Encoding
- const std::vector<MachineMove> &Moves = TAI.getInitialFrameState();
- uint32_t Encoding = 0;
Size = getSizeForEncoding(Streamer, dwarf::DW_EH_PE_udata4);
- if (VerboseAsm) Streamer.AddComment("Compact Unwind Encoding");
+ if (VerboseAsm) Streamer.AddComment(Twine("Compact Unwind Encoding: 0x") +
+ Twine(llvm::utohexstr(Encoding)));
Streamer.EmitIntValue(Encoding, Size);
// Personality Function
- Size = getSizeForEncoding(Streamer, Frame.PersonalityEncoding);
+ Size = getSizeForEncoding(Streamer, dwarf::DW_EH_PE_absptr);
if (VerboseAsm) Streamer.AddComment("Personality Function");
if (Frame.Personality)
Streamer.EmitSymbolValue(Frame.Personality, Size);
@@ -763,11 +771,11 @@ const MCSymbol &FrameEmitterImpl::EmitCIE(MCStreamer &streamer,
const MCSymbol *lsda,
unsigned lsdaEncoding) {
MCContext &context = streamer.getContext();
- const TargetAsmInfo &asmInfo = context.getTargetAsmInfo();
+ const TargetAsmInfo &TAI = context.getTargetAsmInfo();
bool verboseAsm = streamer.isVerboseAsm();
MCSymbol *sectionStart;
- if (asmInfo.isFunctionEHFrameSymbolPrivate() || !IsEH)
+ if (TAI.isFunctionEHFrameSymbolPrivate() || !IsEH)
sectionStart = context.CreateTempSymbol();
else
sectionStart = context.GetOrCreateSymbol(Twine("EH_frame") + Twine(CIENum));
@@ -775,7 +783,7 @@ const MCSymbol &FrameEmitterImpl::EmitCIE(MCStreamer &streamer,
streamer.EmitLabel(sectionStart);
CIENum++;
- MCSymbol *sectionEnd = streamer.getContext().CreateTempSymbol();
+ MCSymbol *sectionEnd = context.CreateTempSymbol();
// Length
const MCExpr *Length = MakeStartMinusEndExpr(streamer, *sectionStart,
@@ -816,7 +824,7 @@ const MCSymbol &FrameEmitterImpl::EmitCIE(MCStreamer &streamer,
// Return Address Register
if (verboseAsm) streamer.AddComment("CIE Return Address Column");
- streamer.EmitULEB128IntValue(asmInfo.getDwarfRARegNum(true));
+ streamer.EmitULEB128IntValue(TAI.getDwarfRARegNum(true));
// Augmentation Data Length (optional)
@@ -850,21 +858,21 @@ const MCSymbol &FrameEmitterImpl::EmitCIE(MCStreamer &streamer,
EmitEncodingByte(streamer, lsdaEncoding, "LSDA Encoding");
// Encoding of the FDE pointers
- EmitEncodingByte(streamer, asmInfo.getFDEEncoding(UsingCFI),
+ EmitEncodingByte(streamer, TAI.getFDEEncoding(UsingCFI),
"FDE Encoding");
}
// Initial Instructions
- const std::vector<MachineMove> &Moves = asmInfo.getInitialFrameState();
+ const std::vector<MachineMove> &Moves = TAI.getInitialFrameState();
std::vector<MCCFIInstruction> Instructions;
for (int i = 0, n = Moves.size(); i != n; ++i) {
MCSymbol *Label = Moves[i].getLabel();
const MachineLocation &Dst =
- TranslateMachineLocation(asmInfo, Moves[i].getDestination());
+ TranslateMachineLocation(TAI, Moves[i].getDestination());
const MachineLocation &Src =
- TranslateMachineLocation(asmInfo, Moves[i].getSource());
+ TranslateMachineLocation(TAI, Moves[i].getSource());
MCCFIInstruction Inst(Label, Dst, Src);
Instructions.push_back(Inst);
}
@@ -872,7 +880,8 @@ const MCSymbol &FrameEmitterImpl::EmitCIE(MCStreamer &streamer,
EmitCFIInstructions(streamer, Instructions, NULL);
// Padding
- streamer.EmitValueToAlignment(IsEH ? 4 : asmInfo.getPointerSize());
+ streamer.EmitValueToAlignment(IsEH
+ ? 4 : context.getAsmInfo().getPointerSize());
streamer.EmitLabel(sectionEnd);
return *sectionStart;
@@ -884,10 +893,10 @@ MCSymbol *FrameEmitterImpl::EmitFDE(MCStreamer &streamer,
MCContext &context = streamer.getContext();
MCSymbol *fdeStart = context.CreateTempSymbol();
MCSymbol *fdeEnd = context.CreateTempSymbol();
- const TargetAsmInfo &TAsmInfo = context.getTargetAsmInfo();
+ const TargetAsmInfo &TAI = context.getTargetAsmInfo();
bool verboseAsm = streamer.isVerboseAsm();
- if (!TAsmInfo.isFunctionEHFrameSymbolPrivate() && IsEH) {
+ if (!TAI.isFunctionEHFrameSymbolPrivate() && IsEH) {
MCSymbol *EHSym =
context.GetOrCreateSymbol(frame.Function->getName() + Twine(".eh"));
streamer.EmitEHSymAttributes(frame.Function, EHSym);
@@ -916,7 +925,7 @@ MCSymbol *FrameEmitterImpl::EmitFDE(MCStreamer &streamer,
streamer.EmitSymbolValue(&cieStart, 4);
}
- unsigned fdeEncoding = TAsmInfo.getFDEEncoding(UsingCFI);
+ unsigned fdeEncoding = TAI.getFDEEncoding(UsingCFI);
unsigned size = getSizeForEncoding(streamer, fdeEncoding);
// PC Begin
@@ -1002,9 +1011,9 @@ void MCDwarfFrameEmitter::Emit(MCStreamer &Streamer,
bool UsingCFI,
bool IsEH) {
MCContext &Context = Streamer.getContext();
- const TargetAsmInfo &AsmInfo = Context.getTargetAsmInfo();
- const MCSection &Section = IsEH ? *AsmInfo.getEHFrameSection() :
- *AsmInfo.getDwarfFrameSection();
+ const TargetAsmInfo &TAI = Context.getTargetAsmInfo();
+ const MCSection &Section = IsEH ? *TAI.getEHFrameSection() :
+ *TAI.getDwarfFrameSection();
Streamer.SwitchSection(&Section);
MCSymbol *SectionStart = Context.CreateTempSymbol();
Streamer.EmitLabel(SectionStart);
@@ -1016,9 +1025,11 @@ void MCDwarfFrameEmitter::Emit(MCStreamer &Streamer,
const MCSymbol *DummyDebugKey = NULL;
for (unsigned i = 0, n = Streamer.getNumFrameInfos(); i < n; ++i) {
const MCDwarfFrameInfo &Frame = Streamer.getFrameInfo(i);
- if (IsEH && AsmInfo.getCompactUnwindSection() &&
- Emitter.EmitCompactUnwind(Streamer, Frame))
+ if (IsEH && TAI.getCompactUnwindSection() &&
+ Emitter.EmitCompactUnwind(Streamer, Frame)) {
+ FDEEnd = NULL;
continue;
+ }
CIEKey Key(Frame.Personality, Frame.PersonalityEncoding,
Frame.LsdaEncoding);
@@ -1034,7 +1045,7 @@ void MCDwarfFrameEmitter::Emit(MCStreamer &Streamer,
Streamer.EmitLabel(FDEEnd);
}
- Streamer.EmitValueToAlignment(AsmInfo.getPointerSize());
+ Streamer.EmitValueToAlignment(Context.getAsmInfo().getPointerSize());
if (FDEEnd)
Streamer.EmitLabel(FDEEnd);
}
diff --git a/lib/MC/MCELFStreamer.cpp b/lib/MC/MCELFStreamer.cpp
index bbb2789..49340ed 100644
--- a/lib/MC/MCELFStreamer.cpp
+++ b/lib/MC/MCELFStreamer.cpp
@@ -26,7 +26,6 @@
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetAsmBackend.h"
-#include "llvm/Target/TargetAsmInfo.h"
using namespace llvm;
diff --git a/lib/MC/MCLoggingStreamer.cpp b/lib/MC/MCLoggingStreamer.cpp
index 46ea9b8..309752e 100644
--- a/lib/MC/MCLoggingStreamer.cpp
+++ b/lib/MC/MCLoggingStreamer.cpp
@@ -85,9 +85,11 @@ public:
virtual void EmitDwarfAdvanceLineAddr(int64_t LineDelta,
const MCSymbol *LastLabel,
- const MCSymbol *Label) {
+ const MCSymbol *Label,
+ unsigned PointerSize) {
LogCall("EmitDwarfAdvanceLineAddr");
- return Child->EmitDwarfAdvanceLineAddr(LineDelta, LastLabel, Label);
+ return Child->EmitDwarfAdvanceLineAddr(LineDelta, LastLabel, Label,
+ PointerSize);
}
virtual void EmitSymbolAttribute(MCSymbol *Symbol, MCSymbolAttr Attribute) {
diff --git a/lib/MC/MCMachOStreamer.cpp b/lib/MC/MCMachOStreamer.cpp
index 12aeb4f..1b21249 100644
--- a/lib/MC/MCMachOStreamer.cpp
+++ b/lib/MC/MCMachOStreamer.cpp
@@ -24,7 +24,6 @@
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetAsmBackend.h"
-#include "llvm/Target/TargetAsmInfo.h"
using namespace llvm;
diff --git a/lib/MC/MCNullStreamer.cpp b/lib/MC/MCNullStreamer.cpp
index f38b822..9577af0 100644
--- a/lib/MC/MCNullStreamer.cpp
+++ b/lib/MC/MCNullStreamer.cpp
@@ -44,7 +44,8 @@ namespace {
virtual void EmitWeakReference(MCSymbol *Alias, const MCSymbol *Symbol){}
virtual void EmitDwarfAdvanceLineAddr(int64_t LineDelta,
const MCSymbol *LastLabel,
- const MCSymbol *Label) {}
+ const MCSymbol *Label,
+ unsigned PointerSize) {}
virtual void EmitSymbolAttribute(MCSymbol *Symbol, MCSymbolAttr Attribute){}
diff --git a/lib/MC/MCObjectStreamer.cpp b/lib/MC/MCObjectStreamer.cpp
index e230c53..8635aac 100644
--- a/lib/MC/MCObjectStreamer.cpp
+++ b/lib/MC/MCObjectStreamer.cpp
@@ -18,7 +18,6 @@
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCSymbol.h"
#include "llvm/Target/TargetAsmBackend.h"
-#include "llvm/Target/TargetAsmInfo.h"
using namespace llvm;
MCObjectStreamer::MCObjectStreamer(MCContext &Context, TargetAsmBackend &TAB,
@@ -197,9 +196,9 @@ void MCObjectStreamer::EmitInstToFragment(const MCInst &Inst) {
void MCObjectStreamer::EmitDwarfAdvanceLineAddr(int64_t LineDelta,
const MCSymbol *LastLabel,
- const MCSymbol *Label) {
+ const MCSymbol *Label,
+ unsigned PointerSize) {
if (!LastLabel) {
- int PointerSize = getContext().getTargetAsmInfo().getPointerSize();
EmitDwarfSetLineAddr(LineDelta, Label, PointerSize);
return;
}
diff --git a/lib/MC/MCParser/AsmParser.cpp b/lib/MC/MCParser/AsmParser.cpp
index db188f7..0c181f3 100644
--- a/lib/MC/MCParser/AsmParser.cpp
+++ b/lib/MC/MCParser/AsmParser.cpp
@@ -1194,7 +1194,7 @@ bool AsmParser::ParseStatement() {
for (unsigned i = 0; i != ParsedOperands.size(); ++i) {
if (i != 0)
OS << ", ";
- ParsedOperands[i]->dump(OS);
+ ParsedOperands[i]->print(OS);
}
OS << "]";
diff --git a/lib/MC/MCParser/COFFAsmParser.cpp b/lib/MC/MCParser/COFFAsmParser.cpp
index 64f6355..66ad384 100644
--- a/lib/MC/MCParser/COFFAsmParser.cpp
+++ b/lib/MC/MCParser/COFFAsmParser.cpp
@@ -401,14 +401,14 @@ bool COFFAsmParser::ParseAtUnwindOrAtExcept(bool &unwind, bool &except) {
bool COFFAsmParser::ParseSEHRegisterNumber(unsigned &RegNo) {
SMLoc startLoc = getLexer().getLoc();
if (getLexer().is(AsmToken::Percent)) {
- const TargetAsmInfo &asmInfo = getContext().getTargetAsmInfo();
+ const TargetAsmInfo &TAI = getContext().getTargetAsmInfo();
SMLoc endLoc;
unsigned LLVMRegNo;
if (getParser().getTargetParser().ParseRegister(LLVMRegNo,startLoc,endLoc))
return true;
// Check that this is a non-volatile register.
- const unsigned *NVRegs = asmInfo.getCalleeSavedRegs();
+ const unsigned *NVRegs = TAI.getCalleeSavedRegs();
unsigned i;
for (i = 0; NVRegs[i] != 0; ++i)
if (NVRegs[i] == LLVMRegNo)
@@ -416,7 +416,7 @@ bool COFFAsmParser::ParseSEHRegisterNumber(unsigned &RegNo) {
if (NVRegs[i] == 0)
return Error(startLoc, "expected non-volatile register");
- int SEHRegNo = asmInfo.getSEHRegNum(LLVMRegNo);
+ int SEHRegNo = TAI.getSEHRegNum(LLVMRegNo);
if (SEHRegNo < 0)
return Error(startLoc,"register can't be represented in SEH unwind info");
RegNo = SEHRegNo;
diff --git a/lib/MC/MCParser/MCAsmParser.cpp b/lib/MC/MCParser/MCAsmParser.cpp
index 70295ef..4030e41 100644
--- a/lib/MC/MCParser/MCAsmParser.cpp
+++ b/lib/MC/MCParser/MCAsmParser.cpp
@@ -12,6 +12,8 @@
#include "llvm/MC/MCParser/MCAsmLexer.h"
#include "llvm/MC/MCParser/MCParsedAsmOperand.h"
#include "llvm/Support/SourceMgr.h"
+#include "llvm/Support/raw_ostream.h"
+#include "llvm/Support/Debug.h"
#include "llvm/Target/TargetAsmParser.h"
using namespace llvm;
@@ -41,4 +43,6 @@ bool MCAsmParser::ParseExpression(const MCExpr *&Res) {
return ParseExpression(Res, L);
}
-
+void MCParsedAsmOperand::dump() const {
+ dbgs() << " " << *this;
+}
diff --git a/lib/MC/MCParser/TargetAsmParser.cpp b/lib/MC/MCParser/TargetAsmParser.cpp
index 8d43c21..512f6b0 100644
--- a/lib/MC/MCParser/TargetAsmParser.cpp
+++ b/lib/MC/MCParser/TargetAsmParser.cpp
@@ -10,8 +10,8 @@
#include "llvm/Target/TargetAsmParser.h"
using namespace llvm;
-TargetAsmParser::TargetAsmParser(const Target &T)
- : TheTarget(T), AvailableFeatures(0)
+TargetAsmParser::TargetAsmParser()
+ : AvailableFeatures(0)
{
}
diff --git a/lib/MC/MCStreamer.cpp b/lib/MC/MCStreamer.cpp
index ae3ed0f..6e96b78 100644
--- a/lib/MC/MCStreamer.cpp
+++ b/lib/MC/MCStreamer.cpp
@@ -15,7 +15,6 @@
#include "llvm/MC/MCSymbol.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"
-#include "llvm/Target/TargetAsmInfo.h"
#include "llvm/ADT/SmallString.h"
#include "llvm/ADT/Twine.h"
#include <cstdlib>
@@ -81,7 +80,7 @@ void MCStreamer::EmitIntValue(uint64_t Value, unsigned Size,
assert((isUIntN(8 * Size, Value) || isIntN(8 * Size, Value)) &&
"Invalid size");
char buf[8];
- const bool isLittleEndian = Context.getTargetAsmInfo().isLittleEndian();
+ const bool isLittleEndian = Context.getAsmInfo().isLittleEndian();
for (unsigned i = 0; i != Size; ++i) {
unsigned index = isLittleEndian ? i : (Size - i - 1);
buf[i] = uint8_t(Value >> (index * 8));
diff --git a/lib/MC/MCSubtargetInfo.cpp b/lib/MC/MCSubtargetInfo.cpp
index 1874bf0..86dc108 100644
--- a/lib/MC/MCSubtargetInfo.cpp
+++ b/lib/MC/MCSubtargetInfo.cpp
@@ -11,11 +11,63 @@
#include "llvm/MC/MCInstrItineraries.h"
#include "llvm/MC/SubtargetFeature.h"
#include "llvm/ADT/StringRef.h"
+#include "llvm/ADT/Triple.h"
#include "llvm/Support/raw_ostream.h"
#include <algorithm>
using namespace llvm;
+void
+MCSubtargetInfo::InitMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS,
+ const SubtargetFeatureKV *PF,
+ const SubtargetFeatureKV *PD,
+ const SubtargetInfoKV *PI,
+ const InstrStage *IS,
+ const unsigned *OC,
+ const unsigned *FP,
+ unsigned NF, unsigned NP) {
+ TargetTriple = TT;
+ ProcFeatures = PF;
+ ProcDesc = PD;
+ ProcItins = PI;
+ Stages = IS;
+ OperandCycles = OC;
+ ForwardingPathes = FP;
+ NumFeatures = NF;
+ NumProcs = NP;
+
+ SubtargetFeatures Features(FS);
+ FeatureBits = Features.getFeatureBits(CPU, ProcDesc, NumProcs,
+ ProcFeatures, NumFeatures);
+}
+
+
+/// ReInitMCSubtargetInfo - Change CPU (and optionally supplemented with
+/// feature string) and recompute feature bits.
+uint64_t MCSubtargetInfo::ReInitMCSubtargetInfo(StringRef CPU, StringRef FS) {
+ SubtargetFeatures Features(FS);
+ FeatureBits = Features.getFeatureBits(CPU, ProcDesc, NumProcs,
+ ProcFeatures, NumFeatures);
+ return FeatureBits;
+}
+
+/// ToggleFeature - Toggle a feature and returns the re-computed feature
+/// bits. This version does not change the implied bits.
+uint64_t MCSubtargetInfo::ToggleFeature(uint64_t FB) {
+ FeatureBits ^= FB;
+ return FeatureBits;
+}
+
+/// ToggleFeature - Toggle a feature and returns the re-computed feature
+/// bits. This version will also change all implied bits.
+uint64_t MCSubtargetInfo::ToggleFeature(StringRef FS) {
+ SubtargetFeatures Features;
+ FeatureBits = Features.ToggleFeature(FeatureBits, FS,
+ ProcFeatures, NumFeatures);
+ return FeatureBits;
+}
+
+
InstrItineraryData
MCSubtargetInfo::getInstrItineraryForCPU(StringRef CPU) const {
assert(ProcItins && "Instruction itineraries information not available!");
@@ -42,11 +94,3 @@ MCSubtargetInfo::getInstrItineraryForCPU(StringRef CPU) const {
return InstrItineraryData(Stages, OperandCycles, ForwardingPathes,
(InstrItinerary *)Found->Value);
}
-
-/// getFeatureBits - Get the feature bits for a CPU (optionally supplemented
-/// with feature string).
-uint64_t MCSubtargetInfo::getFeatureBits(StringRef CPU, StringRef FS) const {
- SubtargetFeatures Features(FS);
- return Features.getFeatureBits(CPU, ProcDesc, NumProcs,
- ProcFeatures, NumFeatures);
-}
diff --git a/lib/MC/MCWin64EH.cpp b/lib/MC/MCWin64EH.cpp
index 9453f5c..e698384 100644
--- a/lib/MC/MCWin64EH.cpp
+++ b/lib/MC/MCWin64EH.cpp
@@ -225,9 +225,9 @@ void MCWin64EHUnwindEmitter::EmitUnwindInfo(MCStreamer &streamer,
// Switch sections (the static function above is meant to be called from
// here and from Emit().
MCContext &context = streamer.getContext();
- const TargetAsmInfo &asmInfo = context.getTargetAsmInfo();
+ const TargetAsmInfo &TAI = context.getTargetAsmInfo();
const MCSection *xdataSect =
- asmInfo.getWin64EHTableSection(GetSectionSuffix(info->Function));
+ TAI.getWin64EHTableSection(GetSectionSuffix(info->Function));
streamer.SwitchSection(xdataSect);
llvm::EmitUnwindInfo(streamer, info);
@@ -236,11 +236,11 @@ void MCWin64EHUnwindEmitter::EmitUnwindInfo(MCStreamer &streamer,
void MCWin64EHUnwindEmitter::Emit(MCStreamer &streamer) {
MCContext &context = streamer.getContext();
// Emit the unwind info structs first.
- const TargetAsmInfo &asmInfo = context.getTargetAsmInfo();
+ const TargetAsmInfo &TAI = context.getTargetAsmInfo();
for (unsigned i = 0; i < streamer.getNumW64UnwindInfos(); ++i) {
MCWin64EHUnwindInfo &info = streamer.getW64UnwindInfo(i);
const MCSection *xdataSect =
- asmInfo.getWin64EHTableSection(GetSectionSuffix(info.Function));
+ TAI.getWin64EHTableSection(GetSectionSuffix(info.Function));
streamer.SwitchSection(xdataSect);
llvm::EmitUnwindInfo(streamer, &info);
}
@@ -248,7 +248,7 @@ void MCWin64EHUnwindEmitter::Emit(MCStreamer &streamer) {
for (unsigned i = 0; i < streamer.getNumW64UnwindInfos(); ++i) {
MCWin64EHUnwindInfo &info = streamer.getW64UnwindInfo(i);
const MCSection *pdataSect =
- asmInfo.getWin64EHFuncTableSection(GetSectionSuffix(info.Function));
+ TAI.getWin64EHFuncTableSection(GetSectionSuffix(info.Function));
streamer.SwitchSection(pdataSect);
EmitRuntimeFunction(streamer, &info);
}
diff --git a/lib/MC/SubtargetFeature.cpp b/lib/MC/SubtargetFeature.cpp
index b9caece..348cd4c 100644
--- a/lib/MC/SubtargetFeature.cpp
+++ b/lib/MC/SubtargetFeature.cpp
@@ -224,6 +224,38 @@ void ClearImpliedBits(uint64_t &Bits, const SubtargetFeatureKV *FeatureEntry,
}
}
+/// ToggleFeature - Toggle a feature and returns the newly updated feature
+/// bits.
+uint64_t
+SubtargetFeatures::ToggleFeature(uint64_t Bits, const StringRef Feature,
+ const SubtargetFeatureKV *FeatureTable,
+ size_t FeatureTableSize) {
+ // Find feature in table.
+ const SubtargetFeatureKV *FeatureEntry =
+ Find(StripFlag(Feature), FeatureTable, FeatureTableSize);
+ // If there is a match
+ if (FeatureEntry) {
+ if ((Bits & FeatureEntry->Value) == FeatureEntry->Value) {
+ Bits &= ~FeatureEntry->Value;
+
+ // For each feature that implies this, clear it.
+ ClearImpliedBits(Bits, FeatureEntry, FeatureTable, FeatureTableSize);
+ } else {
+ Bits |= FeatureEntry->Value;
+
+ // For each feature that this implies, set it.
+ SetImpliedBits(Bits, FeatureEntry, FeatureTable, FeatureTableSize);
+ }
+ } else {
+ errs() << "'" << Feature
+ << "' is not a recognized feature for this target"
+ << " (ignoring feature)\n";
+ }
+
+ return Bits;
+}
+
+
/// getFeatureBits - Get feature bits a CPU.
///
uint64_t SubtargetFeatures::getFeatureBits(const StringRef CPU,
@@ -231,8 +263,9 @@ uint64_t SubtargetFeatures::getFeatureBits(const StringRef CPU,
size_t CPUTableSize,
const SubtargetFeatureKV *FeatureTable,
size_t FeatureTableSize) {
- assert(CPUTable && "missing CPU table");
- assert(FeatureTable && "missing features table");
+ if (!FeatureTableSize || !CPUTableSize)
+ return 0;
+
#ifndef NDEBUG
for (size_t i = 1; i < CPUTableSize; i++) {
assert(strcmp(CPUTable[i - 1].Key, CPUTable[i].Key) < 0 &&
@@ -249,24 +282,27 @@ uint64_t SubtargetFeatures::getFeatureBits(const StringRef CPU,
if (CPU == "help")
Help(CPUTable, CPUTableSize, FeatureTable, FeatureTableSize);
- // Find CPU entry
- const SubtargetFeatureKV *CPUEntry = Find(CPU, CPUTable, CPUTableSize);
- // If there is a match
- if (CPUEntry) {
- // Set base feature bits
- Bits = CPUEntry->Value;
-
- // Set the feature implied by this CPU feature, if any.
- for (size_t i = 0; i < FeatureTableSize; ++i) {
- const SubtargetFeatureKV &FE = FeatureTable[i];
- if (CPUEntry->Value & FE.Value)
- SetImpliedBits(Bits, &FE, FeatureTable, FeatureTableSize);
+ // Find CPU entry if CPU name is specified.
+ if (!CPU.empty()) {
+ const SubtargetFeatureKV *CPUEntry = Find(CPU, CPUTable, CPUTableSize);
+ // If there is a match
+ if (CPUEntry) {
+ // Set base feature bits
+ Bits = CPUEntry->Value;
+
+ // Set the feature implied by this CPU feature, if any.
+ for (size_t i = 0; i < FeatureTableSize; ++i) {
+ const SubtargetFeatureKV &FE = FeatureTable[i];
+ if (CPUEntry->Value & FE.Value)
+ SetImpliedBits(Bits, &FE, FeatureTable, FeatureTableSize);
+ }
+ } else {
+ errs() << "'" << CPU
+ << "' is not a recognized processor for this target"
+ << " (ignoring processor)\n";
}
- } else {
- errs() << "'" << CPU
- << "' is not a recognized processor for this target"
- << " (ignoring processor)\n";
}
+
// Iterate through each feature
for (size_t i = 0, E = Features.size(); i < E; i++) {
const StringRef Feature = Features[i];
generated by cgit v1.1 at 2025-08-16 04:32:28 +0000