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-rw-r--r--lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h13
1 files changed, 7 insertions, 6 deletions
diff --git a/lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h b/lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h
index 1dc506a..ed24343 100644
--- a/lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h
+++ b/lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h
@@ -51,7 +51,7 @@ enum ShiftExtendType {
/// getShiftName - Get the string encoding for the shift type.
static inline const char *getShiftExtendName(AArch64_AM::ShiftExtendType ST) {
switch (ST) {
- default: assert(false && "unhandled shift type!");
+ default: llvm_unreachable("unhandled shift type!");
case AArch64_AM::LSL: return "lsl";
case AArch64_AM::LSR: return "lsr";
case AArch64_AM::ASR: return "asr";
@@ -236,21 +236,22 @@ static inline bool processLogicalImmediate(uint64_t Imm, unsigned RegSize,
if (isShiftedMask_64(Imm)) {
I = countTrailingZeros(Imm);
- CTO = CountTrailingOnes_64(Imm >> I);
+ assert(I < 64 && "undefined behavior");
+ CTO = countTrailingOnes(Imm >> I);
} else {
Imm |= ~Mask;
if (!isShiftedMask_64(~Imm))
return false;
- unsigned CLO = CountLeadingOnes_64(Imm);
+ unsigned CLO = countLeadingOnes(Imm);
I = 64 - CLO;
- CTO = CLO + CountTrailingOnes_64(Imm) - (64 - Size);
+ CTO = CLO + countTrailingOnes(Imm) - (64 - Size);
}
// Encode in Immr the number of RORs it would take to get *from* 0^m 1^n
- // to our target value, where i is the number of RORs to go the opposite
+ // to our target value, where I is the number of RORs to go the opposite
// direction.
- assert(Size > I && "I should be smaller than element Size");
+ assert(Size > I && "I should be smaller than element size");
unsigned Immr = (Size - I) & (Size - 1);
// If size has a 1 in the n'th bit, create a value that has zeroes in