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-rw-r--r--lib/Target/ARM/ARMInstrFormats.td64
1 files changed, 40 insertions, 24 deletions
diff --git a/lib/Target/ARM/ARMInstrFormats.td b/lib/Target/ARM/ARMInstrFormats.td
index d284cd0..9df7e6f 100644
--- a/lib/Target/ARM/ARMInstrFormats.td
+++ b/lib/Target/ARM/ARMInstrFormats.td
@@ -235,81 +235,89 @@ class AI2<bits<4> opcod, dag oops, dag iops, Format f, string opc,
asm, "", pattern> {
let Inst{27-26} = {0,1};
}
-class AXI2<bits<4> opcod, dag oops, dag iops, Format f, string asm,
- list<dag> pattern>
- : XI<opcod, oops, iops, AddrMode2, Size4Bytes, IndexModeNone, f, asm,
- "", pattern>;
// loads
class AI2ldw<bits<4> opcod, dag oops, dag iops, Format f, string opc,
string asm, list<dag> pattern>
- : AI2<opcod, oops, iops, f, opc, asm, pattern> {
+ : I<opcod, oops, iops, AddrMode2, Size4Bytes, IndexModeNone, f, opc,
+ asm, "", pattern> {
let Inst{20} = 1; // L bit
let Inst{21} = 0; // W bit
let Inst{22} = 0; // B bit
let Inst{24} = 1; // P bit
+ let Inst{27-26} = {0,1};
}
class AXI2ldw<bits<4> opcod, dag oops, dag iops, Format f, string asm,
list<dag> pattern>
- : XI<opcod, oops, iops, AddrMode2, Size4Bytes, IndexModeNone, f, asm,
- "", pattern> {
+ : XI<opcod, oops, iops, AddrMode2, Size4Bytes, IndexModeNone, f,
+ asm, "", pattern> {
let Inst{20} = 1; // L bit
let Inst{21} = 0; // W bit
let Inst{22} = 0; // B bit
let Inst{24} = 1; // P bit
+ let Inst{27-26} = {0,1};
}
class AI2ldb<bits<4> opcod, dag oops, dag iops, Format f, string opc,
string asm, list<dag> pattern>
- : AI2<opcod, oops, iops, f, opc, asm, pattern> {
+ : I<opcod, oops, iops, AddrMode2, Size4Bytes, IndexModeNone, f, opc,
+ asm, "", pattern> {
let Inst{20} = 1; // L bit
let Inst{21} = 0; // W bit
let Inst{22} = 1; // B bit
let Inst{24} = 1; // P bit
+ let Inst{27-26} = {0,1};
}
class AXI2ldb<bits<4> opcod, dag oops, dag iops, Format f, string asm,
list<dag> pattern>
- : XI<opcod, oops, iops, AddrMode2, Size4Bytes, IndexModeNone, f, asm,
- "", pattern> {
+ : XI<opcod, oops, iops, AddrMode2, Size4Bytes, IndexModeNone, f,
+ asm, "", pattern> {
let Inst{20} = 1; // L bit
let Inst{21} = 0; // W bit
let Inst{22} = 1; // B bit
let Inst{24} = 1; // P bit
+ let Inst{27-26} = {0,1};
}
// stores
class AI2stw<bits<4> opcod, dag oops, dag iops, Format f, string opc,
string asm, list<dag> pattern>
- : AI2<opcod, oops, iops, f, opc, asm, pattern> {
+ : I<opcod, oops, iops, AddrMode2, Size4Bytes, IndexModeNone, f, opc,
+ asm, "", pattern> {
let Inst{20} = 0; // L bit
let Inst{21} = 0; // W bit
let Inst{22} = 0; // B bit
let Inst{24} = 1; // P bit
+ let Inst{27-26} = {0,1};
}
class AXI2stw<bits<4> opcod, dag oops, dag iops, Format f, string asm,
list<dag> pattern>
- : XI<opcod, oops, iops, AddrMode2, Size4Bytes, IndexModeNone, f, asm,
- "", pattern> {
+ : XI<opcod, oops, iops, AddrMode2, Size4Bytes, IndexModeNone, f,
+ asm, "", pattern> {
let Inst{20} = 0; // L bit
let Inst{21} = 0; // W bit
let Inst{22} = 0; // B bit
let Inst{24} = 1; // P bit
+ let Inst{27-26} = {0,1};
}
class AI2stb<bits<4> opcod, dag oops, dag iops, Format f, string opc,
string asm, list<dag> pattern>
- : AI2<opcod, oops, iops, f, opc, asm, pattern> {
+ : I<opcod, oops, iops, AddrMode2, Size4Bytes, IndexModeNone, f, opc,
+ asm, "", pattern> {
let Inst{20} = 0; // L bit
let Inst{21} = 0; // W bit
let Inst{22} = 1; // B bit
let Inst{24} = 1; // P bit
+ let Inst{27-26} = {0,1};
}
class AXI2stb<bits<4> opcod, dag oops, dag iops, Format f, string asm,
list<dag> pattern>
- : XI<opcod, oops, iops, AddrMode2, Size4Bytes, IndexModeNone, f, asm,
- "", pattern> {
+ : XI<opcod, oops, iops, AddrMode2, Size4Bytes, IndexModeNone, f,
+ asm, "", pattern> {
let Inst{20} = 0; // L bit
let Inst{21} = 0; // W bit
let Inst{22} = 1; // B bit
let Inst{24} = 1; // P bit
+ let Inst{27-26} = {0,1};
}
// Pre-indexed loads
@@ -321,6 +329,7 @@ class AI2ldwpr<bits<4> opcod, dag oops, dag iops, Format f, string opc,
let Inst{21} = 1; // W bit
let Inst{22} = 0; // B bit
let Inst{24} = 1; // P bit
+ let Inst{27-26} = {0,1};
}
class AI2ldbpr<bits<4> opcod, dag oops, dag iops, Format f, string opc,
string asm, string cstr, list<dag> pattern>
@@ -330,6 +339,7 @@ class AI2ldbpr<bits<4> opcod, dag oops, dag iops, Format f, string opc,
let Inst{21} = 1; // W bit
let Inst{22} = 1; // B bit
let Inst{24} = 1; // P bit
+ let Inst{27-26} = {0,1};
}
// Pre-indexed stores
@@ -341,6 +351,7 @@ class AI2stwpr<bits<4> opcod, dag oops, dag iops, Format f, string opc,
let Inst{21} = 1; // W bit
let Inst{22} = 0; // B bit
let Inst{24} = 1; // P bit
+ let Inst{27-26} = {0,1};
}
class AI2stbpr<bits<4> opcod, dag oops, dag iops, Format f, string opc,
string asm, string cstr, list<dag> pattern>
@@ -350,6 +361,7 @@ class AI2stbpr<bits<4> opcod, dag oops, dag iops, Format f, string opc,
let Inst{21} = 1; // W bit
let Inst{22} = 1; // B bit
let Inst{24} = 1; // P bit
+ let Inst{27-26} = {0,1};
}
// Post-indexed loads
@@ -361,6 +373,7 @@ class AI2ldwpo<bits<4> opcod, dag oops, dag iops, Format f, string opc,
let Inst{21} = 0; // W bit
let Inst{22} = 0; // B bit
let Inst{24} = 0; // P bit
+ let Inst{27-26} = {0,1};
}
class AI2ldbpo<bits<4> opcod, dag oops, dag iops, Format f, string opc,
string asm, string cstr, list<dag> pattern>
@@ -370,6 +383,7 @@ class AI2ldbpo<bits<4> opcod, dag oops, dag iops, Format f, string opc,
let Inst{21} = 0; // W bit
let Inst{22} = 1; // B bit
let Inst{24} = 0; // P bit
+ let Inst{27-26} = {0,1};
}
// Post-indexed stores
@@ -381,6 +395,7 @@ class AI2stwpo<bits<4> opcod, dag oops, dag iops, Format f, string opc,
let Inst{21} = 0; // W bit
let Inst{22} = 0; // B bit
let Inst{24} = 0; // P bit
+ let Inst{27-26} = {0,1};
}
class AI2stbpo<bits<4> opcod, dag oops, dag iops, Format f, string opc,
string asm, string cstr, list<dag> pattern>
@@ -390,6 +405,7 @@ class AI2stbpo<bits<4> opcod, dag oops, dag iops, Format f, string opc,
let Inst{21} = 0; // W bit
let Inst{22} = 1; // B bit
let Inst{24} = 0; // P bit
+ let Inst{27-26} = {0,1};
}
// addrmode3 instructions
@@ -417,8 +433,8 @@ class AI3ldh<bits<4> opcod, dag oops, dag iops, Format f, string opc,
}
class AXI3ldh<bits<4> opcod, dag oops, dag iops, Format f, string asm,
list<dag> pattern>
- : XI<opcod, oops, iops, AddrMode3, Size4Bytes, IndexModeNone, f, asm,
- "", pattern> {
+ : XI<opcod, oops, iops, AddrMode3, Size4Bytes, IndexModeNone, f,
+ asm, "", pattern> {
let Inst{4} = 1;
let Inst{5} = 1; // H bit
let Inst{6} = 0; // S bit
@@ -441,8 +457,8 @@ class AI3ldsh<bits<4> opcod, dag oops, dag iops, Format f, string opc,
}
class AXI3ldsh<bits<4> opcod, dag oops, dag iops, Format f, string asm,
list<dag> pattern>
- : XI<opcod, oops, iops, AddrMode3, Size4Bytes, IndexModeNone, f, asm,
- "", pattern> {
+ : XI<opcod, oops, iops, AddrMode3, Size4Bytes, IndexModeNone, f,
+ asm, "", pattern> {
let Inst{4} = 1;
let Inst{5} = 1; // H bit
let Inst{6} = 1; // S bit
@@ -465,8 +481,8 @@ class AI3ldsb<bits<4> opcod, dag oops, dag iops, Format f, string opc,
}
class AXI3ldsb<bits<4> opcod, dag oops, dag iops, Format f, string asm,
list<dag> pattern>
- : XI<opcod, oops, iops, AddrMode3, Size4Bytes, IndexModeNone, f, asm,
- "", pattern> {
+ : XI<opcod, oops, iops, AddrMode3, Size4Bytes, IndexModeNone, f,
+ asm, "", pattern> {
let Inst{4} = 1;
let Inst{5} = 0; // H bit
let Inst{6} = 1; // S bit
@@ -503,8 +519,8 @@ class AI3sth<bits<4> opcod, dag oops, dag iops, Format f, string opc,
}
class AXI3sth<bits<4> opcod, dag oops, dag iops, Format f, string asm,
list<dag> pattern>
- : XI<opcod, oops, iops, AddrMode3, Size4Bytes, IndexModeNone, f, asm,
- "", pattern> {
+ : XI<opcod, oops, iops, AddrMode3, Size4Bytes, IndexModeNone, f,
+ asm, "", pattern> {
let Inst{4} = 1;
let Inst{5} = 1; // H bit
let Inst{6} = 0; // S bit