diff options
Diffstat (limited to 'lib/Target/ARM/ARMTargetMachine.h')
-rw-r--r-- | lib/Target/ARM/ARMTargetMachine.h | 36 |
1 files changed, 11 insertions, 25 deletions
diff --git a/lib/Target/ARM/ARMTargetMachine.h b/lib/Target/ARM/ARMTargetMachine.h index b72b1df..fba0ec2 100644 --- a/lib/Target/ARM/ARMTargetMachine.h +++ b/lib/Target/ARM/ARMTargetMachine.h @@ -11,8 +11,8 @@ // //===----------------------------------------------------------------------===// -#ifndef ARMTARGETMACHINE_H -#define ARMTARGETMACHINE_H +#ifndef LLVM_LIB_TARGET_ARM_ARMTARGETMACHINE_H +#define LLVM_LIB_TARGET_ARM_ARMTARGETMACHINE_H #include "ARMInstrInfo.h" #include "ARMSubtarget.h" @@ -23,7 +23,11 @@ namespace llvm { class ARMBaseTargetMachine : public LLVMTargetMachine { protected: + std::unique_ptr<TargetLoweringObjectFile> TLOF; ARMSubtarget Subtarget; + bool isLittle; + mutable StringMap<std::unique_ptr<ARMSubtarget>> SubtargetMap; + public: ARMBaseTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, @@ -31,30 +35,10 @@ public: Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle); + ~ARMBaseTargetMachine() override; const ARMSubtarget *getSubtargetImpl() const override { return &Subtarget; } - const ARMBaseRegisterInfo *getRegisterInfo() const override { - return getSubtargetImpl()->getRegisterInfo(); - } - const ARMTargetLowering *getTargetLowering() const override { - return getSubtargetImpl()->getTargetLowering(); - } - const ARMSelectionDAGInfo *getSelectionDAGInfo() const override { - return getSubtargetImpl()->getSelectionDAGInfo(); - } - const ARMBaseInstrInfo *getInstrInfo() const override { - return getSubtargetImpl()->getInstrInfo(); - } - const ARMFrameLowering *getFrameLowering() const override { - return getSubtargetImpl()->getFrameLowering(); - } - const InstrItineraryData *getInstrItineraryData() const override { - return &getSubtargetImpl()->getInstrItineraryData(); - } - const DataLayout *getDataLayout() const override { - return getSubtargetImpl()->getDataLayout(); - } - ARMJITInfo *getJITInfo() override { return Subtarget.getJITInfo(); } + const ARMSubtarget *getSubtargetImpl(const Function &F) const override; /// \brief Register ARM analysis passes with a pass manager. void addAnalysisPasses(PassManagerBase &PM) override; @@ -62,7 +46,9 @@ public: // Pass Pipeline Configuration TargetPassConfig *createPassConfig(PassManagerBase &PM) override; - bool addCodeEmitter(PassManagerBase &PM, JITCodeEmitter &MCE) override; + TargetLoweringObjectFile *getObjFileLowering() const override { + return TLOF.get(); + } }; /// ARMTargetMachine - ARM target machine. |