diff options
Diffstat (limited to 'lib/Target/ARM')
| -rw-r--r-- | lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp | 295 | ||||
| -rw-r--r-- | lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp | 155 | ||||
| -rw-r--r-- | lib/Target/ARM/AsmPrinter/ARMInstPrinter.h | 117 |
3 files changed, 349 insertions, 218 deletions
diff --git a/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp b/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp index b4aa4a4..486ab00 100644 --- a/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp +++ b/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp @@ -87,70 +87,112 @@ namespace { void printInstructionThroughMCStreamer(const MachineInstr *MI); - void printOperand(const MachineInstr *MI, int OpNum, + void printOperand(const MachineInstr *MI, int OpNum, raw_ostream &O, const char *Modifier = 0); - void printSOImmOperand(const MachineInstr *MI, int OpNum); - void printSOImm2PartOperand(const MachineInstr *MI, int OpNum); - void printSORegOperand(const MachineInstr *MI, int OpNum); - void printAddrMode2Operand(const MachineInstr *MI, int OpNum); - void printAddrMode2OffsetOperand(const MachineInstr *MI, int OpNum); - void printAddrMode3Operand(const MachineInstr *MI, int OpNum); - void printAddrMode3OffsetOperand(const MachineInstr *MI, int OpNum); - void printAddrMode4Operand(const MachineInstr *MI, int OpNum, + void printSOImmOperand(const MachineInstr *MI, int OpNum, raw_ostream &O); + void printSOImm2PartOperand(const MachineInstr *MI, int OpNum, + raw_ostream &O); + void printSORegOperand(const MachineInstr *MI, int OpNum, + raw_ostream &O); + void printAddrMode2Operand(const MachineInstr *MI, int OpNum, + raw_ostream &O); + void printAddrMode2OffsetOperand(const MachineInstr *MI, int OpNum, + raw_ostream &O); + void printAddrMode3Operand(const MachineInstr *MI, int OpNum, + raw_ostream &O); + void printAddrMode3OffsetOperand(const MachineInstr *MI, int OpNum, + raw_ostream &O); + void printAddrMode4Operand(const MachineInstr *MI, int OpNum,raw_ostream &O, const char *Modifier = 0); - void printAddrMode5Operand(const MachineInstr *MI, int OpNum, + void printAddrMode5Operand(const MachineInstr *MI, int OpNum,raw_ostream &O, const char *Modifier = 0); - void printAddrMode6Operand(const MachineInstr *MI, int OpNum); - void printAddrMode6OffsetOperand(const MachineInstr *MI, int OpNum); + void printAddrMode6Operand(const MachineInstr *MI, int OpNum, + raw_ostream &O); + void printAddrMode6OffsetOperand(const MachineInstr *MI, int OpNum, + raw_ostream &O); void printAddrModePCOperand(const MachineInstr *MI, int OpNum, + raw_ostream &O, const char *Modifier = 0); - void printBitfieldInvMaskImmOperand (const MachineInstr *MI, int OpNum); - - void printThumbS4ImmOperand(const MachineInstr *MI, int OpNum); - void printThumbITMask(const MachineInstr *MI, int OpNum); - void printThumbAddrModeRROperand(const MachineInstr *MI, int OpNum); + void printBitfieldInvMaskImmOperand (const MachineInstr *MI, int OpNum, + raw_ostream &O); + + void printThumbS4ImmOperand(const MachineInstr *MI, int OpNum, + raw_ostream &O); + void printThumbITMask(const MachineInstr *MI, int OpNum, raw_ostream &O); + void printThumbAddrModeRROperand(const MachineInstr *MI, int OpNum, + raw_ostream &O); void printThumbAddrModeRI5Operand(const MachineInstr *MI, int OpNum, + raw_ostream &O, unsigned Scale); - void printThumbAddrModeS1Operand(const MachineInstr *MI, int OpNum); - void printThumbAddrModeS2Operand(const MachineInstr *MI, int OpNum); - void printThumbAddrModeS4Operand(const MachineInstr *MI, int OpNum); - void printThumbAddrModeSPOperand(const MachineInstr *MI, int OpNum); - - void printT2SOOperand(const MachineInstr *MI, int OpNum); - void printT2AddrModeImm12Operand(const MachineInstr *MI, int OpNum); - void printT2AddrModeImm8Operand(const MachineInstr *MI, int OpNum); - void printT2AddrModeImm8s4Operand(const MachineInstr *MI, int OpNum); - void printT2AddrModeImm8OffsetOperand(const MachineInstr *MI, int OpNum); - void printT2AddrModeImm8s4OffsetOperand(const MachineInstr *MI, int OpNum) {} - void printT2AddrModeSoRegOperand(const MachineInstr *MI, int OpNum); - - void printCPSOptionOperand(const MachineInstr *MI, int OpNum) {} - void printMSRMaskOperand(const MachineInstr *MI, int OpNum) {} - void printNegZeroOperand(const MachineInstr *MI, int OpNum) {} - void printPredicateOperand(const MachineInstr *MI, int OpNum); - void printMandatoryPredicateOperand(const MachineInstr *MI, int OpNum); - void printSBitModifierOperand(const MachineInstr *MI, int OpNum); - void printPCLabel(const MachineInstr *MI, int OpNum); - void printRegisterList(const MachineInstr *MI, int OpNum); + void printThumbAddrModeS1Operand(const MachineInstr *MI, int OpNum, + raw_ostream &O); + void printThumbAddrModeS2Operand(const MachineInstr *MI, int OpNum, + raw_ostream &O); + void printThumbAddrModeS4Operand(const MachineInstr *MI, int OpNum, + raw_ostream &O); + void printThumbAddrModeSPOperand(const MachineInstr *MI, int OpNum, + raw_ostream &O); + + void printT2SOOperand(const MachineInstr *MI, int OpNum, raw_ostream &O); + void printT2AddrModeImm12Operand(const MachineInstr *MI, int OpNum, + raw_ostream &O); + void printT2AddrModeImm8Operand(const MachineInstr *MI, int OpNum, + raw_ostream &O); + void printT2AddrModeImm8s4Operand(const MachineInstr *MI, int OpNum, + raw_ostream &O); + void printT2AddrModeImm8OffsetOperand(const MachineInstr *MI, int OpNum, + raw_ostream &O); + void printT2AddrModeImm8s4OffsetOperand(const MachineInstr *MI, int OpNum, + raw_ostream &O) {} + void printT2AddrModeSoRegOperand(const MachineInstr *MI, int OpNum, + raw_ostream &O); + + void printCPSOptionOperand(const MachineInstr *MI, int OpNum, + raw_ostream &O) {} + void printMSRMaskOperand(const MachineInstr *MI, int OpNum, + raw_ostream &O) {} + void printNegZeroOperand(const MachineInstr *MI, int OpNum, + raw_ostream &O) {} + void printPredicateOperand(const MachineInstr *MI, int OpNum, + raw_ostream &O); + void printMandatoryPredicateOperand(const MachineInstr *MI, int OpNum, + raw_ostream &O); + void printSBitModifierOperand(const MachineInstr *MI, int OpNum, + raw_ostream &O); + void printPCLabel(const MachineInstr *MI, int OpNum, + raw_ostream &O); + void printRegisterList(const MachineInstr *MI, int OpNum, + raw_ostream &O); void printCPInstOperand(const MachineInstr *MI, int OpNum, + raw_ostream &O, const char *Modifier); - void printJTBlockOperand(const MachineInstr *MI, int OpNum); - void printJT2BlockOperand(const MachineInstr *MI, int OpNum); - void printTBAddrMode(const MachineInstr *MI, int OpNum); - void printNoHashImmediate(const MachineInstr *MI, int OpNum); - void printVFPf32ImmOperand(const MachineInstr *MI, int OpNum); - void printVFPf64ImmOperand(const MachineInstr *MI, int OpNum); - - void printHex8ImmOperand(const MachineInstr *MI, int OpNum) { + void printJTBlockOperand(const MachineInstr *MI, int OpNum, + raw_ostream &O); + void printJT2BlockOperand(const MachineInstr *MI, int OpNum, + raw_ostream &O); + void printTBAddrMode(const MachineInstr *MI, int OpNum, + raw_ostream &O); + void printNoHashImmediate(const MachineInstr *MI, int OpNum, + raw_ostream &O); + void printVFPf32ImmOperand(const MachineInstr *MI, int OpNum, + raw_ostream &O); + void printVFPf64ImmOperand(const MachineInstr *MI, int OpNum, + raw_ostream &O); + + void printHex8ImmOperand(const MachineInstr *MI, int OpNum, + raw_ostream &O) { O << "#0x" << utohexstr(MI->getOperand(OpNum).getImm() & 0xff); } - void printHex16ImmOperand(const MachineInstr *MI, int OpNum) { + void printHex16ImmOperand(const MachineInstr *MI, int OpNum, + raw_ostream &O) { O << "#0x" << utohexstr(MI->getOperand(OpNum).getImm() & 0xffff); } - void printHex32ImmOperand(const MachineInstr *MI, int OpNum) { + void printHex32ImmOperand(const MachineInstr *MI, int OpNum, + raw_ostream &O) { O << "#0x" << utohexstr(MI->getOperand(OpNum).getImm() & 0xffffffff); } - void printHex64ImmOperand(const MachineInstr *MI, int OpNum) { + void printHex64ImmOperand(const MachineInstr *MI, int OpNum, + raw_ostream &O) { O << "#0x" << utohexstr(MI->getOperand(OpNum).getImm()); } @@ -160,7 +202,7 @@ namespace { unsigned AsmVariant, const char *ExtraCode); - void printInstruction(const MachineInstr *MI); // autogenerated. + void printInstruction(const MachineInstr *MI, raw_ostream &O); // autogen static const char *getRegisterName(unsigned RegNo); virtual void EmitInstruction(const MachineInstr *MI); @@ -265,7 +307,7 @@ bool ARMAsmPrinter::runOnMachineFunction(MachineFunction &MF) { } void ARMAsmPrinter::printOperand(const MachineInstr *MI, int OpNum, - const char *Modifier) { + raw_ostream &O, const char *Modifier) { const MachineOperand &MO = MI->getOperand(OpNum); unsigned TF = MO.getTargetFlags(); @@ -344,7 +386,7 @@ void ARMAsmPrinter::printOperand(const MachineInstr *MI, int OpNum, } } -static void printSOImm(formatted_raw_ostream &O, int64_t V, bool VerboseAsm, +static void printSOImm(raw_ostream &O, int64_t V, bool VerboseAsm, const MCAsmInfo *MAI) { // Break it up into two parts that make up a shifter immediate. V = ARM_AM::getSOImmVal(V); @@ -359,8 +401,7 @@ static void printSOImm(formatted_raw_ostream &O, int64_t V, bool VerboseAsm, O << "#" << Imm << ", " << Rot; // Pretty printed version. if (VerboseAsm) { - O.PadToColumn(MAI->getCommentColumn()); - O << MAI->getCommentString() << ' '; + O << "\t" << MAI->getCommentString() << ' '; O << (int)ARM_AM::rotr32(Imm, Rot); } } else { @@ -370,7 +411,8 @@ static void printSOImm(formatted_raw_ostream &O, int64_t V, bool VerboseAsm, /// printSOImmOperand - SOImm is 4-bit rotate amount in bits 8-11 with 8-bit /// immediate in bits 0-7. -void ARMAsmPrinter::printSOImmOperand(const MachineInstr *MI, int OpNum) { +void ARMAsmPrinter::printSOImmOperand(const MachineInstr *MI, int OpNum, + raw_ostream &O) { const MachineOperand &MO = MI->getOperand(OpNum); assert(MO.isImm() && "Not a valid so_imm value!"); printSOImm(O, MO.getImm(), VerboseAsm, MAI); @@ -378,18 +420,19 @@ void ARMAsmPrinter::printSOImmOperand(const MachineInstr *MI, int OpNum) { /// printSOImm2PartOperand - SOImm is broken into two pieces using a 'mov' /// followed by an 'orr' to materialize. -void ARMAsmPrinter::printSOImm2PartOperand(const MachineInstr *MI, int OpNum) { +void ARMAsmPrinter::printSOImm2PartOperand(const MachineInstr *MI, int OpNum, + raw_ostream &O) { const MachineOperand &MO = MI->getOperand(OpNum); assert(MO.isImm() && "Not a valid so_imm value!"); unsigned V1 = ARM_AM::getSOImmTwoPartFirst(MO.getImm()); unsigned V2 = ARM_AM::getSOImmTwoPartSecond(MO.getImm()); printSOImm(O, V1, VerboseAsm, MAI); O << "\n\torr"; - printPredicateOperand(MI, 2); + printPredicateOperand(MI, 2, O); O << "\t"; - printOperand(MI, 0); + printOperand(MI, 0, O); O << ", "; - printOperand(MI, 0); + printOperand(MI, 0, O); O << ", "; printSOImm(O, V2, VerboseAsm, MAI); } @@ -399,7 +442,8 @@ void ARMAsmPrinter::printSOImm2PartOperand(const MachineInstr *MI, int OpNum) { // REG 0 0 - e.g. R5 // REG REG 0,SH_OPC - e.g. R5, ROR R3 // REG 0 IMM,SH_OPC - e.g. R5, LSL #3 -void ARMAsmPrinter::printSORegOperand(const MachineInstr *MI, int Op) { +void ARMAsmPrinter::printSORegOperand(const MachineInstr *MI, int Op, + raw_ostream &O) { const MachineOperand &MO1 = MI->getOperand(Op); const MachineOperand &MO2 = MI->getOperand(Op+1); const MachineOperand &MO3 = MI->getOperand(Op+2); @@ -419,13 +463,14 @@ void ARMAsmPrinter::printSORegOperand(const MachineInstr *MI, int Op) { } } -void ARMAsmPrinter::printAddrMode2Operand(const MachineInstr *MI, int Op) { +void ARMAsmPrinter::printAddrMode2Operand(const MachineInstr *MI, int Op, + raw_ostream &O) { const MachineOperand &MO1 = MI->getOperand(Op); const MachineOperand &MO2 = MI->getOperand(Op+1); const MachineOperand &MO3 = MI->getOperand(Op+2); if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right. - printOperand(MI, Op); + printOperand(MI, Op, O); return; } @@ -451,7 +496,8 @@ void ARMAsmPrinter::printAddrMode2Operand(const MachineInstr *MI, int Op) { O << "]"; } -void ARMAsmPrinter::printAddrMode2OffsetOperand(const MachineInstr *MI, int Op){ +void ARMAsmPrinter::printAddrMode2OffsetOperand(const MachineInstr *MI, int Op, + raw_ostream &O) { const MachineOperand &MO1 = MI->getOperand(Op); const MachineOperand &MO2 = MI->getOperand(Op+1); @@ -473,7 +519,8 @@ void ARMAsmPrinter::printAddrMode2OffsetOperand(const MachineInstr *MI, int Op){ << " #" << ShImm; } -void ARMAsmPrinter::printAddrMode3Operand(const MachineInstr *MI, int Op) { +void ARMAsmPrinter::printAddrMode3Operand(const MachineInstr *MI, int Op, + raw_ostream &O) { const MachineOperand &MO1 = MI->getOperand(Op); const MachineOperand &MO2 = MI->getOperand(Op+1); const MachineOperand &MO3 = MI->getOperand(Op+2); @@ -496,7 +543,8 @@ void ARMAsmPrinter::printAddrMode3Operand(const MachineInstr *MI, int Op) { O << "]"; } -void ARMAsmPrinter::printAddrMode3OffsetOperand(const MachineInstr *MI, int Op){ +void ARMAsmPrinter::printAddrMode3OffsetOperand(const MachineInstr *MI, int Op, + raw_ostream &O){ const MachineOperand &MO1 = MI->getOperand(Op); const MachineOperand &MO2 = MI->getOperand(Op+1); @@ -514,6 +562,7 @@ void ARMAsmPrinter::printAddrMode3OffsetOperand(const MachineInstr *MI, int Op){ } void ARMAsmPrinter::printAddrMode4Operand(const MachineInstr *MI, int Op, + raw_ostream &O, const char *Modifier) { const MachineOperand &MO2 = MI->getOperand(Op+1); ARM_AM::AMSubMode Mode = ARM_AM::getAM4SubMode(MO2.getImm()); @@ -524,17 +573,18 @@ void ARMAsmPrinter::printAddrMode4Operand(const MachineInstr *MI, int Op, if (Mode == ARM_AM::ia) O << ".w"; } else { - printOperand(MI, Op); + printOperand(MI, Op, O); } } void ARMAsmPrinter::printAddrMode5Operand(const MachineInstr *MI, int Op, + raw_ostream &O, const char *Modifier) { const MachineOperand &MO1 = MI->getOperand(Op); const MachineOperand &MO2 = MI->getOperand(Op+1); if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right. - printOperand(MI, Op); + printOperand(MI, Op, O); return; } @@ -560,7 +610,8 @@ void ARMAsmPrinter::printAddrMode5Operand(const MachineInstr *MI, int Op, O << "]"; } -void ARMAsmPrinter::printAddrMode6Operand(const MachineInstr *MI, int Op) { +void ARMAsmPrinter::printAddrMode6Operand(const MachineInstr *MI, int Op, + raw_ostream &O) { const MachineOperand &MO1 = MI->getOperand(Op); const MachineOperand &MO2 = MI->getOperand(Op+1); @@ -572,7 +623,8 @@ void ARMAsmPrinter::printAddrMode6Operand(const MachineInstr *MI, int Op) { O << "]"; } -void ARMAsmPrinter::printAddrMode6OffsetOperand(const MachineInstr *MI, int Op){ +void ARMAsmPrinter::printAddrMode6OffsetOperand(const MachineInstr *MI, int Op, + raw_ostream &O){ const MachineOperand &MO = MI->getOperand(Op); if (MO.getReg() == 0) O << "!"; @@ -581,9 +633,10 @@ void ARMAsmPrinter::printAddrMode6OffsetOperand(const MachineInstr *MI, int Op){ } void ARMAsmPrinter::printAddrModePCOperand(const MachineInstr *MI, int Op, + raw_ostream &O, const char *Modifier) { if (Modifier && strcmp(Modifier, "label") == 0) { - printPCLabel(MI, Op+1); + printPCLabel(MI, Op+1, O); return; } @@ -593,7 +646,8 @@ void ARMAsmPrinter::printAddrModePCOperand(const MachineInstr *MI, int Op, } void -ARMAsmPrinter::printBitfieldInvMaskImmOperand(const MachineInstr *MI, int Op) { +ARMAsmPrinter::printBitfieldInvMaskImmOperand(const MachineInstr *MI, int Op, + raw_ostream &O) { const MachineOperand &MO = MI->getOperand(Op); uint32_t v = ~MO.getImm(); int32_t lsb = CountTrailingZeros_32(v); @@ -604,12 +658,14 @@ ARMAsmPrinter::printBitfieldInvMaskImmOperand(const MachineInstr *MI, int Op) { //===--------------------------------------------------------------------===// -void ARMAsmPrinter::printThumbS4ImmOperand(const MachineInstr *MI, int Op) { +void ARMAsmPrinter::printThumbS4ImmOperand(const MachineInstr *MI, int Op, + raw_ostream &O) { O << "#" << MI->getOperand(Op).getImm() * 4; } void -ARMAsmPrinter::printThumbITMask(const MachineInstr *MI, int Op) { +ARMAsmPrinter::printThumbITMask(const MachineInstr *MI, int Op, + raw_ostream &O) { // (3 - the number of trailing zeros) is the number of then / else. unsigned Mask = MI->getOperand(Op).getImm(); unsigned CondBit0 = Mask >> 4 & 1; @@ -625,7 +681,8 @@ ARMAsmPrinter::printThumbITMask(const MachineInstr *MI, int Op) { } void -ARMAsmPrinter::printThumbAddrModeRROperand(const MachineInstr *MI, int Op) { +ARMAsmPrinter::printThumbAddrModeRROperand(const MachineInstr *MI, int Op, + raw_ostream &O) { const MachineOperand &MO1 = MI->getOperand(Op); const MachineOperand &MO2 = MI->getOperand(Op+1); O << "[" << getRegisterName(MO1.getReg()); @@ -634,13 +691,14 @@ ARMAsmPrinter::printThumbAddrModeRROperand(const MachineInstr *MI, int Op) { void ARMAsmPrinter::printThumbAddrModeRI5Operand(const MachineInstr *MI, int Op, + raw_ostream &O, unsigned Scale) { const MachineOperand &MO1 = MI->getOperand(Op); const MachineOperand &MO2 = MI->getOperand(Op+1); const MachineOperand &MO3 = MI->getOperand(Op+2); if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right. - printOperand(MI, Op); + printOperand(MI, Op, O); return; } @@ -653,19 +711,23 @@ ARMAsmPrinter::printThumbAddrModeRI5Operand(const MachineInstr *MI, int Op, } void -ARMAsmPrinter::printThumbAddrModeS1Operand(const MachineInstr *MI, int Op) { - printThumbAddrModeRI5Operand(MI, Op, 1); +ARMAsmPrinter::printThumbAddrModeS1Operand(const MachineInstr *MI, int Op, + raw_ostream &O) { + printThumbAddrModeRI5Operand(MI, Op, O, 1); } void -ARMAsmPrinter::printThumbAddrModeS2Operand(const MachineInstr *MI, int Op) { - printThumbAddrModeRI5Operand(MI, Op, 2); +ARMAsmPrinter::printThumbAddrModeS2Operand(const MachineInstr *MI, int Op, + raw_ostream &O) { + printThumbAddrModeRI5Operand(MI, Op, O, 2); } void -ARMAsmPrinter::printThumbAddrModeS4Operand(const MachineInstr *MI, int Op) { - printThumbAddrModeRI5Operand(MI, Op, 4); +ARMAsmPrinter::printThumbAddrModeS4Operand(const MachineInstr *MI, int Op, + raw_ostream &O) { + printThumbAddrModeRI5Operand(MI, Op, O, 4); } -void ARMAsmPrinter::printThumbAddrModeSPOperand(const MachineInstr *MI,int Op) { +void ARMAsmPrinter::printThumbAddrModeSPOperand(const MachineInstr *MI,int Op, + raw_ostream &O) { const MachineOperand &MO1 = MI->getOperand(Op); const MachineOperand &MO2 = MI->getOperand(Op+1); O << "[" << getRegisterName(MO1.getReg()); @@ -680,7 +742,8 @@ void ARMAsmPrinter::printThumbAddrModeSPOperand(const MachineInstr *MI,int Op) { // register with shift forms. // REG 0 0 - e.g. R5 // REG IMM, SH_OPC - e.g. R5, LSL #3 -void ARMAsmPrinter::printT2SOOperand(const MachineInstr *MI, int OpNum) { +void ARMAsmPrinter::printT2SOOperand(const MachineInstr *MI, int OpNum, + raw_ostream &O) { const MachineOperand &MO1 = MI->getOperand(OpNum); const MachineOperand &MO2 = MI->getOperand(OpNum+1); @@ -698,7 +761,8 @@ void ARMAsmPrinter::printT2SOOperand(const MachineInstr *MI, int OpNum) { } void ARMAsmPrinter::printT2AddrModeImm12Operand(const MachineInstr *MI, - int OpNum) { + int OpNum, + raw_ostream &O) { const MachineOperand &MO1 = MI->getOperand(OpNum); const MachineOperand &MO2 = MI->getOperand(OpNum+1); @@ -711,7 +775,8 @@ void ARMAsmPrinter::printT2AddrModeImm12Operand(const MachineInstr *MI, } void ARMAsmPrinter::printT2AddrModeImm8Operand(const MachineInstr *MI, - int OpNum) { + int OpNum, + raw_ostream &O) { const MachineOperand &MO1 = MI->getOperand(OpNum); const MachineOperand &MO2 = MI->getOperand(OpNum+1); @@ -727,7 +792,8 @@ void ARMAsmPrinter::printT2AddrModeImm8Operand(const MachineInstr *MI, } void ARMAsmPrinter::printT2AddrModeImm8s4Operand(const MachineInstr *MI, - int OpNum) { + int OpNum, + raw_ostream &O) { const MachineOperand &MO1 = MI->getOperand(OpNum); const MachineOperand &MO2 = MI->getOperand(OpNum+1); @@ -743,7 +809,8 @@ void ARMAsmPrinter::printT2AddrModeImm8s4Operand(const MachineInstr *MI, } void ARMAsmPrinter::printT2AddrModeImm8OffsetOperand(const MachineInstr *MI, - int OpNum) { + int OpNum, + raw_ostream &O) { const MachineOperand &MO1 = MI->getOperand(OpNum); int32_t OffImm = (int32_t)MO1.getImm(); // Don't print +0. @@ -754,7 +821,8 @@ void ARMAsmPrinter::printT2AddrModeImm8OffsetOperand(const MachineInstr *MI, } void ARMAsmPrinter::printT2AddrModeSoRegOperand(const MachineInstr *MI, - int OpNum) { + int OpNum, + raw_ostream &O) { const MachineOperand &MO1 = MI->getOperand(OpNum); const MachineOperand &MO2 = MI->getOperand(OpNum+1); const MachineOperand &MO3 = MI->getOperand(OpNum+2); @@ -775,19 +843,22 @@ void ARMAsmPrinter::printT2AddrModeSoRegOperand(const MachineInstr *MI, //===--------------------------------------------------------------------===// -void ARMAsmPrinter::printPredicateOperand(const MachineInstr *MI, int OpNum) { +void ARMAsmPrinter::printPredicateOperand(const MachineInstr *MI, int OpNum, + raw_ostream &O) { ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(OpNum).getImm(); if (CC != ARMCC::AL) O << ARMCondCodeToString(CC); } void ARMAsmPrinter::printMandatoryPredicateOperand(const MachineInstr *MI, - int OpNum) { + int OpNum, + raw_ostream &O) { ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(OpNum).getImm(); O << ARMCondCodeToString(CC); } -void ARMAsmPrinter::printSBitModifierOperand(const MachineInstr *MI, int OpNum){ +void ARMAsmPrinter::printSBitModifierOperand(const MachineInstr *MI, int OpNum, + raw_ostream &O){ unsigned Reg = MI->getOperand(OpNum).getReg(); if (Reg) { assert(Reg == ARM::CPSR && "Expect ARM CPSR register!"); @@ -795,25 +866,27 @@ void ARMAsmPrinter::printSBitModifierOperand(const MachineInstr *MI, int OpNum){ } } -void ARMAsmPrinter::printPCLabel(const MachineInstr *MI, int OpNum) { +void ARMAsmPrinter::printPCLabel(const MachineInstr *MI, int OpNum, + raw_ostream &O) { int Id = (int)MI->getOperand(OpNum).getImm(); O << MAI->getPrivateGlobalPrefix() << "PC" << getFunctionNumber() << "_" << Id; } -void ARMAsmPrinter::printRegisterList(const MachineInstr *MI, int OpNum) { +void ARMAsmPrinter::printRegisterList(const MachineInstr *MI, int OpNum, + raw_ostream &O) { O << "{"; for (unsigned i = OpNum, e = MI->getNumOperands(); i != e; ++i) { if (MI->getOperand(i).isImplicit()) continue; if ((int)i != OpNum) O << ", "; - printOperand(MI, i); + printOperand(MI, i, O); } O << "}"; } void ARMAsmPrinter::printCPInstOperand(const MachineInstr *MI, int OpNum, - const char *Modifier) { + raw_ostream &O, const char *Modifier) { assert(Modifier && "This operand only works with a modifier!"); // There are two aspects to a CONSTANTPOOL_ENTRY operand, the label and the // data itself. @@ -852,7 +925,8 @@ GetARMJTIPICJumpTableLabel2(unsigned uid, unsigned uid2) const { return OutContext.GetOrCreateSymbol(Name.str()); } -void ARMAsmPrinter::printJTBlockOperand(const MachineInstr *MI, int OpNum) { +void ARMAsmPrinter::printJTBlockOperand(const MachineInstr *MI, int OpNum, + raw_ostream &O) { assert(!Subtarget->isThumb2() && "Thumb2 should use double-jump jumptables!"); const MachineOperand &MO1 = MI->getOperand(OpNum); @@ -892,7 +966,8 @@ void ARMAsmPrinter::printJTBlockOperand(const MachineInstr *MI, int OpNum) { } } -void ARMAsmPrinter::printJT2BlockOperand(const MachineInstr *MI, int OpNum) { +void ARMAsmPrinter::printJT2BlockOperand(const MachineInstr *MI, int OpNum, + raw_ostream &O) { const MachineOperand &MO1 = MI->getOperand(OpNum); const MachineOperand &MO2 = MI->getOperand(OpNum+1); // Unique Id unsigned JTI = MO1.getIndex(); @@ -933,33 +1008,35 @@ void ARMAsmPrinter::printJT2BlockOperand(const MachineInstr *MI, int OpNum) { } } -void ARMAsmPrinter::printTBAddrMode(const MachineInstr *MI, int OpNum) { +void ARMAsmPrinter::printTBAddrMode(const MachineInstr *MI, int OpNum, + raw_ostream &O) { O << "[pc, " << getRegisterName(MI->getOperand(OpNum).getReg()); if (MI->getOpcode() == ARM::t2TBH) O << ", lsl #1"; O << ']'; } -void ARMAsmPrinter::printNoHashImmediate(const MachineInstr *MI, int OpNum) { +void ARMAsmPrinter::printNoHashImmediate(const MachineInstr *MI, int OpNum, + raw_ostream &O) { O << MI->getOperand(OpNum).getImm(); } -void ARMAsmPrinter::printVFPf32ImmOperand(const MachineInstr *MI, int OpNum) { +void ARMAsmPrinter::printVFPf32ImmOperand(const MachineInstr *MI, int OpNum, + raw_ostream &O) { const ConstantFP *FP = MI->getOperand(OpNum).getFPImm(); O << '#' << FP->getValueAPF().convertToFloat(); if (VerboseAsm) { - O.PadToColumn(MAI->getCommentColumn()); - O << MAI->getCommentString() << ' '; + O << "\t\t" << MAI->getCommentString() << ' '; WriteAsOperand(O, FP, /*PrintType=*/false); } } -void ARMAsmPrinter::printVFPf64ImmOperand(const MachineInstr *MI, int OpNum) { +void ARMAsmPrinter::printVFPf64ImmOperand(const MachineInstr *MI, int OpNum, + raw_ostream &O) { const ConstantFP *FP = MI->getOperand(OpNum).getFPImm(); O << '#' << FP->getValueAPF().convertToDouble(); if (VerboseAsm) { - O.PadToColumn(MAI->getCommentColumn()); - O << MAI->getCommentString() << ' '; + O << "\t\t" << MAI->getCommentString() << ' '; WriteAsOperand(O, FP, /*PrintType=*/false); } } @@ -981,11 +1058,11 @@ bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, case 'c': // Don't print "#" before an immediate operand. if (!MI->getOperand(OpNum).isImm()) return true; - printNoHashImmediate(MI, OpNum); + printNoHashImmediate(MI, OpNum, O); return false; case 'P': // Print a VFP double precision register. case 'q': // Print a NEON quad precision register. - printOperand(MI, OpNum); + printOperand(MI, OpNum, O); return false; case 'Q': if (TM.getTargetData()->isLittleEndian()) @@ -1005,7 +1082,7 @@ bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, } } - printOperand(MI, OpNum); + printOperand(MI, OpNum, O); return false; } @@ -1029,7 +1106,7 @@ void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) { if (Opc == ARM::CONSTPOOL_ENTRY) EmitAlignment(2); - printInstruction(MI); + printInstruction(MI, O); OutStreamer.AddBlankLine(); } } diff --git a/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp b/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp index 30763a9..f0fcafb 100644 --- a/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp +++ b/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp @@ -107,8 +107,8 @@ void ARMInstPrinter::printInst(const MCInst *MI) { const MCOperand &MO3 = MI->getOperand(3); O << '\t' << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO3.getImm())); - printSBitModifierOperand(MI, 6); - printPredicateOperand(MI, 4); + printSBitModifierOperand(MI, 6, O); + printPredicateOperand(MI, 4, O); O << '\t' << getRegisterName(Dst.getReg()) << ", " << getRegisterName(MO1.getReg()); @@ -133,9 +133,9 @@ void ARMInstPrinter::printInst(const MCInst *MI) { const MCOperand &MO1 = MI->getOperand(2); if (ARM_AM::getAM4SubMode(MO1.getImm()) == ARM_AM::db) { O << '\t' << "push"; - printPredicateOperand(MI, 3); + printPredicateOperand(MI, 3, O); O << '\t'; - printRegisterList(MI, 5); + printRegisterList(MI, 5, O); return; } } @@ -146,9 +146,9 @@ void ARMInstPrinter::printInst(const MCInst *MI) { const MCOperand &MO1 = MI->getOperand(2); if (ARM_AM::getAM4SubMode(MO1.getImm()) == ARM_AM::ia) { O << '\t' << "pop"; - printPredicateOperand(MI, 3); + printPredicateOperand(MI, 3, O); O << '\t'; - printRegisterList(MI, 5); + printRegisterList(MI, 5, O); return; } } @@ -159,9 +159,9 @@ void ARMInstPrinter::printInst(const MCInst *MI) { const MCOperand &MO1 = MI->getOperand(2); if (ARM_AM::getAM5SubMode(MO1.getImm()) == ARM_AM::db) { O << '\t' << "vpush"; - printPredicateOperand(MI, 3); + printPredicateOperand(MI, 3, O); O << '\t'; - printRegisterList(MI, 5); + printRegisterList(MI, 5, O); return; } } @@ -172,18 +172,18 @@ void ARMInstPrinter::printInst(const MCInst *MI) { const MCOperand &MO1 = MI->getOperand(2); if (ARM_AM::getAM5SubMode(MO1.getImm()) == ARM_AM::ia) { O << '\t' << "vpop"; - printPredicateOperand(MI, 3); + printPredicateOperand(MI, 3, O); O << '\t'; - printRegisterList(MI, 5); + printRegisterList(MI, 5, O); return; } } - printInstruction(MI); + printInstruction(MI, O); } void ARMInstPrinter::printOperand(const MCInst *MI, unsigned OpNo, - const char *Modifier) { + raw_ostream &O, const char *Modifier) { const MCOperand &Op = MI->getOperand(OpNo); if (Op.isReg()) { unsigned Reg = Op.getReg(); @@ -247,7 +247,8 @@ static void printSOImm(raw_ostream &O, int64_t V, bool VerboseAsm, /// printSOImmOperand - SOImm is 4-bit rotate amount in bits 8-11 with 8-bit /// immediate in bits 0-7. -void ARMInstPrinter::printSOImmOperand(const MCInst *MI, unsigned OpNum) { +void ARMInstPrinter::printSOImmOperand(const MCInst *MI, unsigned OpNum, + raw_ostream &O) { const MCOperand &MO = MI->getOperand(OpNum); assert(MO.isImm() && "Not a valid so_imm value!"); printSOImm(O, MO.getImm(), VerboseAsm, &MAI); @@ -255,7 +256,8 @@ void ARMInstPrinter::printSOImmOperand(const MCInst *MI, unsigned OpNum) { /// printSOImm2PartOperand - SOImm is broken into two pieces using a 'mov' /// followed by an 'orr' to materialize. -void ARMInstPrinter::printSOImm2PartOperand(const MCInst *MI, unsigned OpNum) { +void ARMInstPrinter::printSOImm2PartOperand(const MCInst *MI, unsigned OpNum, + raw_ostream &O) { // FIXME: REMOVE this method. abort(); } @@ -265,7 +267,8 @@ void ARMInstPrinter::printSOImm2PartOperand(const MCInst *MI, unsigned OpNum) { // REG 0 0 - e.g. R5 // REG REG 0,SH_OPC - e.g. R5, ROR R3 // REG 0 IMM,SH_OPC - e.g. R5, LSL #3 -void ARMInstPrinter::printSORegOperand(const MCInst *MI, unsigned OpNum) { +void ARMInstPrinter::printSORegOperand(const MCInst *MI, unsigned OpNum, + raw_ostream &O) { const MCOperand &MO1 = MI->getOperand(OpNum); const MCOperand &MO2 = MI->getOperand(OpNum+1); const MCOperand &MO3 = MI->getOperand(OpNum+2); @@ -286,13 +289,14 @@ void ARMInstPrinter::printSORegOperand(const MCInst *MI, unsigned OpNum) { } -void ARMInstPrinter::printAddrMode2Operand(const MCInst *MI, unsigned Op) { +void ARMInstPrinter::printAddrMode2Operand(const MCInst *MI, unsigned Op, + raw_ostream &O) { const MCOperand &MO1 = MI->getOperand(Op); const MCOperand &MO2 = MI->getOperand(Op+1); const MCOperand &MO3 = MI->getOperand(Op+2); if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right. - printOperand(MI, Op); + printOperand(MI, Op, O); return; } @@ -319,7 +323,8 @@ void ARMInstPrinter::printAddrMode2Operand(const MCInst *MI, unsigned Op) { } void ARMInstPrinter::printAddrMode2OffsetOperand(const MCInst *MI, - unsigned OpNum) { + unsigned OpNum, + raw_ostream &O) { const MCOperand &MO1 = MI->getOperand(OpNum); const MCOperand &MO2 = MI->getOperand(OpNum+1); @@ -341,7 +346,8 @@ void ARMInstPrinter::printAddrMode2OffsetOperand(const MCInst *MI, << " #" << ShImm; } -void ARMInstPrinter::printAddrMode3Operand(const MCInst *MI, unsigned OpNum) { +void ARMInstPrinter::printAddrMode3Operand(const MCInst *MI, unsigned OpNum, + raw_ostream &O) { const MCOperand &MO1 = MI->getOperand(OpNum); const MCOperand &MO2 = MI->getOperand(OpNum+1); const MCOperand &MO3 = MI->getOperand(OpNum+2); @@ -362,7 +368,8 @@ void ARMInstPrinter::printAddrMode3Operand(const MCInst *MI, unsigned OpNum) { } void ARMInstPrinter::printAddrMode3OffsetOperand(const MCInst *MI, - unsigned OpNum) { + unsigned OpNum, + raw_ostream &O) { const MCOperand &MO1 = MI->getOperand(OpNum); const MCOperand &MO2 = MI->getOperand(OpNum+1); @@ -381,6 +388,7 @@ void ARMInstPrinter::printAddrMode3OffsetOperand(const MCInst *MI, void ARMInstPrinter::printAddrMode4Operand(const MCInst *MI, unsigned OpNum, + raw_ostream &O, const char *Modifier) { const MCOperand &MO2 = MI->getOperand(OpNum+1); ARM_AM::AMSubMode Mode = ARM_AM::getAM4SubMode(MO2.getImm()); @@ -391,17 +399,18 @@ void ARMInstPrinter::printAddrMode4Operand(const MCInst *MI, unsigned OpNum, if (Mode == ARM_AM::ia) O << ".w"; } else { - printOperand(MI, OpNum); + printOperand(MI, OpNum, O); } } void ARMInstPrinter::printAddrMode5Operand(const MCInst *MI, unsigned OpNum, + raw_ostream &O, const char *Modifier) { const MCOperand &MO1 = MI->getOperand(OpNum); const MCOperand &MO2 = MI->getOperand(OpNum+1); if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right. - printOperand(MI, OpNum); + printOperand(MI, OpNum, O); return; } @@ -425,7 +434,8 @@ void ARMInstPrinter::printAddrMode5Operand(const MCInst *MI, unsigned OpNum, O << "]"; } -void ARMInstPrinter::printAddrMode6Operand(const MCInst *MI, unsigned OpNum) { +void ARMInstPrinter::printAddrMode6Operand(const MCInst *MI, unsigned OpNum, + raw_ostream &O) { const MCOperand &MO1 = MI->getOperand(OpNum); const MCOperand &MO2 = MI->getOperand(OpNum+1); @@ -438,7 +448,8 @@ void ARMInstPrinter::printAddrMode6Operand(const MCInst *MI, unsigned OpNum) { } void ARMInstPrinter::printAddrMode6OffsetOperand(const MCInst *MI, - unsigned OpNum) { + unsigned OpNum, + raw_ostream &O) { const MCOperand &MO = MI->getOperand(OpNum); if (MO.getReg() == 0) O << "!"; @@ -447,12 +458,14 @@ void ARMInstPrinter::printAddrMode6OffsetOperand(const MCInst *MI, } void ARMInstPrinter::printAddrModePCOperand(const MCInst *MI, unsigned OpNum, + raw_ostream &O, const char *Modifier) { assert(0 && "FIXME: Implement printAddrModePCOperand"); } void ARMInstPrinter::printBitfieldInvMaskImmOperand (const MCInst *MI, - unsigned OpNum) { + unsigned OpNum, + raw_ostream &O) { const MCOperand &MO = MI->getOperand(OpNum); uint32_t v = ~MO.getImm(); int32_t lsb = CountTrailingZeros_32(v); @@ -461,7 +474,8 @@ void ARMInstPrinter::printBitfieldInvMaskImmOperand (const MCInst *MI, O << '#' << lsb << ", #" << width; } -void ARMInstPrinter::printRegisterList(const MCInst *MI, unsigned OpNum) { +void ARMInstPrinter::printRegisterList(const MCInst *MI, unsigned OpNum, + raw_ostream &O) { O << "{"; for (unsigned i = OpNum, e = MI->getNumOperands(); i != e; ++i) { if (i != OpNum) O << ", "; @@ -470,7 +484,8 @@ void ARMInstPrinter::printRegisterList(const MCInst *MI, unsigned OpNum) { O << "}"; } -void ARMInstPrinter::printCPSOptionOperand(const MCInst *MI, unsigned OpNum) { +void ARMInstPrinter::printCPSOptionOperand(const MCInst *MI, unsigned OpNum, + raw_ostream &O) { const MCOperand &Op = MI->getOperand(OpNum); unsigned option = Op.getImm(); unsigned mode = option & 31; @@ -492,7 +507,8 @@ void ARMInstPrinter::printCPSOptionOperand(const MCInst *MI, unsigned OpNum) { O << '#' << mode; } -void ARMInstPrinter::printMSRMaskOperand(const MCInst *MI, unsigned OpNum) { +void ARMInstPrinter::printMSRMaskOperand(const MCInst *MI, unsigned OpNum, + raw_ostream &O) { const MCOperand &Op = MI->getOperand(OpNum); unsigned Mask = Op.getImm(); if (Mask) { @@ -504,7 +520,8 @@ void ARMInstPrinter::printMSRMaskOperand(const MCInst *MI, unsigned OpNum) { } } -void ARMInstPrinter::printNegZeroOperand(const MCInst *MI, unsigned OpNum){ +void ARMInstPrinter::printNegZeroOperand(const MCInst *MI, unsigned OpNum, + raw_ostream &O) { const MCOperand &Op = MI->getOperand(OpNum); O << '#'; if (Op.getImm() < 0) @@ -513,19 +530,22 @@ void ARMInstPrinter::printNegZeroOperand(const MCInst *MI, unsigned OpNum){ O << Op.getImm(); } -void ARMInstPrinter::printPredicateOperand(const MCInst *MI, unsigned OpNum) { +void ARMInstPrinter::printPredicateOperand(const MCInst *MI, unsigned OpNum, + raw_ostream &O) { ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(OpNum).getImm(); if (CC != ARMCC::AL) O << ARMCondCodeToString(CC); } void ARMInstPrinter::printMandatoryPredicateOperand(const MCInst *MI, - unsigned OpNum) { + unsigned OpNum, + raw_ostream &O) { ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(OpNum).getImm(); O << ARMCondCodeToString(CC); } -void ARMInstPrinter::printSBitModifierOperand(const MCInst *MI, unsigned OpNum){ +void ARMInstPrinter::printSBitModifierOperand(const MCInst *MI, unsigned OpNum, + raw_ostream &O) { if (MI->getOperand(OpNum).getReg()) { assert(MI->getOperand(OpNum).getReg() == ARM::CPSR && "Expect ARM CPSR register!"); @@ -536,26 +556,31 @@ void ARMInstPrinter::printSBitModifierOperand(const MCInst *MI, unsigned OpNum){ void ARMInstPrinter::printCPInstOperand(const MCInst *MI, unsigned OpNum, + raw_ostream &O, const char *Modifier) { // FIXME: remove this. abort(); } -void ARMInstPrinter::printNoHashImmediate(const MCInst *MI, unsigned OpNum) { +void ARMInstPrinter::printNoHashImmediate(const MCInst *MI, unsigned OpNum, + raw_ostream &O) { O << MI->getOperand(OpNum).getImm(); } -void ARMInstPrinter::printPCLabel(const MCInst *MI, unsigned OpNum) { +void ARMInstPrinter::printPCLabel(const MCInst *MI, unsigned OpNum, + raw_ostream &O) { // FIXME: remove this. abort(); } -void ARMInstPrinter::printThumbS4ImmOperand(const MCInst *MI, unsigned OpNum) { +void ARMInstPrinter::printThumbS4ImmOperand(const MCInst *MI, unsigned OpNum, + raw_ostream &O) { O << "#" << MI->getOperand(OpNum).getImm() * 4; } -void ARMInstPrinter::printThumbITMask(const MCInst *MI, unsigned OpNum) { +void ARMInstPrinter::printThumbITMask(const MCInst *MI, unsigned OpNum, + raw_ostream &O) { // (3 - the number of trailing zeros) is the number of then / else. unsigned Mask = MI->getOperand(OpNum).getImm(); unsigned CondBit0 = Mask >> 4 & 1; @@ -570,8 +595,8 @@ void ARMInstPrinter::printThumbITMask(const MCInst *MI, unsigned OpNum) { } } -void ARMInstPrinter::printThumbAddrModeRROperand(const MCInst *MI, unsigned Op) -{ +void ARMInstPrinter::printThumbAddrModeRROperand(const MCInst *MI, unsigned Op, + raw_ostream &O) { const MCOperand &MO1 = MI->getOperand(Op); const MCOperand &MO2 = MI->getOperand(Op+1); O << "[" << getRegisterName(MO1.getReg()); @@ -579,13 +604,14 @@ void ARMInstPrinter::printThumbAddrModeRROperand(const MCInst *MI, unsigned Op) } void ARMInstPrinter::printThumbAddrModeRI5Operand(const MCInst *MI, unsigned Op, + raw_ostream &O, unsigned Scale) { const MCOperand &MO1 = MI->getOperand(Op); const MCOperand &MO2 = MI->getOperand(Op+1); const MCOperand &MO3 = MI->getOperand(Op+2); if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right. - printOperand(MI, Op); + printOperand(MI, Op, O); return; } @@ -597,22 +623,23 @@ void ARMInstPrinter::printThumbAddrModeRI5Operand(const MCInst *MI, unsigned Op, O << "]"; } -void ARMInstPrinter::printThumbAddrModeS1Operand(const MCInst *MI, unsigned Op) -{ - printThumbAddrModeRI5Operand(MI, Op, 1); +void ARMInstPrinter::printThumbAddrModeS1Operand(const MCInst *MI, unsigned Op, + raw_ostream &O) { + printThumbAddrModeRI5Operand(MI, Op, O, 1); } -void ARMInstPrinter::printThumbAddrModeS2Operand(const MCInst *MI, unsigned Op) -{ - printThumbAddrModeRI5Operand(MI, Op, 2); +void ARMInstPrinter::printThumbAddrModeS2Operand(const MCInst *MI, unsigned Op, + raw_ostream &O) { + printThumbAddrModeRI5Operand(MI, Op, O, 2); } -void ARMInstPrinter::printThumbAddrModeS4Operand(const MCInst *MI, unsigned Op) -{ - printThumbAddrModeRI5Operand(MI, Op, 4); +void ARMInstPrinter::printThumbAddrModeS4Operand(const MCInst *MI, unsigned Op, + raw_ostream &O) { + printThumbAddrModeRI5Operand(MI, Op, O, 4); } -void ARMInstPrinter::printThumbAddrModeSPOperand(const MCInst *MI,unsigned Op) { +void ARMInstPrinter::printThumbAddrModeSPOperand(const MCInst *MI, unsigned Op, + raw_ostream &O) { const MCOperand &MO1 = MI->getOperand(Op); const MCOperand &MO2 = MI->getOperand(Op+1); O << "[" << getRegisterName(MO1.getReg()); @@ -621,7 +648,8 @@ void ARMInstPrinter::printThumbAddrModeSPOperand(const MCInst *MI,unsigned Op) { O << "]"; } -void ARMInstPrinter::printTBAddrMode(const MCInst *MI, unsigned OpNum) { +void ARMInstPrinter::printTBAddrMode(const MCInst *MI, unsigned OpNum, + raw_ostream &O) { O << "[pc, " << getRegisterName(MI->getOperand(OpNum).getReg()); if (MI->getOpcode() == ARM::t2TBH) O << ", lsl #1"; @@ -632,7 +660,8 @@ void ARMInstPrinter::printTBAddrMode(const MCInst *MI, unsigned OpNum) { // register with shift forms. // REG 0 0 - e.g. R5 // REG IMM, SH_OPC - e.g. R5, LSL #3 -void ARMInstPrinter::printT2SOOperand(const MCInst *MI, unsigned OpNum) { +void ARMInstPrinter::printT2SOOperand(const MCInst *MI, unsigned OpNum, + raw_ostream &O) { const MCOperand &MO1 = MI->getOperand(OpNum); const MCOperand &MO2 = MI->getOperand(OpNum+1); @@ -649,7 +678,8 @@ void ARMInstPrinter::printT2SOOperand(const MCInst *MI, unsigned OpNum) { } void ARMInstPrinter::printT2AddrModeImm12Operand(const MCInst *MI, - unsigned OpNum) { + unsigned OpNum, + raw_ostream &O) { const MCOperand &MO1 = MI->getOperand(OpNum); const MCOperand &MO2 = MI->getOperand(OpNum+1); @@ -662,7 +692,8 @@ void ARMInstPrinter::printT2AddrModeImm12Operand(const MCInst *MI, } void ARMInstPrinter::printT2AddrModeImm8Operand(const MCInst *MI, - unsigned OpNum) { + unsigned OpNum, + raw_ostream &O) { const MCOperand &MO1 = MI->getOperand(OpNum); const MCOperand &MO2 = MI->getOperand(OpNum+1); @@ -678,7 +709,8 @@ void ARMInstPrinter::printT2AddrModeImm8Operand(const MCInst *MI, } void ARMInstPrinter::printT2AddrModeImm8s4Operand(const MCInst *MI, - unsigned OpNum) { + unsigned OpNum, + raw_ostream &O) { const MCOperand &MO1 = MI->getOperand(OpNum); const MCOperand &MO2 = MI->getOperand(OpNum+1); @@ -694,7 +726,8 @@ void ARMInstPrinter::printT2AddrModeImm8s4Operand(const MCInst *MI, } void ARMInstPrinter::printT2AddrModeImm8OffsetOperand(const MCInst *MI, - unsigned OpNum) { + unsigned OpNum, + raw_ostream &O) { const MCOperand &MO1 = MI->getOperand(OpNum); int32_t OffImm = (int32_t)MO1.getImm(); // Don't print +0. @@ -705,7 +738,8 @@ void ARMInstPrinter::printT2AddrModeImm8OffsetOperand(const MCInst *MI, } void ARMInstPrinter::printT2AddrModeImm8s4OffsetOperand(const MCInst *MI, - unsigned OpNum) { + unsigned OpNum, + raw_ostream &O) { const MCOperand &MO1 = MI->getOperand(OpNum); int32_t OffImm = (int32_t)MO1.getImm() / 4; // Don't print +0. @@ -716,7 +750,8 @@ void ARMInstPrinter::printT2AddrModeImm8s4OffsetOperand(const MCInst *MI, } void ARMInstPrinter::printT2AddrModeSoRegOperand(const MCInst *MI, - unsigned OpNum) { + unsigned OpNum, + raw_ostream &O) { const MCOperand &MO1 = MI->getOperand(OpNum); const MCOperand &MO2 = MI->getOperand(OpNum+1); const MCOperand &MO3 = MI->getOperand(OpNum+2); @@ -734,11 +769,13 @@ void ARMInstPrinter::printT2AddrModeSoRegOperand(const MCInst *MI, O << "]"; } -void ARMInstPrinter::printVFPf32ImmOperand(const MCInst *MI, unsigned OpNum) { +void ARMInstPrinter::printVFPf32ImmOperand(const MCInst *MI, unsigned OpNum, + raw_ostream &O) { O << '#' << MI->getOperand(OpNum).getImm(); } -void ARMInstPrinter::printVFPf64ImmOperand(const MCInst *MI, unsigned OpNum) { +void ARMInstPrinter::printVFPf64ImmOperand(const MCInst *MI, unsigned OpNum, + raw_ostream &O) { O << '#' << MI->getOperand(OpNum).getImm(); } diff --git a/lib/Target/ARM/AsmPrinter/ARMInstPrinter.h b/lib/Target/ARM/AsmPrinter/ARMInstPrinter.h index d41b5df..c2b32c1 100644 --- a/lib/Target/ARM/AsmPrinter/ARMInstPrinter.h +++ b/lib/Target/ARM/AsmPrinter/ARMInstPrinter.h @@ -28,73 +28,90 @@ public: virtual void printInst(const MCInst *MI); // Autogenerated by tblgen. - void printInstruction(const MCInst *MI); + void printInstruction(const MCInst *MI, raw_ostream &O); static const char *getRegisterName(unsigned RegNo); - void printOperand(const MCInst *MI, unsigned OpNo, + void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O, const char *Modifier = 0); - void printSOImmOperand(const MCInst *MI, unsigned OpNum); - void printSOImm2PartOperand(const MCInst *MI, unsigned OpNum); + void printSOImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); + void printSOImm2PartOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); - void printSORegOperand(const MCInst *MI, unsigned OpNum); - void printAddrMode2Operand(const MCInst *MI, unsigned OpNum); - void printAddrMode2OffsetOperand(const MCInst *MI, unsigned OpNum); - void printAddrMode3Operand(const MCInst *MI, unsigned OpNum); - void printAddrMode3OffsetOperand(const MCInst *MI, unsigned OpNum); - void printAddrMode4Operand(const MCInst *MI, unsigned OpNum, + void printSORegOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); + void printAddrMode2Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O); + void printAddrMode2OffsetOperand(const MCInst *MI, unsigned OpNum, + raw_ostream &O); + void printAddrMode3Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O); + void printAddrMode3OffsetOperand(const MCInst *MI, unsigned OpNum, + raw_ostream &O); + void printAddrMode4Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O, const char *Modifier = 0); - void printAddrMode5Operand(const MCInst *MI, unsigned OpNum, + void printAddrMode5Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O, const char *Modifier = 0); - void printAddrMode6Operand(const MCInst *MI, unsigned OpNum); - void printAddrMode6OffsetOperand(const MCInst *MI, unsigned OpNum); - void printAddrModePCOperand(const MCInst *MI, unsigned OpNum, + void printAddrMode6Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O); + void printAddrMode6OffsetOperand(const MCInst *MI, unsigned OpNum, + raw_ostream &O); + void printAddrModePCOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O, const char *Modifier = 0); - void printBitfieldInvMaskImmOperand(const MCInst *MI, unsigned OpNum); + void printBitfieldInvMaskImmOperand(const MCInst *MI, unsigned OpNum, + raw_ostream &O); - void printThumbS4ImmOperand(const MCInst *MI, unsigned OpNum); - void printThumbITMask(const MCInst *MI, unsigned OpNum); - void printThumbAddrModeRROperand(const MCInst *MI, unsigned OpNum); + void printThumbS4ImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); + void printThumbITMask(const MCInst *MI, unsigned OpNum, raw_ostream &O); + void printThumbAddrModeRROperand(const MCInst *MI, unsigned OpNum, + raw_ostream &O); void printThumbAddrModeRI5Operand(const MCInst *MI, unsigned OpNum, - unsigned Scale); - void printThumbAddrModeS1Operand(const MCInst *MI, unsigned OpNum); - void printThumbAddrModeS2Operand(const MCInst *MI, unsigned OpNum); - void printThumbAddrModeS4Operand(const MCInst *MI, unsigned OpNum); - void printThumbAddrModeSPOperand(const MCInst *MI, unsigned OpNum); + raw_ostream &O, unsigned Scale); + void printThumbAddrModeS1Operand(const MCInst *MI, unsigned OpNum, + raw_ostream &O); + void printThumbAddrModeS2Operand(const MCInst *MI, unsigned OpNum, + raw_ostream &O); + void printThumbAddrModeS4Operand(const MCInst *MI, unsigned OpNum, + raw_ostream &O); + void printThumbAddrModeSPOperand(const MCInst *MI, unsigned OpNum, + raw_ostream &O); - void printT2SOOperand(const MCInst *MI, unsigned OpNum); - void printT2AddrModeImm12Operand(const MCInst *MI, unsigned OpNum); - void printT2AddrModeImm8Operand(const MCInst *MI, unsigned OpNum); - void printT2AddrModeImm8s4Operand(const MCInst *MI, unsigned OpNum); - void printT2AddrModeImm8OffsetOperand(const MCInst *MI, unsigned OpNum); - void printT2AddrModeImm8s4OffsetOperand(const MCInst *MI, unsigned OpNum); - void printT2AddrModeSoRegOperand(const MCInst *MI, unsigned OpNum); + void printT2SOOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); + void printT2AddrModeImm12Operand(const MCInst *MI, unsigned OpNum, + raw_ostream &O); + void printT2AddrModeImm8Operand(const MCInst *MI, unsigned OpNum, + raw_ostream &O); + void printT2AddrModeImm8s4Operand(const MCInst *MI, unsigned OpNum, + raw_ostream &O); + void printT2AddrModeImm8OffsetOperand(const MCInst *MI, unsigned OpNum, + raw_ostream &O); + void printT2AddrModeImm8s4OffsetOperand(const MCInst *MI, unsigned OpNum, + raw_ostream &O); + void printT2AddrModeSoRegOperand(const MCInst *MI, unsigned OpNum, + raw_ostream &O); - void printCPSOptionOperand(const MCInst *MI, unsigned OpNum); - void printMSRMaskOperand(const MCInst *MI, unsigned OpNum); - void printNegZeroOperand(const MCInst *MI, unsigned OpNum); - void printPredicateOperand(const MCInst *MI, unsigned OpNum); - void printMandatoryPredicateOperand(const MCInst *MI, unsigned OpNum); - void printSBitModifierOperand(const MCInst *MI, unsigned OpNum); - void printRegisterList(const MCInst *MI, unsigned OpNum); - void printCPInstOperand(const MCInst *MI, unsigned OpNum, + void printCPSOptionOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); + void printMSRMaskOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); + void printNegZeroOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); + void printPredicateOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); + void printMandatoryPredicateOperand(const MCInst *MI, unsigned OpNum, + raw_ostream &O); + void printSBitModifierOperand(const MCInst *MI, unsigned OpNum, + raw_ostream &O); + void printRegisterList(const MCInst *MI, unsigned OpNum, raw_ostream &O); + void printCPInstOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O, const char *Modifier); - void printJTBlockOperand(const MCInst *MI, unsigned OpNum) {} - void printJT2BlockOperand(const MCInst *MI, unsigned OpNum) {} - void printTBAddrMode(const MCInst *MI, unsigned OpNum); - void printNoHashImmediate(const MCInst *MI, unsigned OpNum); - void printVFPf32ImmOperand(const MCInst *MI, unsigned OpNum); - void printVFPf64ImmOperand(const MCInst *MI, unsigned OpNum); - void printHex8ImmOperand(const MCInst *MI, int OpNum) {} - void printHex16ImmOperand(const MCInst *MI, int OpNum) {} - void printHex32ImmOperand(const MCInst *MI, int OpNum) {} - void printHex64ImmOperand(const MCInst *MI, int OpNum) {} + void printJTBlockOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) {} + void printJT2BlockOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) {} + void printTBAddrMode(const MCInst *MI, unsigned OpNum, raw_ostream &O); + void printNoHashImmediate(const MCInst *MI, unsigned OpNum, raw_ostream &O); + void printVFPf32ImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); + void printVFPf64ImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); + void printHex8ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O) {} + void printHex16ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O) {} + void printHex32ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O) {} + void printHex64ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O) {} - void printPCLabel(const MCInst *MI, unsigned OpNum); + void printPCLabel(const MCInst *MI, unsigned OpNum, raw_ostream &O); // FIXME: Implement. - void PrintSpecial(const MCInst *MI, const char *Kind) {} + void PrintSpecial(const MCInst *MI, raw_ostream &O, const char *Kind) {} }; } |