diff options
Diffstat (limited to 'lib/Target/Blackfin')
| -rw-r--r-- | lib/Target/Blackfin/BlackfinInstrInfo.td | 12 | ||||
| -rw-r--r-- | lib/Target/Blackfin/BlackfinRegisterInfo.cpp | 6 |
2 files changed, 9 insertions, 9 deletions
diff --git a/lib/Target/Blackfin/BlackfinInstrInfo.td b/lib/Target/Blackfin/BlackfinInstrInfo.td index 6bbe28a..2471688 100644 --- a/lib/Target/Blackfin/BlackfinInstrInfo.td +++ b/lib/Target/Blackfin/BlackfinInstrInfo.td @@ -65,23 +65,23 @@ def HI16 : SDNodeXForm<imm, [{ //===----------------------------------------------------------------------===// def imm3 : PatLeaf<(imm), [{return isInt<3>(N->getSExtValue());}]>; -def uimm3 : PatLeaf<(imm), [{return isUint<3>(N->getZExtValue());}]>; -def uimm4 : PatLeaf<(imm), [{return isUint<4>(N->getZExtValue());}]>; -def uimm5 : PatLeaf<(imm), [{return isUint<5>(N->getZExtValue());}]>; +def uimm3 : PatLeaf<(imm), [{return isUInt<3>(N->getZExtValue());}]>; +def uimm4 : PatLeaf<(imm), [{return isUInt<4>(N->getZExtValue());}]>; +def uimm5 : PatLeaf<(imm), [{return isUInt<5>(N->getZExtValue());}]>; def uimm5m2 : PatLeaf<(imm), [{ uint64_t value = N->getZExtValue(); - return value % 2 == 0 && isUint<5>(value); + return value % 2 == 0 && isUInt<5>(value); }]>; def uimm6m4 : PatLeaf<(imm), [{ uint64_t value = N->getZExtValue(); - return value % 4 == 0 && isUint<6>(value); + return value % 4 == 0 && isUInt<6>(value); }]>; def imm7 : PatLeaf<(imm), [{return isInt<7>(N->getSExtValue());}]>; def imm16 : PatLeaf<(imm), [{return isInt<16>(N->getSExtValue());}]>; -def uimm16 : PatLeaf<(imm), [{return isUint<16>(N->getZExtValue());}]>; +def uimm16 : PatLeaf<(imm), [{return isUInt<16>(N->getZExtValue());}]>; def ximm16 : PatLeaf<(imm), [{ int64_t value = N->getSExtValue(); diff --git a/lib/Target/Blackfin/BlackfinRegisterInfo.cpp b/lib/Target/Blackfin/BlackfinRegisterInfo.cpp index b39a342..84dc9ca 100644 --- a/lib/Target/Blackfin/BlackfinRegisterInfo.cpp +++ b/lib/Target/Blackfin/BlackfinRegisterInfo.cpp @@ -164,7 +164,7 @@ void BlackfinRegisterInfo::loadConstant(MachineBasicBlock &MBB, return; } - if (isUint<16>(value)) { + if (isUInt<16>(value)) { BuildMI(MBB, I, DL, TII.get(BF::LOADuimm16), Reg).addImm(value); return; } @@ -255,13 +255,13 @@ BlackfinRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, assert(FIPos==1 && "Bad frame index operand"); MI.getOperand(FIPos).ChangeToRegister(BaseReg, false); MI.getOperand(FIPos+1).setImm(Offset); - if (isUint<6>(Offset)) { + if (isUInt<6>(Offset)) { MI.setDesc(TII.get(isStore ? BF::STORE32p_uimm6m4 : BF::LOAD32p_uimm6m4)); return 0; } - if (BaseReg == BF::FP && isUint<7>(-Offset)) { + if (BaseReg == BF::FP && isUInt<7>(-Offset)) { MI.setDesc(TII.get(isStore ? BF::STORE32fp_nimm7m4 : BF::LOAD32fp_nimm7m4)); |
