1 files changed, 12 insertions, 12 deletions

diff --git a/lib/Target/Mips/MipsRegisterInfo.cpp b/lib/Target/Mips/MipsRegisterInfo.cpp
index aa921bc..e6a644f 100644
--- a/lib/Target/Mips/MipsRegisterInfo.cpp
+++ b/lib/Target/Mips/MipsRegisterInfo.cpp
@@ -92,20 +92,20 @@ getCalleeSavedRegs(const MachineFunction *MF) const
     return Mips32CalleeSavedRegs;
   else if (Subtarget.isABI_N32())
     return N32CalleeSavedRegs;
-  
+
   assert(Subtarget.isABI_N64());
-  return N64CalleeSavedRegs;  
+  return N64CalleeSavedRegs;
 }
 
 BitVector MipsRegisterInfo::
 getReservedRegs(const MachineFunction &MF) const {
   static const unsigned ReservedCPURegs[] = {
-    Mips::ZERO, Mips::AT, Mips::K0, Mips::K1, 
+    Mips::ZERO, Mips::AT, Mips::K0, Mips::K1,
     Mips::SP, Mips::FP, Mips::RA
   };
 
   static const unsigned ReservedCPU64Regs[] = {
-    Mips::ZERO_64, Mips::AT_64, Mips::K0_64, Mips::K1_64, 
+    Mips::ZERO_64, Mips::AT_64, Mips::K0_64, Mips::K1_64,
     Mips::SP_64, Mips::FP_64, Mips::RA_64
   };
 
@@ -134,8 +134,8 @@ getReservedRegs(const MachineFunction &MF) const {
          Reg != Mips::FGR64RegisterClass->end(); ++Reg)
       Reserved.set(*Reg);
   }
-  
-  // If GP is dedicated as a global base register, reserve it. 
+
+  // If GP is dedicated as a global base register, reserve it.
   if (MF.getInfo<MipsFunctionInfo>()->globalBaseRegFixed()) {
     Reserved.set(Mips::GP);
     Reserved.set(Mips::GP_64);
@@ -195,7 +195,7 @@ eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
   //  1. Outgoing arguments.
   //  2. Pointer to dynamically allocated stack space.
   //  3. Locations for callee-saved registers.
-  // Everything else is referenced relative to whatever register 
+  // Everything else is referenced relative to whatever register
   // getFrameRegister() returns.
   unsigned FrameReg;
 
@@ -203,15 +203,15 @@ eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
       (FrameIndex >= MinCSFI && FrameIndex <= MaxCSFI))
     FrameReg = Subtarget.isABI_N64() ? Mips::SP_64 : Mips::SP;
   else
-    FrameReg = getFrameRegister(MF); 
-  
+    FrameReg = getFrameRegister(MF);
+
   // Calculate final offset.
   // - There is no need to change the offset if the frame object is one of the
   //   following: an outgoing argument, pointer to a dynamically allocated
   //   stack space or a $gp restore location,
   // - If the frame object is any of the following, its offset must be adjusted
   //   by adding the size of the stack:
-  //   incoming argument, callee-saved register location or local variable.  
+  //   incoming argument, callee-saved register location or local variable.
   int64_t Offset;
 
   if (MipsFI->isOutArgFI(FrameIndex) || MipsFI->isGPFI(FrameIndex) ||
@@ -225,7 +225,7 @@ eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
   DEBUG(errs() << "Offset     : " << Offset << "\n" << "<--------->\n");
 
   // If MI is not a debug value, make sure Offset fits in the 16-bit immediate
-  // field. 
+  // field.
   if (!MI.isDebugValue() && !isInt<16>(Offset)) {
     MachineBasicBlock &MBB = *MI.getParent();
     DebugLoc DL = II->getDebugLoc();
@@ -233,7 +233,7 @@ eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
     unsigned Size = Subtarget.isABI_N64() ? 64 : 32;
     unsigned LUi = Subtarget.isABI_N64() ? Mips::LUi64 : Mips::LUi;
     unsigned ADDu = Subtarget.isABI_N64() ? Mips::DADDu : Mips::ADDu;
-    unsigned ZEROReg = Subtarget.isABI_N64() ? Mips::ZERO_64 : Mips::ZERO;    
+    unsigned ZEROReg = Subtarget.isABI_N64() ? Mips::ZERO_64 : Mips::ZERO;
     unsigned ATReg = Subtarget.isABI_N64() ? Mips::AT_64 : Mips::AT;
     const MipsAnalyzeImmediate::InstSeq &Seq =
       AnalyzeImm.Analyze(Offset, Size, true /* LastInstrIsADDiu */);