diff options
Diffstat (limited to 'lib/Target/PowerPC/PPCISelDAGToDAG.cpp')
| -rw-r--r-- | lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 21 |
1 files changed, 16 insertions, 5 deletions
diff --git a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp index c55bd30..7548093 100644 --- a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp +++ b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp @@ -1206,6 +1206,22 @@ SDOperand PPCDAGToDAGISel::Select(SDOperand Op) { // Other cases are autogenerated. break; + case ISD::ANY_EXTEND: + switch(N->getValueType(0)) { + default: assert(0 && "Unhandled type in ANY_EXTEND"); + case MVT::i64: + CurDAG->SelectNodeTo(N, PPC::OR8, MVT::i64, Select(N->getOperand(0)), + Select(N->getOperand(0))); + break; + } + return SDOperand(N, 0); + case ISD::ZERO_EXTEND: + assert(N->getValueType(0) == MVT::i64 && + N->getOperand(0).getValueType() == MVT::i32 && + "ZERO_EXTEND only supported for i32 -> i64"); + CurDAG->SelectNodeTo(N, PPC::RLDICL, MVT::i64, Select(N->getOperand(0)), + getI32Imm(32)); + return SDOperand(N, 0); case ISD::SHL: { unsigned Imm, SH, MB, ME; if (isOpcWithIntImmediate(N->getOperand(0).Val, ISD::AND, Imm) && @@ -1393,11 +1409,6 @@ SDOperand PPCDAGToDAGISel::Select(SDOperand Op) { SDOperand Val = Select(N->getOperand(1)); if (N->getOperand(1).getValueType() == MVT::i32) { Chain = CurDAG->getCopyToReg(Chain, PPC::R3, Val); - } else if (N->getOperand(1).getValueType() == MVT::i64) { - SDOperand Srl = CurDAG->getTargetNode(PPC::RLDICL, MVT::i64, Val, - getI32Imm(32), getI32Imm(32)); - Chain = CurDAG->getCopyToReg(Chain, PPC::R4, Val); - Chain = CurDAG->getCopyToReg(Chain, PPC::R3, Srl); } else { assert(MVT::isFloatingPoint(N->getOperand(1).getValueType())); Chain = CurDAG->getCopyToReg(Chain, PPC::F1, Val); |