3 files changed, 12 insertions, 8 deletions
diff --git a/lib/Target/PowerPC/PPCHazardRecognizers.cpp b/lib/Target/PowerPC/PPCHazardRecognizers.cpp
index 14745e6..d8a21bf 100644
--- a/lib/Target/PowerPC/PPCHazardRecognizers.cpp
+++ b/lib/Target/PowerPC/PPCHazardRecognizers.cpp
@@ -15,6 +15,7 @@
 #include "PPCHazardRecognizers.h"
 #include "PPC.h"
 #include "PPCInstrInfo.h"
+#include "llvm/CodeGen/ScheduleDAG.h"
 #include "llvm/Support/Debug.h"
 using namespace llvm;
 
@@ -118,8 +119,9 @@ isLoadOfStoredAddress(unsigned LoadSize, SDValue Ptr1, SDValue Ptr2) const {
 /// terminate terminate the dispatch group.  We turn NoopHazard for any
 /// instructions that wouldn't terminate the dispatch group that would cause a
 /// pipeline flush.
-HazardRecognizer::HazardType PPCHazardRecognizer970::
-getHazardType(SDNode *Node) {
+ScheduleHazardRecognizer::HazardType PPCHazardRecognizer970::
+getHazardType(SUnit *SU) {
+  const SDNode *Node = SU->getNode()->getFlaggedMachineNode();
   bool isFirst, isSingle, isCracked, isLoad, isStore;
   PPCII::PPC970_Unit InstrType = 
     GetInstrType(Node->getOpcode(), isFirst, isSingle, isCracked,
@@ -217,7 +219,8 @@ getHazardType(SDNode *Node) {
   return NoHazard;
 }
 
-void PPCHazardRecognizer970::EmitInstruction(SDNode *Node) {
+void PPCHazardRecognizer970::EmitInstruction(SUnit *SU) {
+  const SDNode *Node = SU->getNode()->getFlaggedMachineNode();
   bool isFirst, isSingle, isCracked, isLoad, isStore;
   PPCII::PPC970_Unit InstrType = 
     GetInstrType(Node->getOpcode(), isFirst, isSingle, isCracked,
diff --git a/lib/Target/PowerPC/PPCHazardRecognizers.h b/lib/Target/PowerPC/PPCHazardRecognizers.h
index 8957d18..a596255 100644
--- a/lib/Target/PowerPC/PPCHazardRecognizers.h
+++ b/lib/Target/PowerPC/PPCHazardRecognizers.h
@@ -14,7 +14,8 @@
 #ifndef PPCHAZRECS_H
 #define PPCHAZRECS_H
 
-#include "llvm/CodeGen/ScheduleDAGSDNodes.h"
+#include "llvm/CodeGen/ScheduleHazardRecognizer.h"
+#include "llvm/CodeGen/SelectionDAGNodes.h"
 #include "PPCInstrInfo.h"
 
 namespace llvm {
@@ -25,7 +26,7 @@ namespace llvm {
 /// avoid structural hazards that cause significant performance penalties (e.g.
 /// setting the CTR register then branching through it within a dispatch group),
 /// or storing then loading from the same address within a dispatch group.
-class PPCHazardRecognizer970 : public HazardRecognizer {
+class PPCHazardRecognizer970 : public ScheduleHazardRecognizer {
   const TargetInstrInfo &TII;
   
   unsigned NumIssued;  // Number of insts issued, including advanced cycles.
@@ -47,8 +48,8 @@ class PPCHazardRecognizer970 : public HazardRecognizer {
   
 public:
   PPCHazardRecognizer970(const TargetInstrInfo &TII);
-  virtual HazardType getHazardType(SDNode *Node);
-  virtual void EmitInstruction(SDNode *Node);
+  virtual HazardType getHazardType(SUnit *SU);
+  virtual void EmitInstruction(SUnit *SU);
   virtual void AdvanceCycle();
   virtual void EmitNoop();
   
diff --git a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
index a86604b..0259a72 100644
--- a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
+++ b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -181,7 +181,7 @@ namespace {
     
     /// CreateTargetHazardRecognizer - Return the hazard recognizer to use for
     /// this target when scheduling the DAG.
-    virtual HazardRecognizer *CreateTargetHazardRecognizer() {
+    virtual ScheduleHazardRecognizer *CreateTargetHazardRecognizer() {
       // Should use subtarget info to pick the right hazard recognizer.  For
       // now, always return a PPC970 recognizer.
       const TargetInstrInfo *II = TM.getInstrInfo();