diff options
Diffstat (limited to 'lib/Target/SparcV9/ModuloScheduling')
8 files changed, 541 insertions, 541 deletions
diff --git a/lib/Target/SparcV9/ModuloScheduling/DependenceAnalyzer.cpp b/lib/Target/SparcV9/ModuloScheduling/DependenceAnalyzer.cpp index 53f12ed..b99ecdf 100644 --- a/lib/Target/SparcV9/ModuloScheduling/DependenceAnalyzer.cpp +++ b/lib/Target/SparcV9/ModuloScheduling/DependenceAnalyzer.cpp @@ -6,10 +6,10 @@ // the University of Illinois Open Source License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// -// -// -// -// +// +// +// +// //===----------------------------------------------------------------------===// #define DEBUG_TYPE "ModuloSched" @@ -23,25 +23,25 @@ using namespace llvm; /// namespace llvm { FunctionPass *createDependenceAnalyzer() { - return new DependenceAnalyzer(); + return new DependenceAnalyzer(); } } bool DependenceAnalyzer::runOnFunction(Function &F) { AA = &getAnalysis<AliasAnalysis>(); TD = &getAnalysis<TargetData>(); - + return false; } static RegisterAnalysis<DependenceAnalyzer>X("depanalyzer", "Dependence Analyzer"); - + DependenceResult DependenceAnalyzer::getDependenceInfo(Instruction *inst1, Instruction *inst2) { std::vector<Dependence> deps; DEBUG(std::cerr << "Inst1: " << *inst1 << "\n"); DEBUG(std::cerr << "Inst2: " << *inst2 << "\n"); - + if(LoadInst *ldInst = dyn_cast<LoadInst>(inst1)) { @@ -55,7 +55,7 @@ FunctionPass *createDependenceAnalyzer() { if(AA->alias(ldOp, (unsigned)TD->getTypeSize(ldOp->getType()), stOp,(unsigned)TD->getTypeSize(stOp->getType())) != AliasAnalysis::NoAlias) { - + //Anti Dep deps.push_back(Dependence(0, Dependence::AntiDep)); } @@ -63,7 +63,7 @@ FunctionPass *createDependenceAnalyzer() { } else if(StoreInst *stInst = dyn_cast<StoreInst>(inst1)) { - + if(LoadInst *ldInst = dyn_cast<LoadInst>(inst2)) { //Get load mem ref Value *ldOp = ldInst->getOperand(0); @@ -75,7 +75,7 @@ FunctionPass *createDependenceAnalyzer() { if(AA->alias(ldOp, (unsigned)TD->getTypeSize(ldOp->getType()), stOp,(unsigned)TD->getTypeSize(stOp->getType())) != AliasAnalysis::NoAlias) { - + //Anti Dep deps.push_back(Dependence(0, Dependence::TrueDep)); } @@ -88,17 +88,17 @@ FunctionPass *createDependenceAnalyzer() { //Get store mem ref Value *stOp2 = stInst2->getOperand(1); - + if(AA->alias(stOp1, (unsigned)TD->getTypeSize(stOp1->getType()), stOp2,(unsigned)TD->getTypeSize(stOp2->getType())) != AliasAnalysis::NoAlias) { - + //Anti Dep deps.push_back(Dependence(0, Dependence::OutputDep)); } } - + } else assert("Expected a load or a store\n"); diff --git a/lib/Target/SparcV9/ModuloScheduling/DependenceAnalyzer.h b/lib/Target/SparcV9/ModuloScheduling/DependenceAnalyzer.h index 18f6420..6223fb7 100644 --- a/lib/Target/SparcV9/ModuloScheduling/DependenceAnalyzer.h +++ b/lib/Target/SparcV9/ModuloScheduling/DependenceAnalyzer.h @@ -6,8 +6,8 @@ // the University of Illinois Open Source License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// -// -// +// +// //===----------------------------------------------------------------------===// #ifndef LLVM_DEPENDENCEANALYZER_H @@ -24,22 +24,22 @@ namespace llvm { //class to represent a dependence struct Dependence { - + enum DataDepType { TrueDep, AntiDep, OutputDep, NonDateDep, }; - + Dependence(int diff, DataDepType dep) : iteDiff(diff), depType(dep) {} unsigned getIteDiff() { return iteDiff; } unsigned getDepType() { return depType; } - + private: - + unsigned iteDiff; unsigned depType; }; - + struct DependenceResult { std::vector<Dependence> dependences; DependenceResult(const std::vector<Dependence> &d) : dependences(d) {} @@ -49,12 +49,12 @@ namespace llvm { class DependenceAnalyzer : public FunctionPass { AliasAnalysis *AA; TargetData *TD; - + public: DependenceAnalyzer() { AA = 0; TD = 0; } virtual bool runOnFunction(Function &F); virtual const char* getPassName() const { return "DependenceAnalyzer"; } - + // getAnalysisUsage virtual void getAnalysisUsage(AnalysisUsage &AU) const { AU.addRequired<AliasAnalysis>(); diff --git a/lib/Target/SparcV9/ModuloScheduling/MSSchedule.cpp b/lib/Target/SparcV9/ModuloScheduling/MSSchedule.cpp index 5855f0a..d1aaa4f 100644 --- a/lib/Target/SparcV9/ModuloScheduling/MSSchedule.cpp +++ b/lib/Target/SparcV9/ModuloScheduling/MSSchedule.cpp @@ -7,7 +7,7 @@ // //===----------------------------------------------------------------------===// // -// +// // //===----------------------------------------------------------------------===// #define DEBUG_TYPE "ModuloSched" @@ -21,7 +21,7 @@ using namespace llvm; //Returns a boolean indicating if the start cycle needs to be increased/decreased bool MSSchedule::insert(MSchedGraphNode *node, int cycle) { - + //First, check if the cycle has a spot free to start if(schedule.find(cycle) != schedule.end()) { //Check if we have a free issue slot at this cycle @@ -48,7 +48,7 @@ bool MSSchedule::insert(MSchedGraphNode *node, int cycle) { DEBUG(std::cerr << "All issue slots taken\n"); return true; - + } void MSSchedule::addToSchedule(int cycle, MSchedGraphNode *node) { @@ -64,31 +64,31 @@ void MSSchedule::addToSchedule(int cycle, MSchedGraphNode *node) { std::vector<MSchedGraphNode*> nodes; for(std::map<unsigned, MSchedGraphNode*>::iterator I = indexMap.begin(), E = indexMap.end(); I != E; ++I) nodes.push_back(I->second); - + schedule[cycle] = nodes; } bool MSSchedule::resourcesFree(MSchedGraphNode *node, int cycle) { - + //Get Resource usage for this instruction const TargetSchedInfo *msi = node->getParent()->getTarget()->getSchedInfo(); int currentCycle = cycle; bool success = true; - + //Get resource usage for this instruction InstrRUsage rUsage = msi->getInstrRUsage(node->getInst()->getOpcode()); std::vector<std::vector<resourceId_t> > resources = rUsage.resourcesByCycle; - + //Loop over resources in each cycle and increments their usage count for(unsigned i=0; i < resources.size(); ++i) { for(unsigned j=0; j < resources[i].size(); ++j) { - + //Get Resource to check its availability int resourceNum = resources[i][j]; - + DEBUG(std::cerr << "Attempting to schedule Resource Num: " << resourceNum << " in cycle: " << currentCycle << "\n"); - + //Check if this resource is available for this cycle std::map<int, std::map<int,int> >::iterator resourcesForCycle = resourceNumPerCycle.find(currentCycle); @@ -100,7 +100,7 @@ bool MSSchedule::resourcesFree(MSchedGraphNode *node, int cycle) { //Check if there are enough of this resource and if so, increase count and move on if(resourceUse->second < CPUResource::getCPUResource(resourceNum)->maxNumUsers) ++resourceUse->second; - + else { DEBUG(std::cerr << "No resource num " << resourceNum << " available for cycle " << currentCycle << "\n"); success = false; @@ -123,18 +123,18 @@ bool MSSchedule::resourcesFree(MSchedGraphNode *node, int cycle) { if(!success) break; - + //Increase cycle currentCycle++; } - + if(!success) { int oldCycle = cycle; DEBUG(std::cerr << "Backtrack\n"); //Get resource usage for this instruction InstrRUsage rUsage = msi->getInstrRUsage(node->getInst()->getOpcode()); std::vector<std::vector<resourceId_t> > resources = rUsage.resourcesByCycle; - + //Loop over resources in each cycle and increments their usage count for(unsigned i=0; i < resources.size(); ++i) { if(oldCycle < currentCycle) { @@ -158,7 +158,7 @@ bool MSSchedule::resourcesFree(MSchedGraphNode *node, int cycle) { oldCycle++; } return false; - + } return true; @@ -166,7 +166,7 @@ bool MSSchedule::resourcesFree(MSchedGraphNode *node, int cycle) { } bool MSSchedule::constructKernel(int II, std::vector<MSchedGraphNode*> &branches, std::map<const MachineInstr*, unsigned> &indVar) { - + //Our schedule is allowed to have negative numbers, so lets calculate this offset int offset = schedule.begin()->first; if(offset > 0) @@ -184,12 +184,12 @@ bool MSSchedule::constructKernel(int II, std::vector<MSchedGraphNode*> &branches int maxSN = 0; DEBUG(std::cerr << "Number of Stages: " << stageNum << "\n"); - + for(int index = offset; index < (II+offset); ++index) { int count = 0; - for(int i = index; i <= (schedule.rbegin()->first); i+=II) { + for(int i = index; i <= (schedule.rbegin()->first); i+=II) { if(schedule.count(i)) { - for(std::vector<MSchedGraphNode*>::iterator I = schedule[i].begin(), + for(std::vector<MSchedGraphNode*>::iterator I = schedule[i].begin(), E = schedule[i].end(); I != E; ++I) { //Check if its a branch if((*I)->isBranch()) { @@ -228,7 +228,7 @@ bool MSSchedule::constructKernel(int II, std::vector<MSchedGraphNode*> &branches indVar.erase(N->second); } } - + kernel.push_back(std::make_pair((MachineInstr*) I->first->getInst(), I->second)); } @@ -256,7 +256,7 @@ bool MSSchedule::constructKernel(int II, std::vector<MSchedGraphNode*> &branches void MSSchedule::print(std::ostream &os) const { os << "Schedule:\n"; - + for(schedule_const_iterator I = schedule.begin(), E = schedule.end(); I != E; ++I) { os << "Cycle: " << I->first << "\n"; for(std::vector<MSchedGraphNode*>::const_iterator node = I->second.begin(), nodeEnd = I->second.end(); node != nodeEnd; ++node) @@ -268,4 +268,4 @@ void MSSchedule::print(std::ostream &os) const { E = kernel.end(); I != E; ++I) os << "Node: " << *(I->first) << " Stage: " << I->second << "\n"; } - + diff --git a/lib/Target/SparcV9/ModuloScheduling/MSSchedule.h b/lib/Target/SparcV9/ModuloScheduling/MSSchedule.h index 16cbab1..d9f42a2 100644 --- a/lib/Target/SparcV9/ModuloScheduling/MSSchedule.h +++ b/lib/Target/SparcV9/ModuloScheduling/MSSchedule.h @@ -23,7 +23,7 @@ namespace llvm { class MSSchedule { std::map<int, std::vector<MSchedGraphNode*> > schedule; unsigned numIssue; - + //Internal map to keep track of explicit resources std::map<int, std::map<int, int> > resourceNumPerCycle; @@ -49,7 +49,7 @@ namespace llvm { bool constructKernel(int II, std::vector<MSchedGraphNode*> &branches, std::map<const MachineInstr*, unsigned> &indVar); int getMaxStage() { return maxStage; } - + //iterators typedef std::map<int, std::vector<MSchedGraphNode*> >::iterator schedule_iterator; typedef std::map<int, std::vector<MSchedGraphNode*> >::const_iterator schedule_const_iterator; @@ -61,7 +61,7 @@ namespace llvm { typedef std::vector<std::pair<MachineInstr*, int> >::const_iterator kernel_const_iterator; kernel_iterator kernel_begin() { return kernel.begin(); } kernel_iterator kernel_end() { return kernel.end(); } - + }; } diff --git a/lib/Target/SparcV9/ModuloScheduling/MSchedGraph.cpp b/lib/Target/SparcV9/ModuloScheduling/MSchedGraph.cpp index dc5c3b0..6cd6d94 100644 --- a/lib/Target/SparcV9/ModuloScheduling/MSchedGraph.cpp +++ b/lib/Target/SparcV9/ModuloScheduling/MSchedGraph.cpp @@ -10,7 +10,7 @@ // A graph class for dependencies. This graph only contains true, anti, and // output data dependencies for a given MachineBasicBlock. Dependencies // across iterations are also computed. Unless data dependence analysis -// is provided, a conservative approach of adding dependencies between all +// is provided, a conservative approach of adding dependencies between all // loads and stores is taken. //===----------------------------------------------------------------------===// #define DEBUG_TYPE "ModuloSched" @@ -31,9 +31,9 @@ using namespace llvm; //MSchedGraphNode constructor -MSchedGraphNode::MSchedGraphNode(const MachineInstr* inst, +MSchedGraphNode::MSchedGraphNode(const MachineInstr* inst, MSchedGraph *graph, unsigned idx, - unsigned late, bool isBranch) + unsigned late, bool isBranch) : Inst(inst), Parent(graph), index(idx), latency(late), isBranchInstr(isBranch) { //Add to the graph @@ -41,7 +41,7 @@ MSchedGraphNode::MSchedGraphNode(const MachineInstr* inst, } //MSchedGraphNode copy constructor -MSchedGraphNode::MSchedGraphNode(const MSchedGraphNode &N) +MSchedGraphNode::MSchedGraphNode(const MSchedGraphNode &N) : Predecessors(N.Predecessors), Successors(N.Successors) { Inst = N.Inst; @@ -54,7 +54,7 @@ MSchedGraphNode::MSchedGraphNode(const MSchedGraphNode &N) //Print the node (instruction and latency) void MSchedGraphNode::print(std::ostream &os) const { - os << "MSchedGraphNode: Inst=" << *Inst << ", latency= " << latency << "\n"; + os << "MSchedGraphNode: Inst=" << *Inst << ", latency= " << latency << "\n"; } @@ -62,7 +62,7 @@ void MSchedGraphNode::print(std::ostream &os) const { MSchedGraphEdge MSchedGraphNode::getInEdge(MSchedGraphNode *pred) { //Loop over all the successors of our predecessor //return the edge the corresponds to this in edge - for (MSchedGraphNode::succ_iterator I = pred->succ_begin(), + for (MSchedGraphNode::succ_iterator I = pred->succ_begin(), E = pred->succ_end(); I != E; ++I) { if (*I == this) return I.getEdge(); @@ -115,24 +115,24 @@ bool MSchedGraphNode::isPredecessor(MSchedGraphNode *pred) { //Add a node to the graph void MSchedGraph::addNode(const MachineInstr *MI, MSchedGraphNode *node) { - - //Make sure node does not already exist - assert(GraphMap.find(MI) == GraphMap.end() + + //Make sure node does not already exist + assert(GraphMap.find(MI) == GraphMap.end() && "New MSchedGraphNode already exists for this instruction"); - + GraphMap[MI] = node; } //Delete a node to the graph void MSchedGraph::deleteNode(MSchedGraphNode *node) { - + //Delete the edge to this node from all predecessors while(node->pred_size() > 0) { - //DEBUG(std::cerr << "Delete edge from: " << **P << " to " << *node << "\n"); + //DEBUG(std::cerr << "Delete edge from: " << **P << " to " << *node << "\n"); MSchedGraphNode *pred = *(node->pred_begin()); pred->deleteSuccessor(node); } - + //Remove this node from the graph GraphMap.erase(node->getInst()); @@ -141,15 +141,15 @@ void MSchedGraph::deleteNode(MSchedGraphNode *node) { //Create a graph for a machine block. The ignoreInstrs map is so that we ignore instructions //associated to the index variable since this is a special case in Modulo Scheduling. //We only want to deal with the body of the loop. -MSchedGraph::MSchedGraph(const MachineBasicBlock *bb, const TargetMachine &targ, - std::map<const MachineInstr*, unsigned> &ignoreInstrs, +MSchedGraph::MSchedGraph(const MachineBasicBlock *bb, const TargetMachine &targ, + std::map<const MachineInstr*, unsigned> &ignoreInstrs, DependenceAnalyzer &DA, std::map<MachineInstr*, Instruction*> &machineTollvm ) : BB(bb), Target(targ) { - - //Make sure BB is not null, + + //Make sure BB is not null, assert(BB != NULL && "Basic Block is null"); - + //DEBUG(std::cerr << "Constructing graph for " << bb << "\n"); //Create nodes and edges for this BB @@ -160,22 +160,22 @@ MSchedGraph::MSchedGraph(const MachineBasicBlock *bb, const TargetMachine &targ, } //Copies the graph and keeps a map from old to new nodes -MSchedGraph::MSchedGraph(const MSchedGraph &G, std::map<MSchedGraphNode*, MSchedGraphNode*> &newNodes) +MSchedGraph::MSchedGraph(const MSchedGraph &G, std::map<MSchedGraphNode*, MSchedGraphNode*> &newNodes) : BB(G.BB), Target(G.Target) { - + std::map<MSchedGraphNode*, MSchedGraphNode*> oldToNew; //Copy all nodes - for(MSchedGraph::const_iterator N = G.GraphMap.begin(), NE = G.GraphMap.end(); + for(MSchedGraph::const_iterator N = G.GraphMap.begin(), NE = G.GraphMap.end(); N != NE; ++N) { MSchedGraphNode *newNode = new MSchedGraphNode(*(N->second)); oldToNew[&*(N->second)] = newNode; newNodes[newNode] = &*(N->second); GraphMap[&*(N->first)] = newNode; } - + //Loop over nodes and update edges to point to new nodes for(MSchedGraph::iterator N = GraphMap.begin(), NE = GraphMap.end(); N != NE; ++N) { - + //Get the node we are dealing with MSchedGraphNode *node = &*(N->second); @@ -185,13 +185,13 @@ MSchedGraph::MSchedGraph(const MSchedGraph &G, std::map<MSchedGraphNode*, MSched for(unsigned i = 0; i < node->pred_size(); ++i) { node->setPredecessor(i, oldToNew[node->getPredecessor(i)]); } - + for(unsigned i = 0; i < node->succ_size(); ++i) { MSchedGraphEdge *edge = node->getSuccessor(i); MSchedGraphNode *oldDest = edge->getDest(); edge->setDest(oldToNew[oldDest]); } - } + } } //Deconstructor, deletes all nodes in the graph @@ -202,7 +202,7 @@ MSchedGraph::~MSchedGraph () { //Experimental code to add edges from the branch to all nodes dependent upon it. -void hasPath(MSchedGraphNode *node, std::set<MSchedGraphNode*> &visited, +void hasPath(MSchedGraphNode *node, std::set<MSchedGraphNode*> &visited, std::set<MSchedGraphNode*> &branches, MSchedGraphNode *startNode, std::set<std::pair<MSchedGraphNode*,MSchedGraphNode*> > &newEdges ) { @@ -214,7 +214,7 @@ void hasPath(MSchedGraphNode *node, std::set<MSchedGraphNode*> &visited, MSchedGraphNode *dest = edge->getDest(); if(branches.count(dest)) newEdges.insert(std::make_pair(dest, startNode)); - + //only visit if we have not already else if(!visited.count(dest)) { if(edge->getIteDiff() == 0) @@ -246,26 +246,26 @@ void MSchedGraph::addBranchEdges() { //Spit out all edges we are going to add unsigned min = GraphMap.size(); if(newEdges.size() == 1) { - ((newEdges.begin())->first)->addOutEdge(((newEdges.begin())->second), - MSchedGraphEdge::BranchDep, + ((newEdges.begin())->first)->addOutEdge(((newEdges.begin())->second), + MSchedGraphEdge::BranchDep, MSchedGraphEdge::NonDataDep, 1); } else { - + unsigned count = 0; MSchedGraphNode *start; MSchedGraphNode *end; for(std::set<std::pair<MSchedGraphNode*, MSchedGraphNode*> >::iterator I = newEdges.begin(), E = newEdges.end(); I != E; ++I) { - + DEBUG(std::cerr << "Branch Edge from: " << *(I->first) << " to " << *(I->second) << "\n"); - + // if(I->second->getIndex() <= min) { start = I->first; end = I->second; //min = I->second->getIndex(); //} - start->addOutEdge(end, - MSchedGraphEdge::BranchDep, + start->addOutEdge(end, + MSchedGraphEdge::BranchDep, MSchedGraphEdge::NonDataDep, 1); } } @@ -276,7 +276,7 @@ void MSchedGraph::addBranchEdges() { void MSchedGraph::buildNodesAndEdges(std::map<const MachineInstr*, unsigned> &ignoreInstrs, DependenceAnalyzer &DA, std::map<MachineInstr*, Instruction*> &machineTollvm) { - + //Get Machine target information for calculating latency const TargetInstrInfo *MTI = Target.getInstrInfo(); @@ -300,7 +300,7 @@ void MSchedGraph::buildNodesAndEdges(std::map<const MachineInstr*, unsigned> &ig //Get each instruction of machine basic block, get the delay //using the op code, create a new node for it, and add to the //graph. - + MachineOpCode opCode = MI->getOpcode(); int delay; @@ -313,12 +313,12 @@ void MSchedGraph::buildNodesAndEdges(std::map<const MachineInstr*, unsigned> &ig #endif //Get delay delay = MTI->maxLatency(opCode); - + //Create new node for this machine instruction and add to the graph. //Create only if not a nop if(MTI->isNop(opCode)) continue; - + //Sparc BE does not use PHI opcode, so assert on this case assert(opCode != TargetInstrInfo::PHI && "Did not expect PHI opcode"); @@ -331,9 +331,9 @@ void MSchedGraph::buildNodesAndEdges(std::map<const MachineInstr*, unsigned> &ig //Node is created and added to the graph automatically MSchedGraphNode *node = new MSchedGraphNode(MI, this, index, delay, isBranch); - DEBUG(std::cerr << "Created Node: " << *node << "\n"); + DEBUG(std::cerr << "Created Node: " << *node << "\n"); - //Check OpCode to keep track of memory operations to add memory dependencies later. + //Check OpCode to keep track of memory operations to add memory dependencies later. if(MTI->isLoad(opCode) || MTI->isStore(opCode)) memInstructions.push_back(node); @@ -343,8 +343,8 @@ void MSchedGraph::buildNodesAndEdges(std::map<const MachineInstr*, unsigned> &ig for(unsigned i=0; i < MI->getNumOperands(); ++i) { //Get Operand const MachineOperand &mOp = MI->getOperand(i); - - //Check if it has an allocated register + + //Check if it has an allocated register if(mOp.hasAllocatedReg()) { int regNum = mOp.getReg(); @@ -354,8 +354,8 @@ void MSchedGraph::buildNodesAndEdges(std::map<const MachineInstr*, unsigned> &ig } continue; } - - + + //Add virtual registers dependencies //Check if any exist in the value map already and create dependencies //between them. @@ -369,19 +369,19 @@ void MSchedGraph::buildNodesAndEdges(std::map<const MachineInstr*, unsigned> &ig DEBUG(std::cerr << "Read Operation in a PHI node\n"); continue; } - + if (const Value* srcI = mOp.getVRegValue()) { - + //Find value in the map - std::map<const Value*, std::vector<OpIndexNodePair> >::iterator V + std::map<const Value*, std::vector<OpIndexNodePair> >::iterator V = valuetoNodeMap.find(srcI); - + //If there is something in the map already, add edges from //those instructions //to this one we are processing if(V != valuetoNodeMap.end()) { addValueEdges(V->second, node, mOp.isUse(), mOp.isDef(), phiInstrs); - + //Add to value map V->second.push_back(std::make_pair(i,node)); } @@ -390,7 +390,7 @@ void MSchedGraph::buildNodesAndEdges(std::map<const MachineInstr*, unsigned> &ig //Put into value map valuetoNodeMap[mOp.getVRegValue()].push_back(std::make_pair(i, node)); } - } + } } ++index; } @@ -437,7 +437,7 @@ void MSchedGraph::buildNodesAndEdges(std::map<const MachineInstr*, unsigned> &ig if (const Value* srcI = mOp.getVRegValue()) { //Find value in the map - std::map<const Value*, std::vector<OpIndexNodePair> >::iterator V + std::map<const Value*, std::vector<OpIndexNodePair> >::iterator V = valuetoNodeMap.find(srcI); //If there is something in the map already, add edges from @@ -449,17 +449,17 @@ void MSchedGraph::buildNodesAndEdges(std::map<const MachineInstr*, unsigned> &ig } } } - } + } } //Add dependencies for Value*s void MSchedGraph::addValueEdges(std::vector<OpIndexNodePair> &NodesInMap, - MSchedGraphNode *destNode, bool nodeIsUse, + MSchedGraphNode *destNode, bool nodeIsUse, bool nodeIsDef, std::vector<const MachineInstr*> &phiInstrs, int diff) { - for(std::vector<OpIndexNodePair>::iterator I = NodesInMap.begin(), + for(std::vector<OpIndexNodePair>::iterator I = NodesInMap.begin(), E = NodesInMap.end(); I != E; ++I) { - + //Get node in vectors machine operand that is the same value as node MSchedGraphNode *srcNode = I->second; MachineOperand mOp = srcNode->getInst()->getOperand(I->first); @@ -472,23 +472,23 @@ void MSchedGraph::addValueEdges(std::vector<OpIndexNodePair> &NodesInMap, if(nodeIsDef) { if(mOp.isUse()) { DEBUG(std::cerr << "Edge from " << *srcNode << " to " << *destNode << " (itediff=" << diff << ", type=anti)\n"); - srcNode->addOutEdge(destNode, MSchedGraphEdge::ValueDep, + srcNode->addOutEdge(destNode, MSchedGraphEdge::ValueDep, MSchedGraphEdge::AntiDep, diff); } if(mOp.isDef()) { DEBUG(std::cerr << "Edge from " << *srcNode << " to " << *destNode << " (itediff=" << diff << ", type=output)\n"); - srcNode->addOutEdge(destNode, MSchedGraphEdge::ValueDep, + srcNode->addOutEdge(destNode, MSchedGraphEdge::ValueDep, MSchedGraphEdge::OutputDep, diff); } } if(nodeIsUse) { if(mOp.isDef()) { DEBUG(std::cerr << "Edge from " << *srcNode << " to " << *destNode << " (itediff=" << diff << ", type=true)\n"); - srcNode->addOutEdge(destNode, MSchedGraphEdge::ValueDep, + srcNode->addOutEdge(destNode, MSchedGraphEdge::ValueDep, MSchedGraphEdge::TrueDep, diff); } } - } + } } //Add dependencies for machine registers across iterations @@ -502,24 +502,24 @@ void MSchedGraph::addMachRegEdges(std::map<int, std::vector<OpIndexNodePair> >& //Get Vector of nodes that use this register std::vector<OpIndexNodePair> Nodes = (*I).second; - + //Loop over nodes and determine the dependence between the other //nodes in the vector for(unsigned i =0; i < Nodes.size(); ++i) { - + //Get src node operator index that uses this machine register int srcOpIndex = Nodes[i].first; - + //Get the actual src Node MSchedGraphNode *srcNode = Nodes[i].second; - + //Get Operand const MachineOperand &srcMOp = srcNode->getInst()->getOperand(srcOpIndex); - + bool srcIsUseandDef = srcMOp.isDef() && srcMOp.isUse(); bool srcIsUse = srcMOp.isUse() && !srcMOp.isDef(); - - + + //Look at all instructions after this in execution order for(unsigned j=i+1; j < Nodes.size(); ++j) { @@ -529,11 +529,11 @@ void MSchedGraph::addMachRegEdges(std::map<int, std::vector<OpIndexNodePair> >& if(srcIsUse) srcNode->addOutEdge(Nodes[j].second, MSchedGraphEdge::MachineRegister, MSchedGraphEdge::AntiDep); - + else if(srcIsUseandDef) { srcNode->addOutEdge(Nodes[j].second, MSchedGraphEdge::MachineRegister, MSchedGraphEdge::AntiDep); - + srcNode->addOutEdge(Nodes[j].second, MSchedGraphEdge::MachineRegister, MSchedGraphEdge::OutputDep); } @@ -547,9 +547,9 @@ void MSchedGraph::addMachRegEdges(std::map<int, std::vector<OpIndexNodePair> >& srcNode->addOutEdge(Nodes[j].second, MSchedGraphEdge::MachineRegister, MSchedGraphEdge::TrueDep); } - + } - + //Look at all the instructions before this one since machine registers //could live across iterations. for(unsigned j = 0; j < i; ++j) { @@ -559,11 +559,11 @@ void MSchedGraph::addMachRegEdges(std::map<int, std::vector<OpIndexNodePair> >& if(srcIsUse) srcNode->addOutEdge(Nodes[j].second, MSchedGraphEdge::MachineRegister, MSchedGraphEdge::AntiDep, 1); - + else if(srcIsUseandDef) { srcNode->addOutEdge(Nodes[j].second, MSchedGraphEdge::MachineRegister, MSchedGraphEdge::AntiDep, 1); - + srcNode->addOutEdge(Nodes[j].second, MSchedGraphEdge::MachineRegister, MSchedGraphEdge::OutputDep, 1); } @@ -582,19 +582,19 @@ void MSchedGraph::addMachRegEdges(std::map<int, std::vector<OpIndexNodePair> >& } } - + } - + } //Add edges between all loads and stores //Can be less strict with alias analysis and data dependence analysis. -void MSchedGraph::addMemEdges(const std::vector<MSchedGraphNode*>& memInst, DependenceAnalyzer &DA, +void MSchedGraph::addMemEdges(const std::vector<MSchedGraphNode*>& memInst, DependenceAnalyzer &DA, std::map<MachineInstr*, Instruction*> &machineTollvm) { //Get Target machine instruction info const TargetInstrInfo *TMI = Target.getInstrInfo(); - + //Loop over all memory instructions in the vector //Knowing that they are in execution, add true, anti, and output dependencies for (unsigned srcIndex = 0; srcIndex < memInst.size(); ++srcIndex) { @@ -603,12 +603,12 @@ void MSchedGraph::addMemEdges(const std::vector<MSchedGraphNode*>& memInst, Depe //Get the machine opCode to determine type of memory instruction MachineOpCode srcNodeOpCode = srcInst->getOpcode(); - + //All instructions after this one in execution order have an iteration delay of 0 for(unsigned destIndex = srcIndex + 1; destIndex < memInst.size(); ++destIndex) { - + MachineInstr *destInst = (MachineInstr*) memInst[destIndex]->getInst(); - + DEBUG(std::cerr << "MInst1: " << *srcInst << "\n"); DEBUG(std::cerr << "Inst1: " << *machineTollvm[srcInst] << "\n"); DEBUG(std::cerr << "MInst2: " << *destInst << "\n"); @@ -619,17 +619,17 @@ void MSchedGraph::addMemEdges(const std::vector<MSchedGraphNode*>& memInst, Depe for(std::vector<Dependence>::iterator d = dr.dependences.begin(), de = dr.dependences.end(); d != de; ++d) { //Add edge from load to store - memInst[srcIndex]->addOutEdge(memInst[destIndex], - MSchedGraphEdge::MemoryDep, + memInst[srcIndex]->addOutEdge(memInst[destIndex], + MSchedGraphEdge::MemoryDep, d->getDepType(), d->getIteDiff()); } } - + //All instructions before the src in execution order have an iteration delay of 1 for(unsigned destIndex = 0; destIndex < srcIndex; ++destIndex) { - + MachineInstr *destInst = (MachineInstr*) memInst[destIndex]->getInst(); bool malias = false; @@ -652,14 +652,14 @@ void MSchedGraph::addMemEdges(const std::vector<MSchedGraphNode*>& memInst, Depe malias = true; //Only add the edge if we can't verify that they do not alias - /*if(AA.alias(mOp2.getVRegValue(), + /*if(AA.alias(mOp2.getVRegValue(), (unsigned)TD.getTypeSize(mOp2.getVRegValue()->getType()), - mOp.getVRegValue(), + mOp.getVRegValue(), (unsigned)TD.getTypeSize(mOp.getVRegValue()->getType())) != AliasAnalysis::NoAlias) {*/ if(TMI->isStore(memInst[destIndex]->getInst()->getOpcode())) - memInst[srcIndex]->addOutEdge(memInst[destIndex], - MSchedGraphEdge::MemoryDep, + memInst[srcIndex]->addOutEdge(memInst[destIndex], + MSchedGraphEdge::MemoryDep, MSchedGraphEdge::AntiDep, 1); //} } @@ -681,24 +681,24 @@ void MSchedGraph::addMemEdges(const std::vector<MSchedGraphNode*>& memInst, Depe malias = true; //Only add the edge if we can't verify that they do not alias - /*if(AA.alias(mOp2.getVRegValue(), + /*if(AA.alias(mOp2.getVRegValue(), (unsigned)TD.getTypeSize(mOp2.getVRegValue()->getType()), - mOp.getVRegValue(), + mOp.getVRegValue(), (unsigned)TD.getTypeSize(mOp.getVRegValue()->getType())) != AliasAnalysis::NoAlias) {*/ if(TMI->isStore(memInst[destIndex]->getInst()->getOpcode())) - memInst[srcIndex]->addOutEdge(memInst[destIndex], - MSchedGraphEdge::MemoryDep, + memInst[srcIndex]->addOutEdge(memInst[destIndex], + MSchedGraphEdge::MemoryDep, MSchedGraphEdge::OutputDep, 1); else - memInst[srcIndex]->addOutEdge(memInst[destIndex], - MSchedGraphEdge::MemoryDep, + memInst[srcIndex]->addOutEdge(memInst[destIndex], + MSchedGraphEdge::MemoryDep, MSchedGraphEdge::TrueDep, 1); //} } - + } - + } } diff --git a/lib/Target/SparcV9/ModuloScheduling/MSchedGraph.h b/lib/Target/SparcV9/ModuloScheduling/MSchedGraph.h index 070c928..12d02d0 100644 --- a/lib/Target/SparcV9/ModuloScheduling/MSchedGraph.h +++ b/lib/Target/SparcV9/ModuloScheduling/MSchedGraph.h @@ -10,7 +10,7 @@ // A graph class for dependencies. This graph only contains true, anti, and // output data dependencies for a given MachineBasicBlock. Dependencies // across iterations are also computed. Unless data dependence analysis -// is provided, a conservative approach of adding dependencies between all +// is provided, a conservative approach of adding dependencies between all // loads and stores is taken. //===----------------------------------------------------------------------===// @@ -27,7 +27,7 @@ #include <vector> namespace llvm { - + class MSchedGraph; class MSchedGraphNode; template<class IteratorType, class NodeType> @@ -40,12 +40,12 @@ namespace llvm { enum DataDepOrderType { TrueDep, AntiDep, OutputDep, NonDataDep }; - + enum MSchedGraphEdgeType { MemoryDep, ValueDep, MachineRegister, BranchDep }; - //Get or set edge data + //Get or set edge data MSchedGraphNode *getDest() const { return dest; } unsigned getIteDiff() { return iteDiff; } unsigned getDepOrderType() { return depOrderType; } @@ -53,10 +53,10 @@ namespace llvm { private: friend class MSchedGraphNode; - MSchedGraphEdge(MSchedGraphNode *destination, MSchedGraphEdgeType type, - unsigned deptype, unsigned diff) + MSchedGraphEdge(MSchedGraphNode *destination, MSchedGraphEdgeType type, + unsigned deptype, unsigned diff) : dest(destination), depType(type), depOrderType(deptype), iteDiff(diff) {} - + MSchedGraphNode *dest; MSchedGraphEdgeType depType; unsigned depOrderType; @@ -67,18 +67,18 @@ namespace llvm { //corresponding latency. Each node also contains a list of its //predecessors and sucessors. class MSchedGraphNode { - + const MachineInstr* Inst; //Machine Instruction MSchedGraph* Parent; //Graph this node belongs to unsigned index; //Index in BB unsigned latency; //Latency of Instruction bool isBranchInstr; //Is this node the branch instr or not - + std::vector<MSchedGraphNode*> Predecessors; //Predecessor Nodes std::vector<MSchedGraphEdge> Successors; //Successor edges public: - MSchedGraphNode(const MachineInstr *inst, MSchedGraph *graph, + MSchedGraphNode(const MachineInstr *inst, MSchedGraph *graph, unsigned index, unsigned late=0, bool isBranch=false); MSchedGraphNode(const MSchedGraphNode &N); @@ -92,7 +92,7 @@ namespace llvm { typedef std::vector<MSchedGraphNode*>::const_iterator pred_const_iterator; pred_const_iterator pred_begin() const { return Predecessors.begin(); } pred_const_iterator pred_end() const { return Predecessors.end(); } - + typedef MSchedGraphNodeIterator<std::vector<MSchedGraphEdge>::const_iterator, const MSchedGraphNode> succ_const_iterator; succ_const_iterator succ_begin() const; @@ -108,15 +108,15 @@ namespace llvm { void setPredecessor(unsigned index, MSchedGraphNode *dest) { Predecessors[index] = dest; } - + MSchedGraphNode* getPredecessor(unsigned index) { return Predecessors[index]; } - + MSchedGraphEdge* getSuccessor(unsigned index) { return &Successors[index]; } - + void deleteSuccessor(MSchedGraphNode *node) { for (unsigned i = 0; i != Successors.size(); ++i) if (Successors[i].getDest() == node) { @@ -127,8 +127,8 @@ namespace llvm { } } - void addOutEdge(MSchedGraphNode *destination, - MSchedGraphEdge::MSchedGraphEdgeType type, + void addOutEdge(MSchedGraphNode *destination, + MSchedGraphEdge::MSchedGraphEdgeType type, unsigned deptype, unsigned diff=0) { Successors.push_back(MSchedGraphEdge(destination, type, deptype,diff)); destination->Predecessors.push_back(this); @@ -173,13 +173,13 @@ namespace llvm { return I->getDest(); } NodeType* operator->() const { return operator*(); } - + MSchedGraphNodeIterator& operator++() { // Preincrement ++I; return *this; } MSchedGraphNodeIterator operator++(int) { // Postincrement - MSchedGraphNodeIterator tmp = *this; ++*this; return tmp; + MSchedGraphNodeIterator tmp = *this; ++*this; return tmp; } MSchedGraphEdge &getEdge() { @@ -204,7 +204,7 @@ namespace llvm { } // ostream << operator for MSGraphNode class - inline std::ostream &operator<<(std::ostream &os, + inline std::ostream &operator<<(std::ostream &os, const MSchedGraphNode &node) { node.print(os); return os; @@ -217,56 +217,56 @@ namespace llvm { template <> struct GraphTraits<MSchedGraphNode*> { typedef MSchedGraphNode NodeType; typedef MSchedGraphNode::succ_iterator ChildIteratorType; - - static inline ChildIteratorType child_begin(NodeType *N) { - return N->succ_begin(); + + static inline ChildIteratorType child_begin(NodeType *N) { + return N->succ_begin(); } - static inline ChildIteratorType child_end(NodeType *N) { + static inline ChildIteratorType child_end(NodeType *N) { return N->succ_end(); } static NodeType *getEntryNode(NodeType* N) { return N; } }; - + //Graph class to represent dependence graph class MSchedGraph { - + const MachineBasicBlock *BB; //Machine basic block const TargetMachine &Target; //Target Machine - + //Nodes std::map<const MachineInstr*, MSchedGraphNode*> GraphMap; //Add Nodes and Edges to this graph for our BB typedef std::pair<int, MSchedGraphNode*> OpIndexNodePair; void buildNodesAndEdges(std::map<const MachineInstr*, unsigned> &ignoreInstrs, DependenceAnalyzer &DA, std::map<MachineInstr*, Instruction*> &machineTollvm); - void addValueEdges(std::vector<OpIndexNodePair> &NodesInMap, + void addValueEdges(std::vector<OpIndexNodePair> &NodesInMap, MSchedGraphNode *node, bool nodeIsUse, bool nodeIsDef, std::vector<const MachineInstr*> &phiInstrs, int diff=0); - void addMachRegEdges(std::map<int, + void addMachRegEdges(std::map<int, std::vector<OpIndexNodePair> >& regNumtoNodeMap); void addMemEdges(const std::vector<MSchedGraphNode*>& memInst, DependenceAnalyzer &DA, std::map<MachineInstr*, Instruction*> &machineTollvm); void addBranchEdges(); public: - MSchedGraph(const MachineBasicBlock *bb, const TargetMachine &targ, - std::map<const MachineInstr*, unsigned> &ignoreInstrs, + MSchedGraph(const MachineBasicBlock *bb, const TargetMachine &targ, + std::map<const MachineInstr*, unsigned> &ignoreInstrs, DependenceAnalyzer &DA, std::map<MachineInstr*, Instruction*> &machineTollvm); //Copy constructor with maps to link old nodes to new nodes MSchedGraph(const MSchedGraph &G, std::map<MSchedGraphNode*, MSchedGraphNode*> &newNodes); - + //Deconstructor! ~MSchedGraph(); - + //Add or delete nodes from the Graph void addNode(const MachineInstr* MI, MSchedGraphNode *node); void deleteNode(MSchedGraphNode *node); - //iterators + //iterators typedef std::map<const MachineInstr*, MSchedGraphNode*>::iterator iterator; typedef std::map<const MachineInstr*, MSchedGraphNode*>::const_iterator const_iterator; typedef std::map<const MachineInstr*, MSchedGraphNode*>::reverse_iterator reverse_iterator; @@ -283,7 +283,7 @@ namespace llvm { }; - + // Provide specializations of GraphTraits to be able to use graph @@ -296,11 +296,11 @@ namespace llvm { template <> struct GraphTraits<MSchedGraph*> { typedef MSchedGraphNode NodeType; typedef MSchedGraphNode::succ_iterator ChildIteratorType; - - static inline ChildIteratorType child_begin(NodeType *N) { - return N->succ_begin(); + + static inline ChildIteratorType child_begin(NodeType *N) { + return N->succ_begin(); } - static inline ChildIteratorType child_end(NodeType *N) { + static inline ChildIteratorType child_end(NodeType *N) { return N->succ_end(); } @@ -316,20 +316,20 @@ namespace llvm { } }; - + template <> struct GraphTraits<const MSchedGraph*> { typedef const MSchedGraphNode NodeType; typedef MSchedGraphNode::succ_const_iterator ChildIteratorType; - - static inline ChildIteratorType child_begin(NodeType *N) { - return N->succ_begin(); + + static inline ChildIteratorType child_begin(NodeType *N) { + return N->succ_begin(); } - static inline ChildIteratorType child_end(NodeType *N) { + static inline ChildIteratorType child_end(NodeType *N) { return N->succ_end(); } typedef std::pointer_to_unary_function<std::pair<const MachineInstr* const, MSchedGraphNode*>&, MSchedGraphNode&> DerefFun; - + typedef mapped_iterator<MSchedGraph::iterator, DerefFun> nodes_iterator; static nodes_iterator nodes_begin(MSchedGraph *G) { return map_iterator(((MSchedGraph*)G)->begin(), DerefFun(getSecond)); @@ -338,15 +338,15 @@ namespace llvm { return map_iterator(((MSchedGraph*)G)->end(), DerefFun(getSecond)); } }; - + template <> struct GraphTraits<Inverse<MSchedGraph*> > { typedef MSchedGraphNode NodeType; typedef MSchedGraphNode::pred_iterator ChildIteratorType; - - static inline ChildIteratorType child_begin(NodeType *N) { + + static inline ChildIteratorType child_begin(NodeType *N) { return N->pred_begin(); } - static inline ChildIteratorType child_end(NodeType *N) { + static inline ChildIteratorType child_end(NodeType *N) { return N->pred_end(); } typedef std::pointer_to_unary_function<std::pair<const MachineInstr* const, @@ -360,21 +360,21 @@ namespace llvm { return map_iterator(((MSchedGraph*)G)->end(), DerefFun(getSecond)); } }; - + template <> struct GraphTraits<Inverse<const MSchedGraph*> > { typedef const MSchedGraphNode NodeType; typedef MSchedGraphNode::pred_const_iterator ChildIteratorType; - - static inline ChildIteratorType child_begin(NodeType *N) { + + static inline ChildIteratorType child_begin(NodeType *N) { return N->pred_begin(); } - static inline ChildIteratorType child_end(NodeType *N) { + static inline ChildIteratorType child_end(NodeType *N) { return N->pred_end(); } typedef std::pointer_to_unary_function<std::pair<const MachineInstr* const, MSchedGraphNode*>&, MSchedGraphNode&> DerefFun; - + typedef mapped_iterator<MSchedGraph::iterator, DerefFun> nodes_iterator; static nodes_iterator nodes_begin(MSchedGraph *G) { return map_iterator(((MSchedGraph*)G)->begin(), DerefFun(getSecond)); diff --git a/lib/Target/SparcV9/ModuloScheduling/ModuloScheduling.cpp b/lib/Target/SparcV9/ModuloScheduling/ModuloScheduling.cpp index f5faae5..4c0e449 100644 --- a/lib/Target/SparcV9/ModuloScheduling/ModuloScheduling.cpp +++ b/lib/Target/SparcV9/ModuloScheduling/ModuloScheduling.cpp @@ -6,10 +6,10 @@ // the University of Illinois Open Source License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// -// -// This ModuloScheduling pass is based on the Swing Modulo Scheduling -// algorithm. -// +// +// This ModuloScheduling pass is based on the Swing Modulo Scheduling +// algorithm. +// //===----------------------------------------------------------------------===// #define DEBUG_TYPE "ModuloSched" @@ -44,7 +44,7 @@ using namespace llvm; /// FunctionPass *llvm::createModuloSchedulingPass(TargetMachine & targ) { DEBUG(std::cerr << "Created ModuloSchedulingPass\n"); - return new ModuloSchedulingPass(targ); + return new ModuloSchedulingPass(targ); } @@ -55,7 +55,7 @@ static void WriteGraphToFile(std::ostream &O, const std::string &GraphName, std::string Filename = GraphName + ".dot"; O << "Writing '" << Filename << "'..."; std::ofstream F(Filename.c_str()); - + if (F.good()) WriteGraph(F, GT); else @@ -86,7 +86,7 @@ namespace llvm { static std::string getGraphName(MSchedGraph *F) { return "Dependence Graph"; } - + static std::string getNodeLabel(MSchedGraphNode *Node, MSchedGraph *Graph) { if (Node->getInst()) { std::stringstream ss; @@ -102,15 +102,15 @@ namespace llvm { std::string edgelabel = ""; switch (I.getEdge().getDepOrderType()) { - case MSchedGraphEdge::TrueDep: + case MSchedGraphEdge::TrueDep: edgelabel = "True"; break; - - case MSchedGraphEdge::AntiDep: + + case MSchedGraphEdge::AntiDep: edgelabel = "Anti"; break; - case MSchedGraphEdge::OutputDep: + case MSchedGraphEdge::OutputDep: edgelabel = "Output"; break; @@ -140,37 +140,37 @@ namespace llvm { /// 1) Computation and Analysis of the dependence graph /// 2) Ordering of the nodes /// 3) Scheduling -/// +/// bool ModuloSchedulingPass::runOnFunction(Function &F) { alarm(300); bool Changed = false; int numMS = 0; - + DEBUG(std::cerr << "Creating ModuloSchedGraph for each valid BasicBlock in " + F.getName() + "\n"); - + //Get MachineFunction MachineFunction &MF = MachineFunction::get(&F); - + DependenceAnalyzer &DA = getAnalysis<DependenceAnalyzer>(); - + //Worklist std::vector<MachineBasicBlock*> Worklist; - + //Iterate over BasicBlocks and put them into our worklist if they are valid for (MachineFunction::iterator BI = MF.begin(); BI != MF.end(); ++BI) - if(MachineBBisValid(BI)) { + if(MachineBBisValid(BI)) { Worklist.push_back(&*BI); ++ValidLoops; } - + defaultInst = 0; DEBUG(if(Worklist.size() == 0) std::cerr << "No single basic block loops in function to ModuloSchedule\n"); //Iterate over the worklist and perform scheduling - for(std::vector<MachineBasicBlock*>::iterator BI = Worklist.begin(), + for(std::vector<MachineBasicBlock*>::iterator BI = Worklist.begin(), BE = Worklist.end(); BI != BE; ++BI) { //Print out BB for debugging @@ -192,71 +192,71 @@ bool ModuloSchedulingPass::runOnFunction(Function &F) { } MSchedGraph *MSG = new MSchedGraph(*BI, target, indVarInstrs[*BI], DA, machineTollvm[*BI]); - + //Write Graph out to file DEBUG(WriteGraphToFile(std::cerr, F.getName(), MSG)); - + //Calculate Resource II int ResMII = calculateResMII(*BI); - + //Calculate Recurrence II int RecMII = calculateRecMII(MSG, ResMII); DEBUG(std::cerr << "Number of reccurrences found: " << recurrenceList.size() << "\n"); - - + + //Our starting initiation interval is the maximum of RecMII and ResMII II = std::max(RecMII, ResMII); - + //Print out II, RecMII, and ResMII DEBUG(std::cerr << "II starts out as " << II << " ( RecMII=" << RecMII << " and ResMII=" << ResMII << ")\n"); - + //Dump node properties if in debug mode - DEBUG(for(std::map<MSchedGraphNode*, MSNodeAttributes>::iterator I = nodeToAttributesMap.begin(), + DEBUG(for(std::map<MSchedGraphNode*, MSNodeAttributes>::iterator I = nodeToAttributesMap.begin(), E = nodeToAttributesMap.end(); I !=E; ++I) { - std::cerr << "Node: " << *(I->first) << " ASAP: " << I->second.ASAP << " ALAP: " - << I->second.ALAP << " MOB: " << I->second.MOB << " Depth: " << I->second.depth + std::cerr << "Node: " << *(I->first) << " ASAP: " << I->second.ASAP << " ALAP: " + << I->second.ALAP << " MOB: " << I->second.MOB << " Depth: " << I->second.depth << " Height: " << I->second.height << "\n"; }); //Calculate Node Properties calculateNodeAttributes(MSG, ResMII); - + //Dump node properties if in debug mode - DEBUG(for(std::map<MSchedGraphNode*, MSNodeAttributes>::iterator I = nodeToAttributesMap.begin(), + DEBUG(for(std::map<MSchedGraphNode*, MSNodeAttributes>::iterator I = nodeToAttributesMap.begin(), E = nodeToAttributesMap.end(); I !=E; ++I) { - std::cerr << "Node: " << *(I->first) << " ASAP: " << I->second.ASAP << " ALAP: " - << I->second.ALAP << " MOB: " << I->second.MOB << " Depth: " << I->second.depth + std::cerr << "Node: " << *(I->first) << " ASAP: " << I->second.ASAP << " ALAP: " + << I->second.ALAP << " MOB: " << I->second.MOB << " Depth: " << I->second.depth << " Height: " << I->second.height << "\n"; }); - + //Put nodes in order to schedule them computePartialOrder(); - + //Dump out partial order - DEBUG(for(std::vector<std::set<MSchedGraphNode*> >::iterator I = partialOrder.begin(), + DEBUG(for(std::vector<std::set<MSchedGraphNode*> >::iterator I = partialOrder.begin(), E = partialOrder.end(); I !=E; ++I) { std::cerr << "Start set in PO\n"; for(std::set<MSchedGraphNode*>::iterator J = I->begin(), JE = I->end(); J != JE; ++J) std::cerr << "PO:" << **J << "\n"; }); - + //Place nodes in final order orderNodes(); - + //Dump out order of nodes DEBUG(for(std::vector<MSchedGraphNode*>::iterator I = FinalNodeOrder.begin(), E = FinalNodeOrder.end(); I != E; ++I) { std::cerr << "FO:" << **I << "\n"; }); - + //Finally schedule nodes bool haveSched = computeSchedule(*BI); - + //Print out final schedule DEBUG(schedule.print(std::cerr)); - + //Final scheduling step is to reconstruct the loop only if we actual have //stage > 0 if(haveSched) { @@ -269,7 +269,7 @@ bool ModuloSchedulingPass::runOnFunction(Function &F) { } else ++NoSched; - + //Clear out our maps for the next basic block that is processed nodeToAttributesMap.clear(); partialOrder.clear(); @@ -283,12 +283,12 @@ bool ModuloSchedulingPass::runOnFunction(Function &F) { //Should't std::find work?? //parent->getBasicBlockList().erase(std::find(parent->getBasicBlockList().begin(), parent->getBasicBlockList().end(), *llvmBB)); //parent->getBasicBlockList().erase(llvmBB); - + //delete(llvmBB); //delete(*BI); } - alarm(0); + alarm(0); return Changed; } @@ -300,12 +300,12 @@ bool ModuloSchedulingPass::CreateDefMap(MachineBasicBlock *BI) { const MachineOperand &mOp = I->getOperand(opNum); if(mOp.getType() == MachineOperand::MO_VirtualRegister && mOp.isDef()) { //assert if this is the second def we have seen - //DEBUG(std::cerr << "Putting " << *(mOp.getVRegValue()) << " into map\n"); + //DEBUG(std::cerr << "Putting " << *(mOp.getVRegValue()) << " into map\n"); assert(!defMap.count(mOp.getVRegValue()) && "Def already in the map"); defMap[mOp.getVRegValue()] = &*I; } - + //See if we can use this Value* as our defaultInst if(!defaultInst && mOp.getType() == MachineOperand::MO_VirtualRegister) { Value *V = mOp.getVRegValue(); @@ -314,12 +314,12 @@ bool ModuloSchedulingPass::CreateDefMap(MachineBasicBlock *BI) { } } } - + if(!defaultInst) return false; - + return true; - + } /// This function checks if a Machine Basic Block is valid for modulo /// scheduling. This means that it has no control flow (if/else or @@ -328,14 +328,14 @@ bool ModuloSchedulingPass::CreateDefMap(MachineBasicBlock *BI) { bool ModuloSchedulingPass::MachineBBisValid(const MachineBasicBlock *BI) { bool isLoop = false; - + //Check first if its a valid loop - for(succ_const_iterator I = succ_begin(BI->getBasicBlock()), + for(succ_const_iterator I = succ_begin(BI->getBasicBlock()), E = succ_end(BI->getBasicBlock()); I != E; ++I) { if (*I == BI->getBasicBlock()) // has single block loop isLoop = true; } - + if(!isLoop) return false; @@ -353,7 +353,7 @@ bool ModuloSchedulingPass::MachineBBisValid(const MachineBasicBlock *BI) { //Get Target machine instruction info const TargetInstrInfo *TMI = target.getInstrInfo(); - + //Check each instruction and look for calls, keep map to get index later std::map<const MachineInstr*, unsigned> indexMap; @@ -361,21 +361,21 @@ bool ModuloSchedulingPass::MachineBBisValid(const MachineBasicBlock *BI) { for(MachineBasicBlock::const_iterator I = BI->begin(), E = BI->end(); I != E; ++I) { //Get opcode to check instruction type MachineOpCode OC = I->getOpcode(); - + //Look for calls if(TMI->isCall(OC)) return false; - + //Look for conditional move - if(OC == V9::MOVRZr || OC == V9::MOVRZi || OC == V9::MOVRLEZr || OC == V9::MOVRLEZi + if(OC == V9::MOVRZr || OC == V9::MOVRZi || OC == V9::MOVRLEZr || OC == V9::MOVRLEZi || OC == V9::MOVRLZr || OC == V9::MOVRLZi || OC == V9::MOVRNZr || OC == V9::MOVRNZi - || OC == V9::MOVRGZr || OC == V9::MOVRGZi || OC == V9::MOVRGEZr + || OC == V9::MOVRGZr || OC == V9::MOVRGZi || OC == V9::MOVRGEZr || OC == V9::MOVRGEZi || OC == V9::MOVLEr || OC == V9::MOVLEi || OC == V9::MOVLEUr || OC == V9::MOVLEUi || OC == V9::MOVFLEr || OC == V9::MOVFLEi || OC == V9::MOVNEr || OC == V9::MOVNEi || OC == V9::MOVNEGr || OC == V9::MOVNEGi || OC == V9::MOVFNEr || OC == V9::MOVFNEi) return false; - + indexMap[I] = count; if(TMI->isNop(OC)) @@ -435,7 +435,7 @@ bool ModuloSchedulingPass::MachineBBisValid(const MachineBasicBlock *BI) { //Convert list of LLVM Instructions to list of Machine instructions std::map<const MachineInstr*, unsigned> mIndVar; for(std::set<Instruction*>::iterator N = indVar.begin(), NE = indVar.end(); N != NE; ++N) { - + //If we have a load, we can't handle this loop because there is no way to preserve dependences //between loads and stores if(isa<LoadInst>(*N)) @@ -463,7 +463,7 @@ bool ModuloSchedulingPass::MachineBBisValid(const MachineBasicBlock *BI) { return true; } -bool ModuloSchedulingPass::assocIndVar(Instruction *I, std::set<Instruction*> &indVar, +bool ModuloSchedulingPass::assocIndVar(Instruction *I, std::set<Instruction*> &indVar, std::vector<Instruction*> &stack, BasicBlock *BB) { stack.push_back(I); @@ -503,14 +503,14 @@ bool ModuloSchedulingPass::assocIndVar(Instruction *I, std::set<Instruction*> &i //FIXME: In future there should be a way to get alternative resources //for each instruction int ModuloSchedulingPass::calculateResMII(const MachineBasicBlock *BI) { - + TIME_REGION(X, "calculateResMII"); const TargetInstrInfo *mii = target.getInstrInfo(); const TargetSchedInfo *msi = target.getSchedInfo(); int ResMII = 0; - + //Map to keep track of usage count of each resource std::map<unsigned, unsigned> resourceUsageCount; @@ -533,18 +533,18 @@ int ModuloSchedulingPass::calculateResMII(const MachineBasicBlock *BI) { } //Find maximum usage count - + //Get max number of instructions that can be issued at once. (FIXME) int issueSlots = msi->maxNumIssueTotal; for(std::map<unsigned,unsigned>::iterator RB = resourceUsageCount.begin(), RE = resourceUsageCount.end(); RB != RE; ++RB) { - + //Get the total number of the resources in our cpu int resourceNum = CPUResource::getCPUResource(RB->first)->maxNumUsers; - + //Get total usage count for this resources unsigned usageCount = RB->second; - + //Divide the usage count by either the max number we can issue or the number of //resources (whichever is its upper bound) double finalUsageCount; @@ -552,8 +552,8 @@ int ModuloSchedulingPass::calculateResMII(const MachineBasicBlock *BI) { finalUsageCount = ceil(1.0 * usageCount / resourceNum); else finalUsageCount = ceil(1.0 * usageCount / issueSlots); - - + + //Only keep track of the max ResMII = std::max( (int) finalUsageCount, ResMII); @@ -572,16 +572,16 @@ int ModuloSchedulingPass::calculateRecMII(MSchedGraph *graph, int MII) { findAllReccurrences(I->second, vNodes, MII); vNodes.clear(); }*/ - + TIME_REGION(X, "calculateRecMII"); findAllCircuits(graph, MII); int RecMII = 0; - + for(std::set<std::pair<int, std::vector<MSchedGraphNode*> > >::iterator I = recurrenceList.begin(), E=recurrenceList.end(); I !=E; ++I) { RecMII = std::max(RecMII, I->first); } - + return MII; } @@ -602,20 +602,20 @@ void ModuloSchedulingPass::calculateNodeAttributes(MSchedGraph *graph, int MII) //Assert if its already in the map assert(nodeToAttributesMap.count(I->second) == 0 && "Node attributes are already in the map"); - + //Put into the map with default attribute values nodeToAttributesMap[I->second] = MSNodeAttributes(); } //Create set to deal with reccurrences std::set<MSchedGraphNode*> visitedNodes; - + //Now Loop over map and calculate the node attributes for(std::map<MSchedGraphNode*, MSNodeAttributes>::iterator I = nodeToAttributesMap.begin(), E = nodeToAttributesMap.end(); I != E; ++I) { calculateASAP(I->first, MII, (MSchedGraphNode*) 0); visitedNodes.clear(); } - + int maxASAP = findMaxASAP(); //Calculate ALAP which depends on ASAP being totally calculated for(std::map<MSchedGraphNode*, MSNodeAttributes>::iterator I = nodeToAttributesMap.begin(), E = nodeToAttributesMap.end(); I != E; ++I) { @@ -626,7 +626,7 @@ void ModuloSchedulingPass::calculateNodeAttributes(MSchedGraph *graph, int MII) //Calculate MOB which depends on ASAP being totally calculated, also do depth and height for(std::map<MSchedGraphNode*, MSNodeAttributes>::iterator I = nodeToAttributesMap.begin(), E = nodeToAttributesMap.end(); I != E; ++I) { (I->second).MOB = std::max(0,(I->second).ALAP - (I->second).ASAP); - + DEBUG(std::cerr << "MOB: " << (I->second).MOB << " (" << *(I->first) << ")\n"); calculateDepth(I->first, (MSchedGraphNode*) 0); calculateHeight(I->first, (MSchedGraphNode*) 0); @@ -639,18 +639,18 @@ void ModuloSchedulingPass::calculateNodeAttributes(MSchedGraph *graph, int MII) bool ModuloSchedulingPass::ignoreEdge(MSchedGraphNode *srcNode, MSchedGraphNode *destNode) { if(destNode == 0 || srcNode ==0) return false; - + bool findEdge = edgesToIgnore.count(std::make_pair(srcNode, destNode->getInEdgeNum(srcNode))); - + DEBUG(std::cerr << "Ignoring edge? from: " << *srcNode << " to " << *destNode << "\n"); return findEdge; } -/// calculateASAP - Calculates the +/// calculateASAP - Calculates the int ModuloSchedulingPass::calculateASAP(MSchedGraphNode *node, int MII, MSchedGraphNode *destNode) { - + DEBUG(std::cerr << "Calculating ASAP for " << *node << "\n"); //Get current node attributes @@ -658,46 +658,46 @@ int ModuloSchedulingPass::calculateASAP(MSchedGraphNode *node, int MII, MSchedG if(attributes.ASAP != -1) return attributes.ASAP; - + int maxPredValue = 0; - + //Iterate over all of the predecessors and find max for(MSchedGraphNode::pred_iterator P = node->pred_begin(), E = node->pred_end(); P != E; ++P) { - + //Only process if we are not ignoring the edge if(!ignoreEdge(*P, node)) { int predASAP = -1; predASAP = calculateASAP(*P, MII, node); - + assert(predASAP != -1 && "ASAP has not been calculated"); int iteDiff = node->getInEdge(*P).getIteDiff(); - + int currentPredValue = predASAP + (*P)->getLatency() - (iteDiff * MII); DEBUG(std::cerr << "pred ASAP: " << predASAP << ", iteDiff: " << iteDiff << ", PredLatency: " << (*P)->getLatency() << ", Current ASAP pred: " << currentPredValue << "\n"); maxPredValue = std::max(maxPredValue, currentPredValue); } } - + attributes.ASAP = maxPredValue; DEBUG(std::cerr << "ASAP: " << attributes.ASAP << " (" << *node << ")\n"); - + return maxPredValue; } -int ModuloSchedulingPass::calculateALAP(MSchedGraphNode *node, int MII, +int ModuloSchedulingPass::calculateALAP(MSchedGraphNode *node, int MII, int maxASAP, MSchedGraphNode *srcNode) { - + DEBUG(std::cerr << "Calculating ALAP for " << *node << "\n"); - + MSNodeAttributes &attributes = nodeToAttributesMap.find(node)->second; - + if(attributes.ALAP != -1) return attributes.ALAP; - + if(node->hasSuccessors()) { - + //Trying to deal with the issue where the node has successors, but //we are ignoring all of the edges to them. So this is my hack for //now.. there is probably a more elegant way of doing this (FIXME) @@ -705,11 +705,11 @@ int ModuloSchedulingPass::calculateALAP(MSchedGraphNode *node, int MII, //FIXME, set to something high to start int minSuccValue = 9999999; - + //Iterate over all of the predecessors and fine max - for(MSchedGraphNode::succ_iterator P = node->succ_begin(), + for(MSchedGraphNode::succ_iterator P = node->succ_begin(), E = node->succ_end(); P != E; ++P) { - + //Only process if we are not ignoring the edge if(!ignoreEdge(node, *P)) { processedOneEdge = true; @@ -727,10 +727,10 @@ int ModuloSchedulingPass::calculateALAP(MSchedGraphNode *node, int MII, minSuccValue = std::min(minSuccValue, currentSuccValue); } } - + if(processedOneEdge) attributes.ALAP = minSuccValue; - + else attributes.ALAP = maxASAP; } @@ -756,19 +756,19 @@ int ModuloSchedulingPass::findMaxASAP() { int ModuloSchedulingPass::calculateHeight(MSchedGraphNode *node,MSchedGraphNode *srcNode) { - + MSNodeAttributes &attributes = nodeToAttributesMap.find(node)->second; if(attributes.height != -1) return attributes.height; int maxHeight = 0; - + //Iterate over all of the predecessors and find max - for(MSchedGraphNode::succ_iterator P = node->succ_begin(), + for(MSchedGraphNode::succ_iterator P = node->succ_begin(), E = node->succ_end(); P != E; ++P) { - - + + if(!ignoreEdge(node, *P)) { int succHeight = calculateHeight(*P, node); @@ -784,7 +784,7 @@ int ModuloSchedulingPass::calculateHeight(MSchedGraphNode *node,MSchedGraphNode } -int ModuloSchedulingPass::calculateDepth(MSchedGraphNode *node, +int ModuloSchedulingPass::calculateDepth(MSchedGraphNode *node, MSchedGraphNode *destNode) { MSNodeAttributes &attributes = nodeToAttributesMap.find(node)->second; @@ -793,14 +793,14 @@ int ModuloSchedulingPass::calculateDepth(MSchedGraphNode *node, return attributes.depth; int maxDepth = 0; - + //Iterate over all of the predecessors and fine max for(MSchedGraphNode::pred_iterator P = node->pred_begin(), E = node->pred_end(); P != E; ++P) { if(!ignoreEdge(*P, node)) { int predDepth = -1; predDepth = calculateDepth(*P, node); - + assert(predDepth != -1 && "Predecessors ASAP should have been caclulated"); int currentDepth = predDepth + (*P)->getLatency(); @@ -808,7 +808,7 @@ int ModuloSchedulingPass::calculateDepth(MSchedGraphNode *node, } } attributes.depth = maxDepth; - + DEBUG(std::cerr << "Depth: " << attributes.depth << " (" << *node << "*)\n"); return maxDepth; } @@ -822,11 +822,11 @@ void ModuloSchedulingPass::addReccurrence(std::vector<MSchedGraphNode*> &recurre //Loop over all recurrences already in our list for(std::set<std::pair<int, std::vector<MSchedGraphNode*> > >::iterator R = recurrenceList.begin(), RE = recurrenceList.end(); R != RE; ++R) { - + bool all_same = true; //First compare size if(R->second.size() == recurrence.size()) { - + for(std::vector<MSchedGraphNode*>::const_iterator node = R->second.begin(), end = R->second.end(); node != end; ++node) { if(std::find(recurrence.begin(), recurrence.end(), *node) == recurrence.end()) { all_same = all_same && false; @@ -841,30 +841,30 @@ void ModuloSchedulingPass::addReccurrence(std::vector<MSchedGraphNode*> &recurre } } } - + if(!same) { srcBENode = recurrence.back(); destBENode = recurrence.front(); - + //FIXME if(destBENode->getInEdge(srcBENode).getIteDiff() == 0) { //DEBUG(std::cerr << "NOT A BACKEDGE\n"); - //find actual backedge HACK HACK + //find actual backedge HACK HACK for(unsigned i=0; i< recurrence.size()-1; ++i) { if(recurrence[i+1]->getInEdge(recurrence[i]).getIteDiff() == 1) { srcBENode = recurrence[i]; destBENode = recurrence[i+1]; break; } - + } - + } DEBUG(std::cerr << "Back Edge to Remove: " << *srcBENode << " to " << *destBENode << "\n"); edgesToIgnore.insert(std::make_pair(srcBENode, destBENode->getInEdgeNum(srcBENode))); recurrenceList.insert(std::make_pair(II, recurrence)); } - + } int CircCount; @@ -888,12 +888,12 @@ void ModuloSchedulingPass::unblock(MSchedGraphNode *u, std::set<MSchedGraphNode* } -bool ModuloSchedulingPass::circuit(MSchedGraphNode *v, std::vector<MSchedGraphNode*> &stack, - std::set<MSchedGraphNode*> &blocked, std::vector<MSchedGraphNode*> &SCC, - MSchedGraphNode *s, std::map<MSchedGraphNode*, std::set<MSchedGraphNode*> > &B, +bool ModuloSchedulingPass::circuit(MSchedGraphNode *v, std::vector<MSchedGraphNode*> &stack, + std::set<MSchedGraphNode*> &blocked, std::vector<MSchedGraphNode*> &SCC, + MSchedGraphNode *s, std::map<MSchedGraphNode*, std::set<MSchedGraphNode*> > &B, int II, std::map<MSchedGraphNode*, MSchedGraphNode*> &newNodes) { bool f = false; - + DEBUG(std::cerr << "Finding Circuits Starting with: ( " << v << ")"<< *v << "\n"); //Push node onto the stack @@ -913,7 +913,7 @@ bool ModuloSchedulingPass::circuit(MSchedGraphNode *v, std::vector<MSchedGraphNo for(std::set<MSchedGraphNode*>::iterator I = AkV.begin(), E = AkV.end(); I != E; ++I) { if(*I == s) { //We have a circuit, so add it to our list - + std::vector<MSchedGraphNode*> recc; //Dump recurrence for now DEBUG(std::cerr << "Starting Recc\n"); @@ -966,7 +966,7 @@ bool ModuloSchedulingPass::circuit(MSchedGraphNode *v, std::vector<MSchedGraphNo int value = totalDelay-(RecMII * totalDistance); int lastII = II; while(value <= 0) { - + lastII = RecMII; RecMII--; value = totalDelay-(RecMII * totalDistance); @@ -988,7 +988,7 @@ bool ModuloSchedulingPass::circuit(MSchedGraphNode *v, std::vector<MSchedGraphNo unblock(v, blocked, B); } else { - for(std::set<MSchedGraphNode*>::iterator I = AkV.begin(), E = AkV.end(); I != E; ++I) + for(std::set<MSchedGraphNode*>::iterator I = AkV.begin(), E = AkV.end(); I != E; ++I) B[*I].insert(v); } @@ -1004,7 +1004,7 @@ void ModuloSchedulingPass::findAllCircuits(MSchedGraph *g, int II) { CircCount = 0; - //Keep old to new node mapping information + //Keep old to new node mapping information std::map<MSchedGraphNode*, MSchedGraphNode*> newNodes; //copy the graph @@ -1027,7 +1027,7 @@ void ModuloSchedulingPass::findAllCircuits(MSchedGraph *g, int II) { //Iterate over the graph until its down to one node or empty while(MSG->size() > 1) { - + //Write Graph out to file //WriteGraphToFile(std::cerr, "Graph" + utostr(MSG->size()), MSG); @@ -1070,13 +1070,13 @@ void ModuloSchedulingPass::findAllCircuits(MSchedGraph *g, int II) { } } } - - + + //Process SCC DEBUG(for(std::vector<MSchedGraphNode*>::iterator N = Vk.begin(), NE = Vk.end(); N != NE; ++N) { std::cerr << *((*N)->getInst()); }); - + //Iterate over all nodes in this scc for(std::vector<MSchedGraphNode*>::iterator N = Vk.begin(), NE = Vk.end(); N != NE; ++N) { @@ -1085,7 +1085,7 @@ void ModuloSchedulingPass::findAllCircuits(MSchedGraph *g, int II) { } if(Vk.size() > 1) { circuit(s, stack, blocked, Vk, s, B, II, newNodes); - + //Find all nodes up to s and delete them std::vector<MSchedGraphNode*> nodesToRemove; nodesToRemove.push_back(s); @@ -1105,10 +1105,10 @@ void ModuloSchedulingPass::findAllCircuits(MSchedGraph *g, int II) { } -void ModuloSchedulingPass::findAllReccurrences(MSchedGraphNode *node, +void ModuloSchedulingPass::findAllReccurrences(MSchedGraphNode *node, std::vector<MSchedGraphNode*> &visitedNodes, int II) { - + if(std::find(visitedNodes.begin(), visitedNodes.end(), node) != visitedNodes.end()) { std::vector<MSchedGraphNode*> recurrence; @@ -1119,13 +1119,13 @@ void ModuloSchedulingPass::findAllReccurrences(MSchedGraphNode *node, MSchedGraphNode *last = node; MSchedGraphNode *srcBackEdge = 0; MSchedGraphNode *destBackEdge = 0; - + for(std::vector<MSchedGraphNode*>::iterator I = visitedNodes.begin(), E = visitedNodes.end(); I !=E; ++I) { - if(*I == node) + if(*I == node) first = false; if(first) continue; @@ -1146,23 +1146,23 @@ void ModuloSchedulingPass::findAllReccurrences(MSchedGraphNode *node, } - + //Get final distance calc distance += node->getInEdge(last).getIteDiff(); DEBUG(std::cerr << "Reccurrence Distance: " << distance << "\n"); //Adjust II until we get close to the inequality delay - II*distance <= 0 - + int value = delay-(RecMII * distance); int lastII = II; while(value <= 0) { - + lastII = RecMII; RecMII--; value = delay-(RecMII * distance); } - - + + DEBUG(std::cerr << "Final II for this recurrence: " << lastII << "\n"); addReccurrence(recurrence, lastII, srcBackEdge, destBackEdge); assert(distance != 0 && "Recurrence distance should not be zero"); @@ -1179,23 +1179,23 @@ void ModuloSchedulingPass::findAllReccurrences(MSchedGraphNode *node, } } -void ModuloSchedulingPass::searchPath(MSchedGraphNode *node, +void ModuloSchedulingPass::searchPath(MSchedGraphNode *node, std::vector<MSchedGraphNode*> &path, std::set<MSchedGraphNode*> &nodesToAdd) { //Push node onto the path path.push_back(node); - //Loop over all successors and see if there is a path from this node to + //Loop over all successors and see if there is a path from this node to //a recurrence in the partial order, if so.. add all nodes to be added to recc - for(MSchedGraphNode::succ_iterator S = node->succ_begin(), SE = node->succ_end(); S != SE; + for(MSchedGraphNode::succ_iterator S = node->succ_begin(), SE = node->succ_end(); S != SE; ++S) { //If this node exists in a recurrence already in the partial order, then add all //nodes in the path to the set of nodes to add //Check if its already in our partial order, if not add it to the final vector - for(std::vector<std::set<MSchedGraphNode*> >::iterator PO = partialOrder.begin(), + for(std::vector<std::set<MSchedGraphNode*> >::iterator PO = partialOrder.begin(), PE = partialOrder.end(); PO != PE; ++PO) { - + //Check if we should ignore this edge first if(ignoreEdge(node,*S)) continue; @@ -1208,12 +1208,12 @@ void ModuloSchedulingPass::searchPath(MSchedGraphNode *node, searchPath(*S, path, nodesToAdd); } } - + //Pop Node off the path path.pop_back(); } -void ModuloSchedulingPass::pathToRecc(MSchedGraphNode *node, +void ModuloSchedulingPass::pathToRecc(MSchedGraphNode *node, std::vector<MSchedGraphNode*> &path, std::set<MSchedGraphNode*> &poSet, std::set<MSchedGraphNode*> &lastNodes) { @@ -1222,15 +1222,15 @@ void ModuloSchedulingPass::pathToRecc(MSchedGraphNode *node, DEBUG(std::cerr << "Current node: " << *node << "\n"); - //Loop over all successors and see if there is a path from this node to + //Loop over all successors and see if there is a path from this node to //a recurrence in the partial order, if so.. add all nodes to be added to recc - for(MSchedGraphNode::succ_iterator S = node->succ_begin(), SE = node->succ_end(); S != SE; + for(MSchedGraphNode::succ_iterator S = node->succ_begin(), SE = node->succ_end(); S != SE; ++S) { DEBUG(std::cerr << "Succ:" << **S << "\n"); //Check if we should ignore this edge first if(ignoreEdge(node,*S)) continue; - + if(poSet.count(*S)) { DEBUG(std::cerr << "Found path to recc from no pred\n"); //Loop over path, if it exists in lastNodes, then add to poset, and remove from lastNodes @@ -1245,7 +1245,7 @@ void ModuloSchedulingPass::pathToRecc(MSchedGraphNode *node, else pathToRecc(*S, path, poSet, lastNodes); } - + //Pop Node off the path path.pop_back(); } @@ -1253,27 +1253,27 @@ void ModuloSchedulingPass::pathToRecc(MSchedGraphNode *node, void ModuloSchedulingPass::computePartialOrder() { TIME_REGION(X, "calculatePartialOrder"); - + //Only push BA branches onto the final node order, we put other branches after it //FIXME: Should we really be pushing branches on it a specific order instead of relying //on BA being there? std::vector<MSchedGraphNode*> branches; - + //Steps to add a recurrence to the partial order // 1) Find reccurrence with the highest RecMII. Add it to the partial order. // 2) For each recurrence with decreasing RecMII, add it to the partial order along with // any nodes that connect this recurrence to recurrences already in the partial order - for(std::set<std::pair<int, std::vector<MSchedGraphNode*> > >::reverse_iterator + for(std::set<std::pair<int, std::vector<MSchedGraphNode*> > >::reverse_iterator I = recurrenceList.rbegin(), E=recurrenceList.rend(); I !=E; ++I) { std::set<MSchedGraphNode*> new_recurrence; //Loop through recurrence and remove any nodes already in the partial order - for(std::vector<MSchedGraphNode*>::const_iterator N = I->second.begin(), + for(std::vector<MSchedGraphNode*>::const_iterator N = I->second.begin(), NE = I->second.end(); N != NE; ++N) { bool found = false; - for(std::vector<std::set<MSchedGraphNode*> >::iterator PO = partialOrder.begin(), + for(std::vector<std::set<MSchedGraphNode*> >::iterator PO = partialOrder.begin(), PE = partialOrder.end(); PO != PE; ++PO) { if(PO->count(*N)) found = true; @@ -1289,10 +1289,10 @@ void ModuloSchedulingPass::computePartialOrder() { } } - + if(new_recurrence.size() > 0) { - + std::vector<MSchedGraphNode*> path; std::set<MSchedGraphNode*> nodesToAdd; @@ -1300,12 +1300,12 @@ void ModuloSchedulingPass::computePartialOrder() { for(std::set<MSchedGraphNode*>::iterator N = new_recurrence.begin(), NE = new_recurrence.end(); N != NE; ++N) searchPath(*N, path, nodesToAdd); - + //Add nodes to this recurrence if they are not already in the partial order for(std::set<MSchedGraphNode*>::iterator N = nodesToAdd.begin(), NE = nodesToAdd.end(); N != NE; ++N) { bool found = false; - for(std::vector<std::set<MSchedGraphNode*> >::iterator PO = partialOrder.begin(), + for(std::vector<std::set<MSchedGraphNode*> >::iterator PO = partialOrder.begin(), PE = partialOrder.end(); PO != PE; ++PO) { if(PO->count(*N)) found = true; @@ -1320,18 +1320,18 @@ void ModuloSchedulingPass::computePartialOrder() { } } - + //Add any nodes that are not already in the partial order //Add them in a set, one set per connected component std::set<MSchedGraphNode*> lastNodes; std::set<MSchedGraphNode*> noPredNodes; - for(std::map<MSchedGraphNode*, MSNodeAttributes>::iterator I = nodeToAttributesMap.begin(), + for(std::map<MSchedGraphNode*, MSNodeAttributes>::iterator I = nodeToAttributesMap.begin(), E = nodeToAttributesMap.end(); I != E; ++I) { - + bool found = false; - + //Check if its already in our partial order, if not add it to the final vector - for(std::vector<std::set<MSchedGraphNode*> >::iterator PO = partialOrder.begin(), + for(std::vector<std::set<MSchedGraphNode*> >::iterator PO = partialOrder.begin(), PE = partialOrder.end(); PO != PE; ++PO) { if(PO->count(I->first)) found = true; @@ -1345,13 +1345,13 @@ void ModuloSchedulingPass::computePartialOrder() { /*for(std::set<MSchedGraphNode*>::iterator N = noPredNodes.begin(), NE = noPredNodes.end(); N != NE; ++N) { DEBUG(std::cerr << "No Pred Path from: " << **N << "\n"); - for(std::vector<std::set<MSchedGraphNode*> >::iterator PO = partialOrder.begin(), + for(std::vector<std::set<MSchedGraphNode*> >::iterator PO = partialOrder.begin(), PE = partialOrder.end(); PO != PE; ++PO) { std::vector<MSchedGraphNode*> path; pathToRecc(*N, path, *PO, lastNodes); } }*/ - + //Break up remaining nodes that are not in the partial order ///into their connected compoenents @@ -1361,8 +1361,8 @@ void ModuloSchedulingPass::computePartialOrder() { if(ccSet.size() > 0) partialOrder.push_back(ccSet); } - - + + //Clean up branches by putting them in final order assert(branches.size() == 0 && "We should not have any branches in our graph"); } @@ -1377,39 +1377,39 @@ void ModuloSchedulingPass::connectedComponentSet(MSchedGraphNode *node, std::set } else return; - + //Loop over successors and recurse if we have not seen this node before for(MSchedGraphNode::succ_iterator node_succ = node->succ_begin(), end=node->succ_end(); node_succ != end; ++node_succ) { connectedComponentSet(*node_succ, ccSet, lastNodes); } - + } void ModuloSchedulingPass::predIntersect(std::set<MSchedGraphNode*> &CurrentSet, std::set<MSchedGraphNode*> &IntersectResult) { - + for(unsigned j=0; j < FinalNodeOrder.size(); ++j) { - for(MSchedGraphNode::pred_iterator P = FinalNodeOrder[j]->pred_begin(), + for(MSchedGraphNode::pred_iterator P = FinalNodeOrder[j]->pred_begin(), E = FinalNodeOrder[j]->pred_end(); P != E; ++P) { - + //Check if we are supposed to ignore this edge or not if(ignoreEdge(*P,FinalNodeOrder[j])) continue; - + if(CurrentSet.count(*P)) if(std::find(FinalNodeOrder.begin(), FinalNodeOrder.end(), *P) == FinalNodeOrder.end()) IntersectResult.insert(*P); } - } + } } - + void ModuloSchedulingPass::succIntersect(std::set<MSchedGraphNode*> &CurrentSet, std::set<MSchedGraphNode*> &IntersectResult) { for(unsigned j=0; j < FinalNodeOrder.size(); ++j) { - for(MSchedGraphNode::succ_iterator P = FinalNodeOrder[j]->succ_begin(), + for(MSchedGraphNode::succ_iterator P = FinalNodeOrder[j]->succ_begin(), E = FinalNodeOrder[j]->succ_end(); P != E; ++P) { //Check if we are supposed to ignore this edge or not @@ -1433,7 +1433,7 @@ void dumpIntersection(std::set<MSchedGraphNode*> &IntersectCurrent) { void ModuloSchedulingPass::orderNodes() { - + TIME_REGION(X, "orderNodes"); int BOTTOM_UP = 0; @@ -1442,7 +1442,7 @@ void ModuloSchedulingPass::orderNodes() { //Set default order int order = BOTTOM_UP; - + //Loop over all the sets and place them in the final node order for(std::vector<std::set<MSchedGraphNode*> >::iterator CurrentSet = partialOrder.begin(), E= partialOrder.end(); CurrentSet != E; ++CurrentSet) { @@ -1481,7 +1481,7 @@ void ModuloSchedulingPass::orderNodes() { //Get node attributes MSNodeAttributes nodeAttr= nodeToAttributesMap.find(*J)->second; //assert(nodeAttr != nodeToAttributesMap.end() && "Node not in attributes map!"); - + if(maxASAP <= nodeAttr.ASAP) { maxASAP = nodeAttr.ASAP; node = *J; @@ -1492,7 +1492,7 @@ void ModuloSchedulingPass::orderNodes() { order = BOTTOM_UP; } } - + //Repeat until all nodes are put into the final order from current set while(IntersectCurrent.size() > 0) { @@ -1501,15 +1501,15 @@ void ModuloSchedulingPass::orderNodes() { while(IntersectCurrent.size() > 0) { DEBUG(std::cerr << "Intersection is not empty, so find heighest height\n"); - + int MOB = 0; int height = 0; MSchedGraphNode *highestHeightNode = *(IntersectCurrent.begin()); - + //Find node in intersection with highest heigh and lowest MOB - for(std::set<MSchedGraphNode*>::iterator I = IntersectCurrent.begin(), + for(std::set<MSchedGraphNode*>::iterator I = IntersectCurrent.begin(), E = IntersectCurrent.end(); I != E; ++I) { - + //Get current nodes properties MSNodeAttributes nodeAttr= nodeToAttributesMap.find(*I)->second; @@ -1526,7 +1526,7 @@ void ModuloSchedulingPass::orderNodes() { } } } - + //Append our node with greatest height to the NodeOrder if(std::find(FinalNodeOrder.begin(), FinalNodeOrder.end(), highestHeightNode) == FinalNodeOrder.end()) { DEBUG(std::cerr << "Adding node to Final Order: " << *highestHeightNode << "\n"); @@ -1534,16 +1534,16 @@ void ModuloSchedulingPass::orderNodes() { } //Remove V from IntersectOrder - IntersectCurrent.erase(std::find(IntersectCurrent.begin(), + IntersectCurrent.erase(std::find(IntersectCurrent.begin(), IntersectCurrent.end(), highestHeightNode)); //Intersect V's successors with CurrentSet for(MSchedGraphNode::succ_iterator P = highestHeightNode->succ_begin(), E = highestHeightNode->succ_end(); P != E; ++P) { - //if(lower_bound(CurrentSet->begin(), + //if(lower_bound(CurrentSet->begin(), // CurrentSet->end(), *P) != CurrentSet->end()) { - if(std::find(CurrentSet->begin(), CurrentSet->end(), *P) != CurrentSet->end()) { + if(std::find(CurrentSet->begin(), CurrentSet->end(), *P) != CurrentSet->end()) { if(ignoreEdge(highestHeightNode, *P)) continue; //If not already in Intersect, add @@ -1575,12 +1575,12 @@ void ModuloSchedulingPass::orderNodes() { int MOB = 0; int depth = 0; MSchedGraphNode *highestDepthNode = *(IntersectCurrent.begin()); - - for(std::set<MSchedGraphNode*>::iterator I = IntersectCurrent.begin(), + + for(std::set<MSchedGraphNode*>::iterator I = IntersectCurrent.begin(), E = IntersectCurrent.end(); I != E; ++I) { //Find node attribute in graph MSNodeAttributes nodeAttr= nodeToAttributesMap.find(*I)->second; - + if(depth < nodeAttr.depth) { highestDepthNode = *I; depth = nodeAttr.depth; @@ -1594,8 +1594,8 @@ void ModuloSchedulingPass::orderNodes() { } } } - - + + //Append highest depth node to the NodeOrder if(std::find(FinalNodeOrder.begin(), FinalNodeOrder.end(), highestDepthNode) == FinalNodeOrder.end()) { @@ -1604,21 +1604,21 @@ void ModuloSchedulingPass::orderNodes() { } //Remove heightestDepthNode from IntersectOrder IntersectCurrent.erase(highestDepthNode); - + //Intersect heightDepthNode's pred with CurrentSet - for(MSchedGraphNode::pred_iterator P = highestDepthNode->pred_begin(), + for(MSchedGraphNode::pred_iterator P = highestDepthNode->pred_begin(), E = highestDepthNode->pred_end(); P != E; ++P) { if(CurrentSet->count(*P)) { if(ignoreEdge(*P, highestDepthNode)) continue; - + //If not already in Intersect, add if(!IntersectCurrent.count(*P)) IntersectCurrent.insert(*P); } } - + } //End while loop over Intersect Size //Change order @@ -1632,9 +1632,9 @@ void ModuloSchedulingPass::orderNodes() { DEBUG(std::cerr << "Current Intersection Size: " << IntersectCurrent.size() << "\n"); } //End Wrapping while loop - DEBUG(std::cerr << "Ending Size of Current Set: " << CurrentSet->size() << "\n"); + DEBUG(std::cerr << "Ending Size of Current Set: " << CurrentSet->size() << "\n"); }//End for over all sets of nodes - + //FIXME: As the algorithm stands it will NEVER add an instruction such as ba (with no //data dependencies) to the final order. We add this manually. It will always be //in the last set of S since its not part of a recurrence @@ -1654,7 +1654,7 @@ bool ModuloSchedulingPass::computeSchedule(const MachineBasicBlock *BB) { TIME_REGION(X, "computeSchedule"); bool success = false; - + //FIXME: Should be set to max II of the original loop //Cap II in order to prevent infinite loop int capII = 100; @@ -1665,9 +1665,9 @@ bool ModuloSchedulingPass::computeSchedule(const MachineBasicBlock *BB) { std::vector<MSchedGraphNode*> branches; //Loop over the final node order and process each node - for(std::vector<MSchedGraphNode*>::iterator I = FinalNodeOrder.begin(), + for(std::vector<MSchedGraphNode*>::iterator I = FinalNodeOrder.begin(), E = FinalNodeOrder.end(); I != E; ++I) { - + //CalculateEarly and Late start int EarlyStart = -1; int LateStart = 99999; //Set to something higher then we would ever expect (FIXME) @@ -1686,12 +1686,12 @@ bool ModuloSchedulingPass::computeSchedule(const MachineBasicBlock *BB) { if(sched) { //Loop over nodes in the schedule and determine if they are predecessors //or successors of the node we are trying to schedule - for(MSSchedule::schedule_iterator nodesByCycle = schedule.begin(), nodesByCycleEnd = schedule.end(); + for(MSSchedule::schedule_iterator nodesByCycle = schedule.begin(), nodesByCycleEnd = schedule.end(); nodesByCycle != nodesByCycleEnd; ++nodesByCycle) { - + //For this cycle, get the vector of nodes schedule and loop over it for(std::vector<MSchedGraphNode*>::iterator schedNode = nodesByCycle->second.begin(), SNE = nodesByCycle->second.end(); schedNode != SNE; ++schedNode) { - + if((*I)->isPredecessor(*schedNode)) { int diff = (*I)->getInEdge(*schedNode).getIteDiff(); int ES_Temp = nodesByCycle->first + (*schedNode)->getLatency() - diff * II; @@ -1741,11 +1741,11 @@ bool ModuloSchedulingPass::computeSchedule(const MachineBasicBlock *BB) { count--; } - + //Check if the node has no pred or successors and set Early Start to its ASAP if(!hasSucc && !hasPred) EarlyStart = nodeToAttributesMap.find(*I)->second.ASAP; - + DEBUG(std::cerr << "Has Successors: " << hasSucc << ", Has Pred: " << hasPred << "\n"); DEBUG(std::cerr << "EarlyStart: " << EarlyStart << ", LateStart: " << LateStart << "\n"); @@ -1766,14 +1766,14 @@ bool ModuloSchedulingPass::computeSchedule(const MachineBasicBlock *BB) { } else success = scheduleNode(*I, EarlyStart, EarlyStart + II - 1); - + if(!success) { ++IncreasedII; - ++II; + ++II; schedule.clear(); break; } - + } if(success) { @@ -1787,19 +1787,19 @@ bool ModuloSchedulingPass::computeSchedule(const MachineBasicBlock *BB) { } DEBUG(std::cerr << "Final II: " << II << "\n"); } - + if(II >= capII) { DEBUG(std::cerr << "Maximum II reached, giving up\n"); return false; } assert(II < capII && "The II should not exceed the original loop number of cycles"); - } + } return true; } -bool ModuloSchedulingPass::scheduleNode(MSchedGraphNode *node, +bool ModuloSchedulingPass::scheduleNode(MSchedGraphNode *node, int start, int end) { bool success = false; @@ -1808,7 +1808,7 @@ bool ModuloSchedulingPass::scheduleNode(MSchedGraphNode *node, //Make sure start and end are not negative //if(start < 0) { //start = 0; - + //} //if(end < 0) //end = 0; @@ -1822,12 +1822,12 @@ bool ModuloSchedulingPass::scheduleNode(MSchedGraphNode *node, while(increaseSC) { - + increaseSC = false; increaseSC = schedule.insert(node, cycle); - - if(!increaseSC) + + if(!increaseSC) return true; //Increment cycle to try again @@ -1866,7 +1866,7 @@ void ModuloSchedulingPass::writePrologues(std::vector<MachineBasicBlock *> &prol for(MSSchedule::kernel_iterator I = schedule.kernel_begin(), E = schedule.kernel_end(); I != E; ++I) { maxStageCount = std::max(maxStageCount, I->second); - + //Put int the map so we know what instructions in each stage are in the kernel DEBUG(std::cerr << "Inserting instruction " << *(I->first) << " into map at stage " << I->second << "\n"); inKernel[I->second].insert(I->first); @@ -1879,7 +1879,7 @@ void ModuloSchedulingPass::writePrologues(std::vector<MachineBasicBlock *> &prol for(int i = 0; i < maxStageCount; ++i) { BasicBlock *llvmBB = new BasicBlock("PROLOGUE", (Function*) (origBB->getBasicBlock()->getParent())); MachineBasicBlock *machineBB = new MachineBasicBlock(llvmBB); - + DEBUG(std::cerr << "i=" << i << "\n"); for(int j = i; j >= 0; --j) { for(MachineBasicBlock::const_iterator MI = origBB->begin(), ME = origBB->end(); ME != MI; ++MI) { @@ -1890,14 +1890,14 @@ void ModuloSchedulingPass::writePrologues(std::vector<MachineBasicBlock *> &prol //If its a branch, insert a nop if(mii->isBranch(instClone->getOpcode())) BuildMI(machineBB, V9::NOP, 0); - - + + DEBUG(std::cerr << "Cloning: " << *MI << "\n"); //After cloning, we may need to save the value that this instruction defines for(unsigned opNum=0; opNum < MI->getNumOperands(); ++opNum) { Instruction *tmp; - + //get machine operand MachineOperand &mOp = instClone->getOperand(opNum); if(mOp.getType() == MachineOperand::MO_VirtualRegister && mOp.isDef()) { @@ -1924,7 +1924,7 @@ void ModuloSchedulingPass::writePrologues(std::vector<MachineBasicBlock *> &prol saveValue = BuildMI(machineBB, V9::FMOVS, 3).addReg(mOp.getVRegValue()).addRegDef(tmp); else if(mOp.getVRegValue()->getType() == Type::DoubleTy) saveValue = BuildMI(machineBB, V9::FMOVD, 3).addReg(mOp.getVRegValue()).addRegDef(tmp); - else + else saveValue = BuildMI(machineBB, V9::ORr, 3).addReg(mOp.getVRegValue()).addImm(0).addRegDef(tmp); @@ -1961,7 +1961,7 @@ void ModuloSchedulingPass::writePrologues(std::vector<MachineBasicBlock *> &prol /*for(std::vector<MSchedGraphNode*>::iterator BR = branches.begin(), BE = branches.end(); BR != BE; ++BR) { - + //Stick in branch at the end machineBB->push_back((*BR)->getInst()->clone()); @@ -1970,18 +1970,18 @@ void ModuloSchedulingPass::writePrologues(std::vector<MachineBasicBlock *> &prol }*/ - (((MachineBasicBlock*)origBB)->getParent())->getBasicBlockList().push_back(machineBB); + (((MachineBasicBlock*)origBB)->getParent())->getBasicBlockList().push_back(machineBB); prologues.push_back(machineBB); llvm_prologues.push_back(llvmBB); } } void ModuloSchedulingPass::writeEpilogues(std::vector<MachineBasicBlock *> &epilogues, const MachineBasicBlock *origBB, std::vector<BasicBlock*> &llvm_epilogues, std::map<const Value*, std::pair<const MachineInstr*, int> > &valuesToSave, std::map<Value*, std::map<int, Value*> > &newValues,std::map<Value*, MachineBasicBlock*> &newValLocation, std::map<Value*, std::map<int, Value*> > &kernelPHIs ) { - + std::map<int, std::set<const MachineInstr*> > inKernel; - + for(MSSchedule::kernel_iterator I = schedule.kernel_begin(), E = schedule.kernel_end(); I != E; ++I) { - + //Ignore the branch, we will handle this separately //if(I->first->isBranch()) //continue; @@ -2010,7 +2010,7 @@ void ModuloSchedulingPass::writeEpilogues(std::vector<MachineBasicBlock *> &epil for(int i = schedule.getMaxStage()-1; i >= 0; --i) { BasicBlock *llvmBB = new BasicBlock("EPILOGUE", (Function*) (origBB->getBasicBlock()->getParent())); MachineBasicBlock *machineBB = new MachineBasicBlock(llvmBB); - + DEBUG(std::cerr << " Epilogue #: " << i << "\n"); @@ -2021,26 +2021,26 @@ void ModuloSchedulingPass::writeEpilogues(std::vector<MachineBasicBlock *> &epil if(inKernel[j].count(&*MI)) { DEBUG(std::cerr << "Cloning instruction " << *MI << "\n"); MachineInstr *clone = MI->clone(); - + //Update operands that need to use the result from the phi for(unsigned opNum=0; opNum < clone->getNumOperands(); ++opNum) { //get machine operand const MachineOperand &mOp = clone->getOperand(opNum); - + if((mOp.getType() == MachineOperand::MO_VirtualRegister && mOp.isUse())) { - + DEBUG(std::cerr << "Writing PHI for " << (mOp.getVRegValue()) << "\n"); - + //If this is the last instructions for the max iterations ago, don't update operands if(inEpilogue.count(mOp.getVRegValue())) if(inEpilogue[mOp.getVRegValue()] == i) continue; - + //Quickly write appropriate phis for this operand if(newValues.count(mOp.getVRegValue())) { if(newValues[mOp.getVRegValue()].count(i)) { Instruction *tmp = new TmpInstruction(newValues[mOp.getVRegValue()][i]); - + //Get machine code for this instruction MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get(defaultInst); tempMvec.addTemp((Value*) tmp); @@ -2053,10 +2053,10 @@ void ModuloSchedulingPass::writeEpilogues(std::vector<MachineBasicBlock *> &epil valPHIs[mOp.getVRegValue()] = tmp; } } - + if(valPHIs.count(mOp.getVRegValue())) { //Update the operand in the cloned instruction - clone->getOperand(opNum).setValueReg(valPHIs[mOp.getVRegValue()]); + clone->getOperand(opNum).setValueReg(valPHIs[mOp.getVRegValue()]); } } else if((mOp.getType() == MachineOperand::MO_VirtualRegister && mOp.isDef())) { @@ -2071,14 +2071,14 @@ void ModuloSchedulingPass::writeEpilogues(std::vector<MachineBasicBlock *> &epil (((MachineBasicBlock*)origBB)->getParent())->getBasicBlockList().push_back(machineBB); epilogues.push_back(machineBB); llvm_epilogues.push_back(llvmBB); - + DEBUG(std::cerr << "EPILOGUE #" << i << "\n"); DEBUG(machineBB->print(std::cerr)); } } void ModuloSchedulingPass::writeKernel(BasicBlock *llvmBB, MachineBasicBlock *machineBB, std::map<const Value*, std::pair<const MachineInstr*, int> > &valuesToSave, std::map<Value*, std::map<int, Value*> > &newValues, std::map<Value*, MachineBasicBlock*> &newValLocation, std::map<Value*, std::map<int, Value*> > &kernelPHIs) { - + //Keep track of operands that are read and saved from a previous iteration. The new clone //instruction will use the result of the phi instead. std::map<Value*, Value*> finalPHIValue; @@ -2089,7 +2089,7 @@ void ModuloSchedulingPass::writeKernel(BasicBlock *llvmBB, MachineBasicBlock *ma //Get target information to look at machine operands const TargetInstrInfo *mii = target.getInstrInfo(); - + //Create TmpInstructions for the final phis for(MSSchedule::kernel_iterator I = schedule.kernel_begin(), E = schedule.kernel_end(); I != E; ++I) { @@ -2102,7 +2102,7 @@ void ModuloSchedulingPass::writeKernel(BasicBlock *llvmBB, MachineBasicBlock *ma branches.push_back(instClone); continue; }*/ - + //Clone instruction const MachineInstr *inst = I->first; MachineInstr *instClone = inst->clone(); @@ -2119,7 +2119,7 @@ void ModuloSchedulingPass::writeKernel(BasicBlock *llvmBB, MachineBasicBlock *ma for(unsigned i=0; i < inst->getNumOperands(); ++i) { //get machine operand const MachineOperand &mOp = inst->getOperand(i); - + if(I->second != 0) { if(mOp.getType() == MachineOperand::MO_VirtualRegister && mOp.isUse()) { @@ -2134,21 +2134,21 @@ void ModuloSchedulingPass::writeKernel(BasicBlock *llvmBB, MachineBasicBlock *ma //Check if we already have a final PHI value for this if(!finalPHIValue.count(mOp.getVRegValue())) { TmpInstruction *tmp = new TmpInstruction(mOp.getVRegValue()); - + //Get machine code for this instruction MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get(defaultInst); tempMvec.addTemp((Value*) tmp); - + //Update the operand in the cloned instruction instClone->getOperand(i).setValueReg(tmp); - + //save this as our final phi finalPHIValue[mOp.getVRegValue()] = tmp; newValLocation[tmp] = machineBB; } else { //Use the previous final phi value - instClone->getOperand(i).setValueReg(finalPHIValue[mOp.getVRegValue()]); + instClone->getOperand(i).setValueReg(finalPHIValue[mOp.getVRegValue()]); } } } @@ -2156,9 +2156,9 @@ void ModuloSchedulingPass::writeKernel(BasicBlock *llvmBB, MachineBasicBlock *ma if(I->second != schedule.getMaxStage()) { if(mOp.getType() == MachineOperand::MO_VirtualRegister && mOp.isDef()) { if(valuesToSave.count(mOp.getVRegValue())) { - + TmpInstruction *tmp = new TmpInstruction(mOp.getVRegValue()); - + //Get machine code for this instruction MachineCodeForInstruction & tempVec = MachineCodeForInstruction::get(defaultInst); tempVec.addTemp((Value*) tmp); @@ -2169,10 +2169,10 @@ void ModuloSchedulingPass::writeKernel(BasicBlock *llvmBB, MachineBasicBlock *ma saveValue = BuildMI(machineBB, V9::FMOVS, 3).addReg(mOp.getVRegValue()).addRegDef(tmp); else if(mOp.getVRegValue()->getType() == Type::DoubleTy) saveValue = BuildMI(machineBB, V9::FMOVD, 3).addReg(mOp.getVRegValue()).addRegDef(tmp); - else + else saveValue = BuildMI(machineBB, V9::ORr, 3).addReg(mOp.getVRegValue()).addImm(0).addRegDef(tmp); - - + + //Save for future cleanup kernelValue[mOp.getVRegValue()] = tmp; newValLocation[tmp] = machineBB; @@ -2181,7 +2181,7 @@ void ModuloSchedulingPass::writeKernel(BasicBlock *llvmBB, MachineBasicBlock *ma } } } - + } //Add branches @@ -2196,14 +2196,14 @@ void ModuloSchedulingPass::writeKernel(BasicBlock *llvmBB, MachineBasicBlock *ma //Loop over each value we need to generate phis for - for(std::map<Value*, std::map<int, Value*> >::iterator V = newValues.begin(), + for(std::map<Value*, std::map<int, Value*> >::iterator V = newValues.begin(), E = newValues.end(); V != E; ++V) { DEBUG(std::cerr << "Writing phi for" << *(V->first)); DEBUG(std::cerr << "\nMap of Value* for this phi\n"); - DEBUG(for(std::map<int, Value*>::iterator I = V->second.begin(), - IE = V->second.end(); I != IE; ++I) { + DEBUG(for(std::map<int, Value*>::iterator I = V->second.begin(), + IE = V->second.end(); I != IE; ++I) { std::cerr << "Stage: " << I->first; std::cerr << " Value: " << *(I->second) << "\n"; }); @@ -2211,7 +2211,7 @@ void ModuloSchedulingPass::writeKernel(BasicBlock *llvmBB, MachineBasicBlock *ma //If we only have one current iteration live, its safe to set lastPhi = to kernel value if(V->second.size() == 1) { assert(kernelValue[V->first] != 0 && "Kernel value* must exist to create phi"); - MachineInstr *saveValue = BuildMI(*machineBB, machineBB->begin(),V9::PHI, 3).addReg(V->second.begin()->second).addReg(kernelValue[V->first]).addRegDef(finalPHIValue[V->first]); + MachineInstr *saveValue = BuildMI(*machineBB, machineBB->begin(),V9::PHI, 3).addReg(V->second.begin()->second).addReg(kernelValue[V->first]).addRegDef(finalPHIValue[V->first]); DEBUG(std::cerr << "Resulting PHI (one live): " << *saveValue << "\n"); kernelPHIs[V->first][V->second.begin()->first] = kernelValue[V->first]; DEBUG(std::cerr << "Put kernel phi in at stage: " << schedule.getMaxStage()-1 << " (map stage = " << V->second.begin()->first << ")\n"); @@ -2220,10 +2220,10 @@ void ModuloSchedulingPass::writeKernel(BasicBlock *llvmBB, MachineBasicBlock *ma //Keep track of last phi created. Instruction *lastPhi = 0; - + unsigned count = 1; //Loop over the the map backwards to generate phis - for(std::map<int, Value*>::reverse_iterator I = V->second.rbegin(), IE = V->second.rend(); + for(std::map<int, Value*>::reverse_iterator I = V->second.rbegin(), IE = V->second.rend(); I != IE; ++I) { if(count < (V->second).size()) { @@ -2244,7 +2244,7 @@ void ModuloSchedulingPass::writeKernel(BasicBlock *llvmBB, MachineBasicBlock *ma //Get machine code for this instruction MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get(defaultInst); tempMvec.addTemp((Value*) tmp); - + MachineInstr *saveValue = BuildMI(*machineBB, machineBB->begin(), V9::PHI, 3).addReg(lastPhi).addReg(I->second).addRegDef(tmp); DEBUG(std::cerr << "Resulting PHI: " << *saveValue << "\n"); @@ -2266,7 +2266,7 @@ void ModuloSchedulingPass::writeKernel(BasicBlock *llvmBB, MachineBasicBlock *ma } } - } + } DEBUG(std::cerr << "KERNEL after PHIs\n"); DEBUG(machineBB->print(std::cerr)); @@ -2280,7 +2280,7 @@ void ModuloSchedulingPass::removePHIs(const MachineBasicBlock *origBB, std::vect //Worklist of TmpInstructions that need to be added to a MCFI std::vector<Instruction*> addToMCFI; - + //Worklist to add OR instructions to end of kernel so not to invalidate the iterator //std::vector<std::pair<Instruction*, Value*> > newORs; @@ -2288,11 +2288,11 @@ void ModuloSchedulingPass::removePHIs(const MachineBasicBlock *origBB, std::vect //Start with the kernel and for each phi insert a copy for the phi def and for each arg for(MachineBasicBlock::iterator I = kernelBB->begin(), E = kernelBB->end(); I != E; ++I) { - + DEBUG(std::cerr << "Looking at Instr: " << *I << "\n"); //Get op code and check if its a phi if(I->getOpcode() == V9::PHI) { - + DEBUG(std::cerr << "Replacing PHI: " << *I << "\n"); Instruction *tmp = 0; @@ -2322,12 +2322,12 @@ void ModuloSchedulingPass::removePHIs(const MachineBasicBlock *origBB, std::vect BuildMI(*(newValLocation[mOp.getVRegValue()]), ++inst, V9::FMOVS, 3).addReg(mOp.getVRegValue()).addRegDef(tmp); else if(mOp.getVRegValue()->getType() == Type::DoubleTy) BuildMI(*(newValLocation[mOp.getVRegValue()]), ++inst, V9::FMOVD, 3).addReg(mOp.getVRegValue()).addRegDef(tmp); - else + else BuildMI(*(newValLocation[mOp.getVRegValue()]), ++inst, V9::ORr, 3).addReg(mOp.getVRegValue()).addImm(0).addRegDef(tmp); - + break; } - + } } @@ -2339,18 +2339,18 @@ void ModuloSchedulingPass::removePHIs(const MachineBasicBlock *origBB, std::vect BuildMI(*kernelBB, I, V9::FMOVS, 3).addReg(tmp).addRegDef(mOp.getVRegValue()); else if(tmp->getType() == Type::DoubleTy) BuildMI(*kernelBB, I, V9::FMOVD, 3).addReg(tmp).addRegDef(mOp.getVRegValue()); - else + else BuildMI(*kernelBB, I, V9::ORr, 3).addReg(tmp).addImm(0).addRegDef(mOp.getVRegValue()); - - + + worklist.push_back(std::make_pair(kernelBB, I)); } } - + } - + } //Add TmpInstructions to some MCFI @@ -2366,7 +2366,7 @@ void ModuloSchedulingPass::removePHIs(const MachineBasicBlock *origBB, std::vect //Remove phis from epilogue for(std::vector<MachineBasicBlock*>::iterator MB = epilogues.begin(), ME = epilogues.end(); MB != ME; ++MB) { for(MachineBasicBlock::iterator I = (*MB)->begin(), E = (*MB)->end(); I != E; ++I) { - + DEBUG(std::cerr << "Looking at Instr: " << *I << "\n"); //Get op code and check if its a phi if(I->getOpcode() == V9::PHI) { @@ -2376,12 +2376,12 @@ void ModuloSchedulingPass::removePHIs(const MachineBasicBlock *origBB, std::vect //Get Operand const MachineOperand &mOp = I->getOperand(i); assert(mOp.getType() == MachineOperand::MO_VirtualRegister && "Should be a Value*\n"); - + if(!tmp) { tmp = new TmpInstruction(mOp.getVRegValue()); addToMCFI.push_back(tmp); } - + //Now for all our arguments we read, OR to the new TmpInstruction that we created if(mOp.isUse()) { DEBUG(std::cerr << "Use: " << mOp << "\n"); @@ -2398,15 +2398,15 @@ void ModuloSchedulingPass::removePHIs(const MachineBasicBlock *origBB, std::vect BuildMI(*(newValLocation[mOp.getVRegValue()]), ++inst, V9::FMOVS, 3).addReg(mOp.getVRegValue()).addRegDef(tmp); else if(mOp.getVRegValue()->getType() == Type::DoubleTy) BuildMI(*(newValLocation[mOp.getVRegValue()]), ++inst, V9::FMOVD, 3).addReg(mOp.getVRegValue()).addRegDef(tmp); - else + else BuildMI(*(newValLocation[mOp.getVRegValue()]), ++inst, V9::ORr, 3).addReg(mOp.getVRegValue()).addImm(0).addRegDef(tmp); break; } - + } - + } else { //Remove the phi and replace it with an OR @@ -2415,16 +2415,16 @@ void ModuloSchedulingPass::removePHIs(const MachineBasicBlock *origBB, std::vect BuildMI(**MB, I, V9::FMOVS, 3).addReg(tmp).addRegDef(mOp.getVRegValue()); else if(tmp->getType() == Type::DoubleTy) BuildMI(**MB, I, V9::FMOVD, 3).addReg(tmp).addRegDef(mOp.getVRegValue()); - else + else BuildMI(**MB, I, V9::ORr, 3).addReg(tmp).addImm(0).addRegDef(mOp.getVRegValue()); worklist.push_back(std::make_pair(*MB,I)); } - + } } - + } } @@ -2439,10 +2439,10 @@ void ModuloSchedulingPass::removePHIs(const MachineBasicBlock *origBB, std::vect //Delete the phis for(std::vector<std::pair<MachineBasicBlock*, MachineBasicBlock::iterator> >::iterator I = worklist.begin(), E = worklist.end(); I != E; ++I) { - + DEBUG(std::cerr << "Deleting PHI " << *I->second << "\n"); I->first->erase(I->second); - + } @@ -2489,7 +2489,7 @@ void ModuloSchedulingPass::reconstructLoop(MachineBasicBlock *BB) { //make sure its def is not of the same stage as this instruction //because it will be consumed before its used Instruction *defInst = (Instruction*) srcI; - + //Should we save this value? bool save = true; @@ -2498,7 +2498,7 @@ void ModuloSchedulingPass::reconstructLoop(MachineBasicBlock *BB) { continue; MachineInstr *defInstr = defMap[srcI]; - + if(lastInstrs.count(defInstr)) { if(lastInstrs[defInstr] == I->second) { @@ -2506,10 +2506,10 @@ void ModuloSchedulingPass::reconstructLoop(MachineBasicBlock *BB) { } } - + if(save) valuesToSave[srcI] = std::make_pair(I->first, i); - } + } } if(mOp.getType() != MachineOperand::MO_VirtualRegister && mOp.isUse()) { @@ -2523,7 +2523,7 @@ void ModuloSchedulingPass::reconstructLoop(MachineBasicBlock *BB) { //Map to keep track of old to new values std::map<Value*, std::map<int, Value*> > newValues; - + //Map to keep track of old to new values in kernel std::map<Value*, std::map<int, Value*> > kernelPHIs; @@ -2538,9 +2538,9 @@ void ModuloSchedulingPass::reconstructLoop(MachineBasicBlock *BB) { //Write prologue if(schedule.getMaxStage() != 0) writePrologues(prologues, BB, llvm_prologues, valuesToSave, newValues, newValLocation); - + //Print out epilogues and prologue - DEBUG(for(std::vector<MachineBasicBlock*>::iterator I = prologues.begin(), E = prologues.end(); + DEBUG(for(std::vector<MachineBasicBlock*>::iterator I = prologues.begin(), E = prologues.end(); I != E; ++I) { std::cerr << "PROLOGUE\n"; (*I)->print(std::cerr); @@ -2550,8 +2550,8 @@ void ModuloSchedulingPass::reconstructLoop(MachineBasicBlock *BB) { MachineBasicBlock *machineKernelBB = new MachineBasicBlock(llvmKernelBB); (((MachineBasicBlock*)BB)->getParent())->getBasicBlockList().push_back(machineKernelBB); writeKernel(llvmKernelBB, machineKernelBB, valuesToSave, newValues, newValLocation, kernelPHIs); - - + + std::vector<MachineBasicBlock*> epilogues; std::vector<BasicBlock*> llvm_epilogues; @@ -2565,18 +2565,18 @@ void ModuloSchedulingPass::reconstructLoop(MachineBasicBlock *BB) { //Remove phis removePHIs(BB, prologues, epilogues, machineKernelBB, newValLocation); - + //Print out epilogues and prologue - DEBUG(for(std::vector<MachineBasicBlock*>::iterator I = prologues.begin(), E = prologues.end(); + DEBUG(for(std::vector<MachineBasicBlock*>::iterator I = prologues.begin(), E = prologues.end(); I != E; ++I) { std::cerr << "PROLOGUE\n"; (*I)->print(std::cerr); }); - + DEBUG(std::cerr << "KERNEL\n"); DEBUG(machineKernelBB->print(std::cerr)); - DEBUG(for(std::vector<MachineBasicBlock*>::iterator I = epilogues.begin(), E = epilogues.end(); + DEBUG(for(std::vector<MachineBasicBlock*>::iterator I = epilogues.begin(), E = epilogues.end(); I != E; ++I) { std::cerr << "EPILOGUE\n"; (*I)->print(std::cerr); @@ -2596,7 +2596,7 @@ void ModuloSchedulingPass::fixBranches(std::vector<MachineBasicBlock *> &prologu if(schedule.getMaxStage() != 0) { //Fix prologue branches for(unsigned I = 0; I < prologues.size(); ++I) { - + //Find terminator since getFirstTerminator does not work! for(MachineBasicBlock::reverse_iterator mInst = prologues[I]->rbegin(), mInstEnd = prologues[I]->rend(); mInst != mInstEnd; ++mInst) { MachineOpCode OC = mInst->getOpcode(); @@ -2606,7 +2606,7 @@ void ModuloSchedulingPass::fixBranches(std::vector<MachineBasicBlock *> &prologu MachineOperand &mOp = mInst->getOperand(opNum); if (mOp.getType() == MachineOperand::MO_PCRelativeDisp) { //Check if we are branching to the kernel, if not branch to epilogue - if(mOp.getVRegValue() == BB->getBasicBlock()) { + if(mOp.getVRegValue() == BB->getBasicBlock()) { if(I == prologues.size()-1) mOp.setValueReg(llvmKernelBB); else @@ -2626,17 +2626,17 @@ void ModuloSchedulingPass::fixBranches(std::vector<MachineBasicBlock *> &prologu //Update llvm basic block with our new branch instr DEBUG(std::cerr << BB->getBasicBlock()->getTerminator() << "\n"); const BranchInst *branchVal = dyn_cast<BranchInst>(BB->getBasicBlock()->getTerminator()); - + if(I == prologues.size()-1) { TerminatorInst *newBranch = new BranchInst(llvmKernelBB, - llvm_epilogues[(llvm_epilogues.size()-1-I)], - branchVal->getCondition(), + llvm_epilogues[(llvm_epilogues.size()-1-I)], + branchVal->getCondition(), llvm_prologues[I]); } else TerminatorInst *newBranch = new BranchInst(llvm_prologues[I+1], - llvm_epilogues[(llvm_epilogues.size()-1-I)], - branchVal->getCondition(), + llvm_epilogues[(llvm_epilogues.size()-1-I)], + branchVal->getCondition(), llvm_prologues[I]); } @@ -2657,7 +2657,7 @@ void ModuloSchedulingPass::fixBranches(std::vector<MachineBasicBlock *> &prologu else if(llvm_epilogues.size() > 0) { assert(origBranchExit == 0 && "There should only be one branch out of the loop"); - + origBranchExit = mOp.getVRegValue(); mOp.setValueReg(llvm_epilogues[0]); } @@ -2667,16 +2667,16 @@ void ModuloSchedulingPass::fixBranches(std::vector<MachineBasicBlock *> &prologu } } } - + //Update kernelLLVM branches const BranchInst *branchVal = dyn_cast<BranchInst>(BB->getBasicBlock()->getTerminator()); - + assert(origBranchExit != 0 && "We must have the original bb the kernel exits to!"); - + if(epilogues.size() > 0) { TerminatorInst *newBranch = new BranchInst(llvmKernelBB, - llvm_epilogues[0], - branchVal->getCondition(), + llvm_epilogues[0], + branchVal->getCondition(), llvmKernelBB); } else { @@ -2684,26 +2684,26 @@ void ModuloSchedulingPass::fixBranches(std::vector<MachineBasicBlock *> &prologu assert(origBBExit !=0 && "Original exit basic block must be set"); TerminatorInst *newBranch = new BranchInst(llvmKernelBB, origBBExit, - branchVal->getCondition(), + branchVal->getCondition(), llvmKernelBB); } if(schedule.getMaxStage() != 0) { //Lastly add unconditional branches for the epilogues for(unsigned I = 0; I < epilogues.size(); ++I) { - + //Now since we don't have fall throughs, add a unconditional branch to the next prologue if(I != epilogues.size()-1) { BuildMI(epilogues[I], V9::BA, 1).addPCDisp(llvm_epilogues[I+1]); //Add unconditional branch to end of epilogue - TerminatorInst *newBranch = new BranchInst(llvm_epilogues[I+1], + TerminatorInst *newBranch = new BranchInst(llvm_epilogues[I+1], llvm_epilogues[I]); } else { BuildMI(epilogues[I], V9::BA, 1).addPCDisp(origBranchExit); - - + + //Update last epilogue exit branch BranchInst *branchVal = (BranchInst*) dyn_cast<BranchInst>(BB->getBasicBlock()->getTerminator()); //Find where we are supposed to branch to @@ -2712,19 +2712,19 @@ void ModuloSchedulingPass::fixBranches(std::vector<MachineBasicBlock *> &prologu if(branchVal->getSuccessor(j) != BB->getBasicBlock()) nextBlock = branchVal->getSuccessor(j); } - + assert((nextBlock != 0) && "Next block should not be null!"); TerminatorInst *newBranch = new BranchInst(nextBlock, llvm_epilogues[I]); } //Add one more nop! BuildMI(epilogues[I], V9::NOP, 0); - + } } //FIX UP Machine BB entry!! //We are looking at the predecesor of our loop basic block and we want to change its ba instruction - + //Find all llvm basic blocks that branch to the loop entry and change to our first prologue. const BasicBlock *llvmBB = BB->getBasicBlock(); @@ -2732,7 +2732,7 @@ void ModuloSchedulingPass::fixBranches(std::vector<MachineBasicBlock *> &prologu std::vector<const BasicBlock*>Preds (pred_begin(llvmBB), pred_end(llvmBB)); //for(pred_const_iterator P = pred_begin(llvmBB), PE = pred_end(llvmBB); P != PE; ++PE) { - for(std::vector<const BasicBlock*>::iterator P = Preds.begin(), PE = Preds.end(); P != PE; ++P) { + for(std::vector<const BasicBlock*>::iterator P = Preds.begin(), PE = Preds.end(); P != PE; ++P) { if(*P == llvmBB) continue; else { @@ -2762,7 +2762,7 @@ void ModuloSchedulingPass::fixBranches(std::vector<MachineBasicBlock *> &prologu } } } - } + } } else { term->setSuccessor(i, llvmKernelBB); @@ -2789,7 +2789,7 @@ void ModuloSchedulingPass::fixBranches(std::vector<MachineBasicBlock *> &prologu break; } } - + //BB->getParent()->getBasicBlockList().erase(BB); diff --git a/lib/Target/SparcV9/ModuloScheduling/ModuloScheduling.h b/lib/Target/SparcV9/ModuloScheduling/ModuloScheduling.h index 40d86f0..9a7bfe7 100644 --- a/lib/Target/SparcV9/ModuloScheduling/ModuloScheduling.h +++ b/lib/Target/SparcV9/ModuloScheduling/ModuloScheduling.h @@ -6,8 +6,8 @@ // the University of Illinois Open Source License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// -// -// +// +// //===----------------------------------------------------------------------===// #ifndef LLVM_MODULOSCHEDULING_H @@ -22,7 +22,7 @@ #include <set> namespace llvm { - + //Struct to contain ModuloScheduling Specific Information for each node struct MSNodeAttributes { @@ -31,9 +31,9 @@ namespace llvm { int MOB; int depth; int height; - MSNodeAttributes(int asap=-1, int alap=-1, int mob=-1, - int d=-1, int h=-1) : ASAP(asap), ALAP(alap), - MOB(mob), depth(d), + MSNodeAttributes(int asap=-1, int alap=-1, int mob=-1, + int d=-1, int h=-1) : ASAP(asap), ALAP(alap), + MOB(mob), depth(d), height(h) {} }; @@ -55,19 +55,19 @@ namespace llvm { //Map that holds node to node attribute information std::map<MSchedGraphNode*, MSNodeAttributes> nodeToAttributesMap; - + //Map to hold all reccurrences std::set<std::pair<int, std::vector<MSchedGraphNode*> > > recurrenceList; - + //Set of edges to ignore, stored as src node and index into vector of successors std::set<std::pair<MSchedGraphNode*, unsigned> > edgesToIgnore; - + //Vector containing the partial order std::vector<std::set<MSchedGraphNode*> > partialOrder; - + //Vector containing the final node order std::vector<MSchedGraphNode*> FinalNodeOrder; - + //Schedule table, key is the cycle number and the vector is resource, node pairs MSSchedule schedule; @@ -77,7 +77,7 @@ namespace llvm { //Internal functions bool CreateDefMap(MachineBasicBlock *BI); bool MachineBBisValid(const MachineBasicBlock *BI); - bool assocIndVar(Instruction *I, std::set<Instruction*> &indVar, + bool assocIndVar(Instruction *I, std::set<Instruction*> &indVar, std::vector<Instruction*> &stack, BasicBlock *BB); int calculateResMII(const MachineBasicBlock *BI); int calculateRecMII(MSchedGraph *graph, int MII); @@ -93,59 +93,59 @@ namespace llvm { int findMaxASAP(); void orderNodes(); - void findAllReccurrences(MSchedGraphNode *node, + void findAllReccurrences(MSchedGraphNode *node, std::vector<MSchedGraphNode*> &visitedNodes, int II); void addReccurrence(std::vector<MSchedGraphNode*> &recurrence, int II, MSchedGraphNode*, MSchedGraphNode*); void findAllCircuits(MSchedGraph *MSG, int II); - bool circuit(MSchedGraphNode *v, std::vector<MSchedGraphNode*> &stack, - std::set<MSchedGraphNode*> &blocked, + bool circuit(MSchedGraphNode *v, std::vector<MSchedGraphNode*> &stack, + std::set<MSchedGraphNode*> &blocked, std::vector<MSchedGraphNode*> &SCC, MSchedGraphNode *s, std::map<MSchedGraphNode*, std::set<MSchedGraphNode*> > &B, int II, std::map<MSchedGraphNode*, MSchedGraphNode*> &newNodes); - + void unblock(MSchedGraphNode *u, std::set<MSchedGraphNode*> &blocked, std::map<MSchedGraphNode*, std::set<MSchedGraphNode*> > &B); - void searchPath(MSchedGraphNode *node, + void searchPath(MSchedGraphNode *node, std::vector<MSchedGraphNode*> &path, std::set<MSchedGraphNode*> &nodesToAdd); - void pathToRecc(MSchedGraphNode *node, + void pathToRecc(MSchedGraphNode *node, std::vector<MSchedGraphNode*> &path, std::set<MSchedGraphNode*> &poSet, std::set<MSchedGraphNode*> &lastNodes); - + void computePartialOrder(); bool computeSchedule(const MachineBasicBlock *BB); - bool scheduleNode(MSchedGraphNode *node, + bool scheduleNode(MSchedGraphNode *node, int start, int end); void predIntersect(std::set<MSchedGraphNode*> &CurrentSet, std::set<MSchedGraphNode*> &IntersectResult); void succIntersect(std::set<MSchedGraphNode*> &CurrentSet, std::set<MSchedGraphNode*> &IntersectResult); - + void reconstructLoop(MachineBasicBlock*); - + //void saveValue(const MachineInstr*, const std::set<Value*>&, std::vector<Value*>*); - void fixBranches(std::vector<MachineBasicBlock *> &prologues, std::vector<BasicBlock*> &llvm_prologues, MachineBasicBlock *machineBB, BasicBlock *llvmBB, std::vector<MachineBasicBlock *> &epilogues, std::vector<BasicBlock*> &llvm_epilogues, MachineBasicBlock*); + void fixBranches(std::vector<MachineBasicBlock *> &prologues, std::vector<BasicBlock*> &llvm_prologues, MachineBasicBlock *machineBB, BasicBlock *llvmBB, std::vector<MachineBasicBlock *> &epilogues, std::vector<BasicBlock*> &llvm_epilogues, MachineBasicBlock*); void writePrologues(std::vector<MachineBasicBlock *> &prologues, MachineBasicBlock *origBB, std::vector<BasicBlock*> &llvm_prologues, std::map<const Value*, std::pair<const MachineInstr*, int> > &valuesToSave, std::map<Value*, std::map<int, Value*> > &newValues, std::map<Value*, MachineBasicBlock*> &newValLocation); void writeEpilogues(std::vector<MachineBasicBlock *> &epilogues, const MachineBasicBlock *origBB, std::vector<BasicBlock*> &llvm_epilogues, std::map<const Value*, std::pair<const MachineInstr*, int> > &valuesToSave,std::map<Value*, std::map<int, Value*> > &newValues, std::map<Value*, MachineBasicBlock*> &newValLocation, std::map<Value*, std::map<int, Value*> > &kernelPHIs); - - + + void writeKernel(BasicBlock *llvmBB, MachineBasicBlock *machineBB, std::map<const Value*, std::pair<const MachineInstr*, int> > &valuesToSave, std::map<Value*, std::map<int, Value*> > &newValues, std::map<Value*, MachineBasicBlock*> &newValLocation, std::map<Value*, std::map<int, Value*> > &kernelPHIs); void removePHIs(const MachineBasicBlock *origBB, std::vector<MachineBasicBlock *> &prologues, std::vector<MachineBasicBlock *> &epilogues, MachineBasicBlock *kernelBB, std::map<Value*, MachineBasicBlock*> &newValLocation); - + void connectedComponentSet(MSchedGraphNode *node, std::set<MSchedGraphNode*> &ccSet, std::set<MSchedGraphNode*> &lastNodes); public: ModuloSchedulingPass(TargetMachine &targ) : target(targ) {} virtual bool runOnFunction(Function &F); virtual const char* getPassName() const { return "ModuloScheduling"; } - + // getAnalysisUsage virtual void getAnalysisUsage(AnalysisUsage &AU) const { AU.addRequired<DependenceAnalyzer>(); |