diff options
Diffstat (limited to 'lib/Target/SystemZ')
36 files changed, 134 insertions, 158 deletions
diff --git a/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp b/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp index 758be41..0955f4a 100644 --- a/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp +++ b/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp @@ -345,7 +345,7 @@ public: SMLoc NameLoc, OperandVector &Operands) override; bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, OperandVector &Operands, MCStreamer &Out, - unsigned &ErrorInfo, + uint64_t &ErrorInfo, bool MatchingInlineAsm) override; // Used by the TableGen code to parse particular operand types. @@ -677,7 +677,7 @@ bool SystemZAsmParser::parseOperand(OperandVector &Operands, bool SystemZAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, OperandVector &Operands, MCStreamer &Out, - unsigned &ErrorInfo, + uint64_t &ErrorInfo, bool MatchingInlineAsm) { MCInst Inst; unsigned MatchResult; @@ -696,7 +696,7 @@ bool SystemZAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, // Special case the error message for the very common case where only // a single subtarget feature is missing std::string Msg = "instruction requires:"; - unsigned Mask = 1; + uint64_t Mask = 1; for (unsigned I = 0; I < sizeof(ErrorInfo) * 8 - 1; ++I) { if (ErrorInfo & Mask) { Msg += " "; @@ -709,7 +709,7 @@ bool SystemZAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, case Match_InvalidOperand: { SMLoc ErrorLoc = IDLoc; - if (ErrorInfo != ~0U) { + if (ErrorInfo != ~0ULL) { if (ErrorInfo >= Operands.size()) return Error(IDLoc, "too few operands for instruction"); diff --git a/lib/Target/SystemZ/CMakeLists.txt b/lib/Target/SystemZ/CMakeLists.txt index 4da2d0f..41a614d 100644 --- a/lib/Target/SystemZ/CMakeLists.txt +++ b/lib/Target/SystemZ/CMakeLists.txt @@ -5,7 +5,7 @@ tablegen(LLVM SystemZGenAsmWriter.inc -gen-asm-writer) tablegen(LLVM SystemZGenCallingConv.inc -gen-callingconv) tablegen(LLVM SystemZGenDAGISel.inc -gen-dag-isel) tablegen(LLVM SystemZGenDisassemblerTables.inc -gen-disassembler) -tablegen(LLVM SystemZGenMCCodeEmitter.inc -gen-emitter -mc-emitter) +tablegen(LLVM SystemZGenMCCodeEmitter.inc -gen-emitter) tablegen(LLVM SystemZGenInstrInfo.inc -gen-instr-info) tablegen(LLVM SystemZGenRegisterInfo.inc -gen-register-info) tablegen(LLVM SystemZGenSubtargetInfo.inc -gen-subtarget) diff --git a/lib/Target/SystemZ/Disassembler/LLVMBuild.txt b/lib/Target/SystemZ/Disassembler/LLVMBuild.txt index c3081f5..fd78269 100644 --- a/lib/Target/SystemZ/Disassembler/LLVMBuild.txt +++ b/lib/Target/SystemZ/Disassembler/LLVMBuild.txt @@ -19,5 +19,5 @@ type = Library name = SystemZDisassembler parent = SystemZ -required_libraries = MC Support SystemZDesc SystemZInfo +required_libraries = MC MCDisassembler Support SystemZDesc SystemZInfo add_to_library_groups = SystemZ diff --git a/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp b/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp index 2350776..23173bf 100644 --- a/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp +++ b/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp @@ -12,7 +12,6 @@ #include "llvm/MC/MCFixedLenDisassembler.h" #include "llvm/MC/MCInst.h" #include "llvm/MC/MCSubtargetInfo.h" -#include "llvm/Support/MemoryObject.h" #include "llvm/Support/TargetRegistry.h" using namespace llvm; @@ -28,11 +27,10 @@ public: : MCDisassembler(STI, Ctx) {} virtual ~SystemZDisassembler() {} - // Override MCDisassembler. - DecodeStatus getInstruction(MCInst &instr, uint64_t &size, - const MemoryObject ®ion, uint64_t address, - raw_ostream &vStream, - raw_ostream &cStream) const override; + DecodeStatus getInstruction(MCInst &instr, uint64_t &Size, + ArrayRef<uint8_t> Bytes, uint64_t Address, + raw_ostream &VStream, + raw_ostream &CStream) const override; }; } // end anonymous namespace @@ -288,14 +286,13 @@ static DecodeStatus decodeBDLAddr64Disp12Len8Operand(MCInst &Inst, #include "SystemZGenDisassemblerTables.inc" DecodeStatus SystemZDisassembler::getInstruction(MCInst &MI, uint64_t &Size, - const MemoryObject &Region, + ArrayRef<uint8_t> Bytes, uint64_t Address, - raw_ostream &os, - raw_ostream &cs) const { + raw_ostream &OS, + raw_ostream &CS) const { // Get the first two bytes of the instruction. - uint8_t Bytes[6]; Size = 0; - if (Region.readBytes(Address, 2, Bytes) == -1) + if (Bytes.size() < 2) return MCDisassembler::Fail; // The top 2 bits of the first byte specify the size. @@ -312,7 +309,7 @@ DecodeStatus SystemZDisassembler::getInstruction(MCInst &MI, uint64_t &Size, } // Read any remaining bytes. - if (Size > 2 && Region.readBytes(Address + 2, Size - 2, Bytes + 2) == -1) + if (Bytes.size() < Size) return MCDisassembler::Fail; // Construct the instruction. diff --git a/lib/Target/SystemZ/InstPrinter/SystemZInstPrinter.h b/lib/Target/SystemZ/InstPrinter/SystemZInstPrinter.h index dce482b..753903c 100644 --- a/lib/Target/SystemZ/InstPrinter/SystemZInstPrinter.h +++ b/lib/Target/SystemZ/InstPrinter/SystemZInstPrinter.h @@ -11,8 +11,8 @@ // //===----------------------------------------------------------------------===// -#ifndef LLVM_SYSTEMZINSTPRINTER_H -#define LLVM_SYSTEMZINSTPRINTER_H +#ifndef LLVM_LIB_TARGET_SYSTEMZ_INSTPRINTER_SYSTEMZINSTPRINTER_H +#define LLVM_LIB_TARGET_SYSTEMZ_INSTPRINTER_SYSTEMZINSTPRINTER_H #include "llvm/MC/MCInstPrinter.h" #include "llvm/Support/Compiler.h" diff --git a/lib/Target/SystemZ/LLVMBuild.txt b/lib/Target/SystemZ/LLVMBuild.txt index 7781318..542aaee 100644 --- a/lib/Target/SystemZ/LLVMBuild.txt +++ b/lib/Target/SystemZ/LLVMBuild.txt @@ -31,5 +31,5 @@ has_jit = 1 type = Library name = SystemZCodeGen parent = SystemZ -required_libraries = AsmPrinter CodeGen Core MC Scalar SelectionDAG Support SystemZAsmPrinter SystemZDesc SystemZInfo Target +required_libraries = AsmPrinter CodeGen Core MC SelectionDAG Support SystemZAsmPrinter SystemZDesc SystemZInfo Target add_to_library_groups = SystemZ diff --git a/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp b/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp index c46a36b..35887fa 100644 --- a/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp +++ b/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp @@ -23,12 +23,5 @@ SystemZMCAsmInfo::SystemZMCAsmInfo(StringRef TT) { Data64bitsDirective = "\t.quad\t"; UsesELFSectionDirectiveForBSS = true; SupportsDebugInformation = true; - HasLEB128 = true; ExceptionsType = ExceptionHandling::DwarfCFI; } - -const MCSection * -SystemZMCAsmInfo::getNonexecutableStackSection(MCContext &Ctx) const { - return Ctx.getELFSection(".note.GNU-stack", ELF::SHT_PROGBITS, - 0, SectionKind::getMetadata()); -} diff --git a/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.h b/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.h index 1de97af..19b5b4b 100644 --- a/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.h +++ b/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.h @@ -7,8 +7,8 @@ // //===----------------------------------------------------------------------===// -#ifndef SystemZTARGETASMINFO_H -#define SystemZTARGETASMINFO_H +#ifndef LLVM_LIB_TARGET_SYSTEMZ_MCTARGETDESC_SYSTEMZMCASMINFO_H +#define LLVM_LIB_TARGET_SYSTEMZ_MCTARGETDESC_SYSTEMZMCASMINFO_H #include "llvm/MC/MCAsmInfoELF.h" #include "llvm/Support/Compiler.h" @@ -19,9 +19,6 @@ class StringRef; class SystemZMCAsmInfo : public MCAsmInfoELF { public: explicit SystemZMCAsmInfo(StringRef TT); - - // Override MCAsmInfo; - const MCSection *getNonexecutableStackSection(MCContext &Ctx) const override; }; } // end namespace llvm diff --git a/lib/Target/SystemZ/MCTargetDesc/SystemZMCFixups.h b/lib/Target/SystemZ/MCTargetDesc/SystemZMCFixups.h index a3aab71..52a8d1d 100644 --- a/lib/Target/SystemZ/MCTargetDesc/SystemZMCFixups.h +++ b/lib/Target/SystemZ/MCTargetDesc/SystemZMCFixups.h @@ -7,8 +7,8 @@ // //===----------------------------------------------------------------------===// -#ifndef LLVM_SYSTEMZMCFIXUPS_H -#define LLVM_SYSTEMZMCFIXUPS_H +#ifndef LLVM_LIB_TARGET_SYSTEMZ_MCTARGETDESC_SYSTEMZMCFIXUPS_H +#define LLVM_LIB_TARGET_SYSTEMZ_MCTARGETDESC_SYSTEMZMCFIXUPS_H #include "llvm/MC/MCFixup.h" diff --git a/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp b/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp index cc94869..6e82b6d 100644 --- a/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp +++ b/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp @@ -181,15 +181,12 @@ static MCInstPrinter *createSystemZMCInstPrinter(const Target &T, return new SystemZInstPrinter(MAI, MII, MRI); } -static MCStreamer *createSystemZMCObjectStreamer(const Target &T, StringRef TT, - MCContext &Ctx, - MCAsmBackend &MAB, - raw_ostream &OS, - MCCodeEmitter *Emitter, - const MCSubtargetInfo &STI, - bool RelaxAll, - bool NoExecStack) { - return createELFStreamer(Ctx, MAB, OS, Emitter, RelaxAll, NoExecStack); +static MCStreamer * +createSystemZMCObjectStreamer(const Target &T, StringRef TT, MCContext &Ctx, + MCAsmBackend &MAB, raw_ostream &OS, + MCCodeEmitter *Emitter, + const MCSubtargetInfo &STI, bool RelaxAll) { + return createELFStreamer(Ctx, MAB, OS, Emitter, RelaxAll); } extern "C" void LLVMInitializeSystemZTargetMC() { diff --git a/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.h b/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.h index cbaf9a8..5eb6526 100644 --- a/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.h +++ b/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.h @@ -7,8 +7,8 @@ // //===----------------------------------------------------------------------===// -#ifndef SYSTEMZMCTARGETDESC_H -#define SYSTEMZMCTARGETDESC_H +#ifndef LLVM_LIB_TARGET_SYSTEMZ_MCTARGETDESC_SYSTEMZMCTARGETDESC_H +#define LLVM_LIB_TARGET_SYSTEMZ_MCTARGETDESC_SYSTEMZMCTARGETDESC_H #include "llvm/Support/DataTypes.h" diff --git a/lib/Target/SystemZ/Makefile b/lib/Target/SystemZ/Makefile index 445725b..732c317 100644 --- a/lib/Target/SystemZ/Makefile +++ b/lib/Target/SystemZ/Makefile @@ -15,7 +15,6 @@ TARGET = SystemZ BUILT_SOURCES = SystemZGenRegisterInfo.inc \ SystemZGenAsmWriter.inc \ SystemZGenAsmMatcher.inc \ - SystemZGenCodeEmitter.inc \ SystemZGenDisassemblerTables.inc \ SystemZGenInstrInfo.inc \ SystemZGenDAGISel.inc \ diff --git a/lib/Target/SystemZ/SystemZ.h b/lib/Target/SystemZ/SystemZ.h index 1579249..c8b95b2 100644 --- a/lib/Target/SystemZ/SystemZ.h +++ b/lib/Target/SystemZ/SystemZ.h @@ -12,8 +12,8 @@ // //===----------------------------------------------------------------------===// -#ifndef SYSTEMZ_H -#define SYSTEMZ_H +#ifndef LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZ_H +#define LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZ_H #include "MCTargetDesc/SystemZMCTargetDesc.h" #include "llvm/Support/CodeGen.h" diff --git a/lib/Target/SystemZ/SystemZAsmPrinter.cpp b/lib/Target/SystemZ/SystemZAsmPrinter.cpp index 8b18bc1..f4f3ec7 100644 --- a/lib/Target/SystemZ/SystemZAsmPrinter.cpp +++ b/lib/Target/SystemZ/SystemZAsmPrinter.cpp @@ -185,7 +185,8 @@ EmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV) { MCSymbolRefExpr::Create(getSymbol(ZCPV->getGlobalValue()), getModifierVariantKind(ZCPV->getModifier()), OutContext); - uint64_t Size = TM.getDataLayout()->getTypeAllocSize(ZCPV->getType()); + uint64_t Size = + TM.getSubtargetImpl()->getDataLayout()->getTypeAllocSize(ZCPV->getType()); OutStreamer.EmitValue(Expr, Size); } @@ -229,7 +230,7 @@ void SystemZAsmPrinter::EmitEndOfAsmFile(Module &M) { MachineModuleInfoELF::SymbolListTy Stubs = MMIELF.GetGVStubList(); if (!Stubs.empty()) { OutStreamer.SwitchSection(TLOFELF.getDataRelSection()); - const DataLayout *TD = TM.getDataLayout(); + const DataLayout *TD = TM.getSubtargetImpl()->getDataLayout(); for (unsigned i = 0, e = Stubs.size(); i != e; ++i) { OutStreamer.EmitLabel(Stubs[i].first); diff --git a/lib/Target/SystemZ/SystemZAsmPrinter.h b/lib/Target/SystemZ/SystemZAsmPrinter.h index 20093bc..6467279 100644 --- a/lib/Target/SystemZ/SystemZAsmPrinter.h +++ b/lib/Target/SystemZ/SystemZAsmPrinter.h @@ -7,8 +7,8 @@ // //===----------------------------------------------------------------------===// -#ifndef SYSTEMZASMPRINTER_H -#define SYSTEMZASMPRINTER_H +#ifndef LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZASMPRINTER_H +#define LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZASMPRINTER_H #include "SystemZTargetMachine.h" #include "llvm/CodeGen/AsmPrinter.h" diff --git a/lib/Target/SystemZ/SystemZCallingConv.h b/lib/Target/SystemZ/SystemZCallingConv.h index 4b1569d..71605ac 100644 --- a/lib/Target/SystemZ/SystemZCallingConv.h +++ b/lib/Target/SystemZ/SystemZCallingConv.h @@ -7,8 +7,8 @@ // //===----------------------------------------------------------------------===// -#ifndef SYSTEMZCALLINGCONV_H -#define SYSTEMZCALLINGCONV_H +#ifndef LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZCALLINGCONV_H +#define LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZCALLINGCONV_H namespace llvm { namespace SystemZ { diff --git a/lib/Target/SystemZ/SystemZConstantPoolValue.h b/lib/Target/SystemZ/SystemZConstantPoolValue.h index 699718f..0bd8c20 100644 --- a/lib/Target/SystemZ/SystemZConstantPoolValue.h +++ b/lib/Target/SystemZ/SystemZConstantPoolValue.h @@ -7,8 +7,8 @@ // //===----------------------------------------------------------------------===// -#ifndef SYSTEMZCONSTANTPOOLVALUE_H -#define SYSTEMZCONSTANTPOOLVALUE_H +#ifndef LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZCONSTANTPOOLVALUE_H +#define LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZCONSTANTPOOLVALUE_H #include "llvm/CodeGen/MachineConstantPool.h" #include "llvm/Support/ErrorHandling.h" diff --git a/lib/Target/SystemZ/SystemZElimCompare.cpp b/lib/Target/SystemZ/SystemZElimCompare.cpp index dc210d6..ce99ee5 100644 --- a/lib/Target/SystemZ/SystemZElimCompare.cpp +++ b/lib/Target/SystemZ/SystemZElimCompare.cpp @@ -47,7 +47,7 @@ struct Reference { return *this; } - operator bool() const { return Def || Use; } + LLVM_EXPLICIT operator bool() const { return Def || Use; } // True if the register is defined or used in some form, either directly or // via a sub- or super-register. @@ -458,7 +458,7 @@ bool SystemZElimCompare::processBlock(MachineBasicBlock &MBB) { } bool SystemZElimCompare::runOnMachineFunction(MachineFunction &F) { - TII = static_cast<const SystemZInstrInfo *>(F.getTarget().getInstrInfo()); + TII = static_cast<const SystemZInstrInfo *>(F.getSubtarget().getInstrInfo()); TRI = &TII->getRegisterInfo(); bool Changed = false; diff --git a/lib/Target/SystemZ/SystemZFrameLowering.cpp b/lib/Target/SystemZ/SystemZFrameLowering.cpp index 055dbe9..eff4ae3 100644 --- a/lib/Target/SystemZ/SystemZFrameLowering.cpp +++ b/lib/Target/SystemZ/SystemZFrameLowering.cpp @@ -13,6 +13,7 @@ #include "SystemZInstrInfo.h" #include "SystemZMachineFunctionInfo.h" #include "SystemZRegisterInfo.h" +#include "SystemZSubtarget.h" #include "llvm/CodeGen/MachineModuleInfo.h" #include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/CodeGen/RegisterScavenging.h" @@ -65,7 +66,7 @@ processFunctionBeforeCalleeSavedScan(MachineFunction &MF, RegScavenger *RS) const { MachineFrameInfo *MFFrame = MF.getFrameInfo(); MachineRegisterInfo &MRI = MF.getRegInfo(); - const TargetRegisterInfo *TRI = MF.getTarget().getRegisterInfo(); + const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo(); bool HasFP = hasFP(MF); SystemZMachineFunctionInfo *MFI = MF.getInfo<SystemZMachineFunctionInfo>(); bool IsVarArg = MF.getFunction()->isVarArg(); @@ -108,7 +109,8 @@ processFunctionBeforeCalleeSavedScan(MachineFunction &MF, // and end registers. static void addSavedGPR(MachineBasicBlock &MBB, MachineInstrBuilder &MIB, unsigned GPR64, bool IsImplicit) { - const TargetRegisterInfo *RI = MBB.getParent()->getTarget().getRegisterInfo(); + const TargetRegisterInfo *RI = + MBB.getParent()->getSubtarget().getRegisterInfo(); unsigned GPR32 = RI->getSubReg(GPR64, SystemZ::subreg_l32); bool IsLive = MBB.isLiveIn(GPR64) || MBB.isLiveIn(GPR32); if (!IsLive || !IsImplicit) { @@ -127,7 +129,7 @@ spillCalleeSavedRegisters(MachineBasicBlock &MBB, return false; MachineFunction &MF = *MBB.getParent(); - const TargetInstrInfo *TII = MF.getTarget().getInstrInfo(); + const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo(); SystemZMachineFunctionInfo *ZFI = MF.getInfo<SystemZMachineFunctionInfo>(); bool IsVarArg = MF.getFunction()->isVarArg(); DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc(); @@ -216,7 +218,7 @@ restoreCalleeSavedRegisters(MachineBasicBlock &MBB, return false; MachineFunction &MF = *MBB.getParent(); - const TargetInstrInfo *TII = MF.getTarget().getInstrInfo(); + const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo(); SystemZMachineFunctionInfo *ZFI = MF.getInfo<SystemZMachineFunctionInfo>(); bool HasFP = hasFP(MF); DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc(); @@ -292,7 +294,7 @@ static void emitIncrement(MachineBasicBlock &MBB, else { Opcode = SystemZ::AGFI; // Make sure we maintain 8-byte stack alignment. - int64_t MinVal = -int64_t(1) << 31; + int64_t MinVal = -uint64_t(1) << 31; int64_t MaxVal = (int64_t(1) << 31) - 8; if (ThisVal < MinVal) ThisVal = MinVal; @@ -311,7 +313,7 @@ void SystemZFrameLowering::emitPrologue(MachineFunction &MF) const { MachineBasicBlock &MBB = MF.front(); MachineFrameInfo *MFFrame = MF.getFrameInfo(); auto *ZII = - static_cast<const SystemZInstrInfo*>(MF.getTarget().getInstrInfo()); + static_cast<const SystemZInstrInfo *>(MF.getSubtarget().getInstrInfo()); SystemZMachineFunctionInfo *ZFI = MF.getInfo<SystemZMachineFunctionInfo>(); MachineBasicBlock::iterator MBBI = MBB.begin(); MachineModuleInfo &MMI = MF.getMMI(); @@ -408,7 +410,7 @@ void SystemZFrameLowering::emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const { MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr(); auto *ZII = - static_cast<const SystemZInstrInfo*>(MF.getTarget().getInstrInfo()); + static_cast<const SystemZInstrInfo *>(MF.getSubtarget().getInstrInfo()); SystemZMachineFunctionInfo *ZFI = MF.getInfo<SystemZMachineFunctionInfo>(); // Skip the return instruction. diff --git a/lib/Target/SystemZ/SystemZFrameLowering.h b/lib/Target/SystemZ/SystemZFrameLowering.h index 4d5fe6d..cefa56f 100644 --- a/lib/Target/SystemZ/SystemZFrameLowering.h +++ b/lib/Target/SystemZ/SystemZFrameLowering.h @@ -7,8 +7,8 @@ // //===----------------------------------------------------------------------===// -#ifndef SYSTEMZFRAMELOWERING_H -#define SYSTEMZFRAMELOWERING_H +#ifndef LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZFRAMELOWERING_H +#define LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZFRAMELOWERING_H #include "llvm/ADT/IndexedMap.h" #include "llvm/Target/TargetFrameLowering.h" diff --git a/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp b/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp index 24f7584..5f84624 100644 --- a/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp +++ b/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp @@ -140,7 +140,7 @@ class SystemZDAGToDAGISel : public SelectionDAGISel { } const SystemZInstrInfo *getInstrInfo() const { - return getTargetMachine().getInstrInfo(); + return getTargetMachine().getSubtargetImpl()->getInstrInfo(); } // Try to fold more of the base or index of AM into AM, where IsBase @@ -315,9 +315,9 @@ class SystemZDAGToDAGISel : public SelectionDAGISel { public: SystemZDAGToDAGISel(SystemZTargetMachine &TM, CodeGenOpt::Level OptLevel) - : SelectionDAGISel(TM, OptLevel), - Lowering(*TM.getTargetLowering()), - Subtarget(*TM.getSubtargetImpl()) { } + : SelectionDAGISel(TM, OptLevel), + Lowering(*TM.getSubtargetImpl()->getTargetLowering()), + Subtarget(*TM.getSubtargetImpl()) {} // Override MachineFunctionPass. const char *getPassName() const override { @@ -1000,8 +1000,8 @@ bool SystemZDAGToDAGISel::canUseBlockOperation(StoreSDNode *Store, if (V1 == V2 && End1 == End2) return false; - return !AA->alias(AliasAnalysis::Location(V1, End1, Load->getTBAAInfo()), - AliasAnalysis::Location(V2, End2, Store->getTBAAInfo())); + return !AA->alias(AliasAnalysis::Location(V1, End1, Load->getAAInfo()), + AliasAnalysis::Location(V2, End2, Store->getAAInfo())); } bool SystemZDAGToDAGISel::storeLoadCanUseMVC(SDNode *N) const { diff --git a/lib/Target/SystemZ/SystemZISelLowering.cpp b/lib/Target/SystemZ/SystemZISelLowering.cpp index 00c65f5..b282fca 100644 --- a/lib/Target/SystemZ/SystemZISelLowering.cpp +++ b/lib/Target/SystemZ/SystemZISelLowering.cpp @@ -81,7 +81,7 @@ static MachineOperand earlyUseOperand(MachineOperand Op) { } SystemZTargetLowering::SystemZTargetLowering(const TargetMachine &tm) - : TargetLowering(tm, new TargetLoweringObjectFileELF()), + : TargetLowering(tm), Subtarget(tm.getSubtarget<SystemZSubtarget>()) { MVT PtrVT = getPointerTy(); @@ -339,9 +339,10 @@ bool SystemZTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT) const { return Imm.isZero() || Imm.isNegZero(); } -bool SystemZTargetLowering::allowsUnalignedMemoryAccesses(EVT VT, - unsigned, - bool *Fast) const { +bool SystemZTargetLowering::allowsMisalignedMemoryAccesses(EVT VT, + unsigned, + unsigned, + bool *Fast) const { // Unaligned accesses should never be slower than the expanded version. // We check specifically for aligned accesses in the few cases where // they are required. @@ -674,12 +675,11 @@ LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, SystemZMachineFunctionInfo *FuncInfo = MF.getInfo<SystemZMachineFunctionInfo>(); auto *TFL = static_cast<const SystemZFrameLowering *>( - DAG.getTarget().getFrameLowering()); + DAG.getSubtarget().getFrameLowering()); // Assign locations to all of the incoming arguments. SmallVector<CCValAssign, 16> ArgLocs; - CCState CCInfo(CallConv, IsVarArg, MF, DAG.getTarget(), ArgLocs, - *DAG.getContext()); + CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext()); CCInfo.AnalyzeFormalArguments(Ins, CC_SystemZ); unsigned NumFixedGPRs = 0; @@ -782,7 +782,7 @@ LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, return Chain; } -static bool canUseSiblingCall(CCState ArgCCInfo, +static bool canUseSiblingCall(const CCState &ArgCCInfo, SmallVectorImpl<CCValAssign> &ArgLocs) { // Punt if there are any indirect or stack arguments, or if the call // needs the call-saved argument register R6. @@ -817,8 +817,7 @@ SystemZTargetLowering::LowerCall(CallLoweringInfo &CLI, // Analyze the operands of the call, assigning locations to each operand. SmallVector<CCValAssign, 16> ArgLocs; - CCState ArgCCInfo(CallConv, IsVarArg, MF, DAG.getTarget(), ArgLocs, - *DAG.getContext()); + CCState ArgCCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext()); ArgCCInfo.AnalyzeCallOperands(Outs, CC_SystemZ); // We don't support GuaranteedTailCallOpt, only automatically-detected @@ -915,7 +914,8 @@ SystemZTargetLowering::LowerCall(CallLoweringInfo &CLI, RegsToPass[I].second.getValueType())); // Add a register mask operand representing the call-preserved registers. - const TargetRegisterInfo *TRI = getTargetMachine().getRegisterInfo(); + const TargetRegisterInfo *TRI = + getTargetMachine().getSubtargetImpl()->getRegisterInfo(); const uint32_t *Mask = TRI->getCallPreservedMask(CallConv); assert(Mask && "Missing call preserved mask for calling convention"); Ops.push_back(DAG.getRegisterMask(Mask)); @@ -940,8 +940,7 @@ SystemZTargetLowering::LowerCall(CallLoweringInfo &CLI, // Assign locations to each value returned by this call. SmallVector<CCValAssign, 16> RetLocs; - CCState RetCCInfo(CallConv, IsVarArg, MF, DAG.getTarget(), RetLocs, - *DAG.getContext()); + CCState RetCCInfo(CallConv, IsVarArg, MF, RetLocs, *DAG.getContext()); RetCCInfo.AnalyzeCallResult(Ins, RetCC_SystemZ); // Copy all of the result registers out of their specified physreg. @@ -972,8 +971,7 @@ SystemZTargetLowering::LowerReturn(SDValue Chain, // Assign locations to each returned value. SmallVector<CCValAssign, 16> RetLocs; - CCState RetCCInfo(CallConv, IsVarArg, MF, DAG.getTarget(), RetLocs, - *DAG.getContext()); + CCState RetCCInfo(CallConv, IsVarArg, MF, RetLocs, *DAG.getContext()); RetCCInfo.AnalyzeReturn(Outs, RetCC_SystemZ); // Quick exit for void returns @@ -1191,7 +1189,7 @@ static void adjustSubwordCmp(SelectionDAG &DAG, Comparison &C) { Load->getChain(), Load->getBasePtr(), Load->getPointerInfo(), Load->getMemoryVT(), Load->isVolatile(), Load->isNonTemporal(), - Load->getAlignment()); + Load->isInvariant(), Load->getAlignment()); // Make sure that the second operand is an i32 with the right value. if (C.Op1.getValueType() != MVT::i32 || @@ -2614,7 +2612,7 @@ MachineBasicBlock * SystemZTargetLowering::emitSelect(MachineInstr *MI, MachineBasicBlock *MBB) const { const SystemZInstrInfo *TII = static_cast<const SystemZInstrInfo *>( - MBB->getParent()->getTarget().getInstrInfo()); + MBB->getParent()->getSubtarget().getInstrInfo()); unsigned DestReg = MI->getOperand(0).getReg(); unsigned TrueReg = MI->getOperand(1).getReg(); @@ -2663,7 +2661,7 @@ SystemZTargetLowering::emitCondStore(MachineInstr *MI, unsigned StoreOpcode, unsigned STOCOpcode, bool Invert) const { const SystemZInstrInfo *TII = static_cast<const SystemZInstrInfo *>( - MBB->getParent()->getTarget().getInstrInfo()); + MBB->getParent()->getSubtarget().getInstrInfo()); unsigned SrcReg = MI->getOperand(0).getReg(); MachineOperand Base = MI->getOperand(1); @@ -2732,7 +2730,7 @@ SystemZTargetLowering::emitAtomicLoadBinary(MachineInstr *MI, bool Invert) const { MachineFunction &MF = *MBB->getParent(); const SystemZInstrInfo *TII = - static_cast<const SystemZInstrInfo *>(MF.getTarget().getInstrInfo()); + static_cast<const SystemZInstrInfo *>(MF.getSubtarget().getInstrInfo()); MachineRegisterInfo &MRI = MF.getRegInfo(); bool IsSubWord = (BitSize < 32); @@ -2802,14 +2800,10 @@ SystemZTargetLowering::emitAtomicLoadBinary(MachineInstr *MI, unsigned Tmp = MRI.createVirtualRegister(RC); BuildMI(MBB, DL, TII->get(BinOpcode), Tmp) .addReg(RotatedOldVal).addOperand(Src2); - if (BitSize < 32) + if (BitSize <= 32) // XILF with the upper BitSize bits set. BuildMI(MBB, DL, TII->get(SystemZ::XILF), RotatedNewVal) - .addReg(Tmp).addImm(uint32_t(~0 << (32 - BitSize))); - else if (BitSize == 32) - // XILF with every bit set. - BuildMI(MBB, DL, TII->get(SystemZ::XILF), RotatedNewVal) - .addReg(Tmp).addImm(~uint32_t(0)); + .addReg(Tmp).addImm(-1U << (32 - BitSize)); else { // Use LCGR and add -1 to the result, which is more compact than // an XILF, XILH pair. @@ -2856,7 +2850,7 @@ SystemZTargetLowering::emitAtomicLoadMinMax(MachineInstr *MI, unsigned BitSize) const { MachineFunction &MF = *MBB->getParent(); const SystemZInstrInfo *TII = - static_cast<const SystemZInstrInfo *>(MF.getTarget().getInstrInfo()); + static_cast<const SystemZInstrInfo *>(MF.getSubtarget().getInstrInfo()); MachineRegisterInfo &MRI = MF.getRegInfo(); bool IsSubWord = (BitSize < 32); @@ -2968,7 +2962,7 @@ SystemZTargetLowering::emitAtomicCmpSwapW(MachineInstr *MI, MachineBasicBlock *MBB) const { MachineFunction &MF = *MBB->getParent(); const SystemZInstrInfo *TII = - static_cast<const SystemZInstrInfo *>(MF.getTarget().getInstrInfo()); + static_cast<const SystemZInstrInfo *>(MF.getSubtarget().getInstrInfo()); MachineRegisterInfo &MRI = MF.getRegInfo(); // Extract the operands. Base can be a register or a frame index. @@ -3085,7 +3079,7 @@ SystemZTargetLowering::emitExt128(MachineInstr *MI, bool ClearEven, unsigned SubReg) const { MachineFunction &MF = *MBB->getParent(); const SystemZInstrInfo *TII = - static_cast<const SystemZInstrInfo *>(MF.getTarget().getInstrInfo()); + static_cast<const SystemZInstrInfo *>(MF.getSubtarget().getInstrInfo()); MachineRegisterInfo &MRI = MF.getRegInfo(); DebugLoc DL = MI->getDebugLoc(); @@ -3117,7 +3111,7 @@ SystemZTargetLowering::emitMemMemWrapper(MachineInstr *MI, unsigned Opcode) const { MachineFunction &MF = *MBB->getParent(); const SystemZInstrInfo *TII = - static_cast<const SystemZInstrInfo *>(MF.getTarget().getInstrInfo()); + static_cast<const SystemZInstrInfo *>(MF.getSubtarget().getInstrInfo()); MachineRegisterInfo &MRI = MF.getRegInfo(); DebugLoc DL = MI->getDebugLoc(); @@ -3287,7 +3281,7 @@ SystemZTargetLowering::emitStringWrapper(MachineInstr *MI, unsigned Opcode) const { MachineFunction &MF = *MBB->getParent(); const SystemZInstrInfo *TII = - static_cast<const SystemZInstrInfo *>(MF.getTarget().getInstrInfo()); + static_cast<const SystemZInstrInfo *>(MF.getSubtarget().getInstrInfo()); MachineRegisterInfo &MRI = MF.getRegInfo(); DebugLoc DL = MI->getDebugLoc(); diff --git a/lib/Target/SystemZ/SystemZISelLowering.h b/lib/Target/SystemZ/SystemZISelLowering.h index e21b050..887c236 100644 --- a/lib/Target/SystemZ/SystemZISelLowering.h +++ b/lib/Target/SystemZ/SystemZISelLowering.h @@ -12,8 +12,8 @@ // //===----------------------------------------------------------------------===// -#ifndef LLVM_TARGET_SystemZ_ISELLOWERING_H -#define LLVM_TARGET_SystemZ_ISELLOWERING_H +#ifndef LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZISELLOWERING_H +#define LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZISELLOWERING_H #include "SystemZ.h" #include "llvm/CodeGen/MachineBasicBlock.h" @@ -208,8 +208,9 @@ public: bool isFMAFasterThanFMulAndFAdd(EVT VT) const override; bool isFPImmLegal(const APFloat &Imm, EVT VT) const override; bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const override; - bool allowsUnalignedMemoryAccesses(EVT VT, unsigned AS, - bool *Fast) const override; + bool allowsMisalignedMemoryAccesses(EVT VT, unsigned AS, + unsigned Align, + bool *Fast) const override; bool isTruncateFree(Type *, Type *) const override; bool isTruncateFree(EVT, EVT) const override; const char *getTargetNodeName(unsigned Opcode) const override; @@ -321,4 +322,4 @@ private: }; } // end namespace llvm -#endif // LLVM_TARGET_SystemZ_ISELLOWERING_H +#endif diff --git a/lib/Target/SystemZ/SystemZInstrBuilder.h b/lib/Target/SystemZ/SystemZInstrBuilder.h index 84196e9..464f79a 100644 --- a/lib/Target/SystemZ/SystemZInstrBuilder.h +++ b/lib/Target/SystemZ/SystemZInstrBuilder.h @@ -12,8 +12,8 @@ // //===----------------------------------------------------------------------===// -#ifndef SYSTEMZINSTRBUILDER_H -#define SYSTEMZINSTRBUILDER_H +#ifndef LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZINSTRBUILDER_H +#define LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZINSTRBUILDER_H #include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineInstrBuilder.h" diff --git a/lib/Target/SystemZ/SystemZInstrInfo.cpp b/lib/Target/SystemZ/SystemZInstrInfo.cpp index f58ab47..8ff9553 100644 --- a/lib/Target/SystemZ/SystemZInstrInfo.cpp +++ b/lib/Target/SystemZ/SystemZInstrInfo.cpp @@ -633,7 +633,7 @@ struct LogicOp { LogicOp(unsigned regSize, unsigned immLSB, unsigned immSize) : RegSize(regSize), ImmLSB(immLSB), ImmSize(immSize) {} - operator bool() const { return RegSize; } + LLVM_EXPLICIT operator bool() const { return RegSize; } unsigned RegSize, ImmLSB, ImmSize; }; diff --git a/lib/Target/SystemZ/SystemZInstrInfo.h b/lib/Target/SystemZ/SystemZInstrInfo.h index 83009cb..d2e3f54 100644 --- a/lib/Target/SystemZ/SystemZInstrInfo.h +++ b/lib/Target/SystemZ/SystemZInstrInfo.h @@ -11,8 +11,8 @@ // //===----------------------------------------------------------------------===// -#ifndef LLVM_TARGET_SYSTEMZINSTRINFO_H -#define LLVM_TARGET_SYSTEMZINSTRINFO_H +#ifndef LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZINSTRINFO_H +#define LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZINSTRINFO_H #include "SystemZ.h" #include "SystemZRegisterInfo.h" diff --git a/lib/Target/SystemZ/SystemZLongBranch.cpp b/lib/Target/SystemZ/SystemZLongBranch.cpp index 8081334..8dab44e 100644 --- a/lib/Target/SystemZ/SystemZLongBranch.cpp +++ b/lib/Target/SystemZ/SystemZLongBranch.cpp @@ -448,7 +448,7 @@ void SystemZLongBranch::relaxBranches() { } bool SystemZLongBranch::runOnMachineFunction(MachineFunction &F) { - TII = static_cast<const SystemZInstrInfo *>(F.getTarget().getInstrInfo()); + TII = static_cast<const SystemZInstrInfo *>(F.getSubtarget().getInstrInfo()); MF = &F; uint64_t Size = initMBBInfo(); if (Size <= MaxForwardRange || !mustRelaxABranch()) diff --git a/lib/Target/SystemZ/SystemZMCInstLower.h b/lib/Target/SystemZ/SystemZMCInstLower.h index 90447ff..7173cfa 100644 --- a/lib/Target/SystemZ/SystemZMCInstLower.h +++ b/lib/Target/SystemZ/SystemZMCInstLower.h @@ -7,8 +7,8 @@ // //===----------------------------------------------------------------------===// -#ifndef LLVM_SYSTEMZMCINSTLOWER_H -#define LLVM_SYSTEMZMCINSTLOWER_H +#ifndef LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZMCINSTLOWER_H +#define LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZMCINSTLOWER_H #include "llvm/MC/MCExpr.h" #include "llvm/Support/Compiler.h" diff --git a/lib/Target/SystemZ/SystemZMachineFunctionInfo.h b/lib/Target/SystemZ/SystemZMachineFunctionInfo.h index 50865f1..92c2ce7 100644 --- a/lib/Target/SystemZ/SystemZMachineFunctionInfo.h +++ b/lib/Target/SystemZ/SystemZMachineFunctionInfo.h @@ -7,8 +7,8 @@ // //===----------------------------------------------------------------------===// -#ifndef SYSTEMZMACHINEFUNCTIONINFO_H -#define SYSTEMZMACHINEFUNCTIONINFO_H +#ifndef LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZMACHINEFUNCTIONINFO_H +#define LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZMACHINEFUNCTIONINFO_H #include "llvm/CodeGen/MachineFunction.h" diff --git a/lib/Target/SystemZ/SystemZRegisterInfo.cpp b/lib/Target/SystemZ/SystemZRegisterInfo.cpp index f03bcc4..64f5eeb 100644 --- a/lib/Target/SystemZ/SystemZRegisterInfo.cpp +++ b/lib/Target/SystemZ/SystemZRegisterInfo.cpp @@ -35,7 +35,7 @@ SystemZRegisterInfo::getCallPreservedMask(CallingConv::ID CC) const { BitVector SystemZRegisterInfo::getReservedRegs(const MachineFunction &MF) const { BitVector Reserved(getNumRegs()); - const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering(); + const TargetFrameLowering *TFI = MF.getSubtarget().getFrameLowering(); if (TFI->hasFP(MF)) { // R11D is the frame pointer. Reserve all aliases. @@ -62,8 +62,8 @@ SystemZRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator MI, MachineBasicBlock &MBB = *MI->getParent(); MachineFunction &MF = *MBB.getParent(); auto *TII = - static_cast<const SystemZInstrInfo *>(MF.getTarget().getInstrInfo()); - const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering(); + static_cast<const SystemZInstrInfo *>(MF.getSubtarget().getInstrInfo()); + const TargetFrameLowering *TFI = MF.getSubtarget().getFrameLowering(); DebugLoc DL = MI->getDebugLoc(); // Decompose the frame index into a base and offset. @@ -134,6 +134,6 @@ SystemZRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator MI, unsigned SystemZRegisterInfo::getFrameRegister(const MachineFunction &MF) const { - const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering(); + const TargetFrameLowering *TFI = MF.getSubtarget().getFrameLowering(); return TFI->hasFP(MF) ? SystemZ::R11D : SystemZ::R15D; } diff --git a/lib/Target/SystemZ/SystemZRegisterInfo.h b/lib/Target/SystemZ/SystemZRegisterInfo.h index 9bffa46..212fe91 100644 --- a/lib/Target/SystemZ/SystemZRegisterInfo.h +++ b/lib/Target/SystemZ/SystemZRegisterInfo.h @@ -7,8 +7,8 @@ // //===----------------------------------------------------------------------===// -#ifndef SystemZREGISTERINFO_H -#define SystemZREGISTERINFO_H +#ifndef LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZREGISTERINFO_H +#define LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZREGISTERINFO_H #include "SystemZ.h" #include "llvm/Target/TargetRegisterInfo.h" diff --git a/lib/Target/SystemZ/SystemZSelectionDAGInfo.h b/lib/Target/SystemZ/SystemZSelectionDAGInfo.h index e9de146..a257d6b 100644 --- a/lib/Target/SystemZ/SystemZSelectionDAGInfo.h +++ b/lib/Target/SystemZ/SystemZSelectionDAGInfo.h @@ -11,8 +11,8 @@ // //===----------------------------------------------------------------------===// -#ifndef SYSTEMZSELECTIONDAGINFO_H -#define SYSTEMZSELECTIONDAGINFO_H +#ifndef LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZSELECTIONDAGINFO_H +#define LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZSELECTIONDAGINFO_H #include "llvm/Target/TargetSelectionDAGInfo.h" diff --git a/lib/Target/SystemZ/SystemZShortenInst.cpp b/lib/Target/SystemZ/SystemZShortenInst.cpp index aad899c..ec7a8c4 100644 --- a/lib/Target/SystemZ/SystemZShortenInst.cpp +++ b/lib/Target/SystemZ/SystemZShortenInst.cpp @@ -150,7 +150,7 @@ bool SystemZShortenInst::processBlock(MachineBasicBlock &MBB) { } bool SystemZShortenInst::runOnMachineFunction(MachineFunction &F) { - TII = static_cast<const SystemZInstrInfo *>(F.getTarget().getInstrInfo()); + TII = static_cast<const SystemZInstrInfo *>(F.getSubtarget().getInstrInfo()); bool Changed = false; for (auto &MBB : F) diff --git a/lib/Target/SystemZ/SystemZSubtarget.h b/lib/Target/SystemZ/SystemZSubtarget.h index 4e8c710..f881552 100644 --- a/lib/Target/SystemZ/SystemZSubtarget.h +++ b/lib/Target/SystemZ/SystemZSubtarget.h @@ -11,8 +11,8 @@ // //===----------------------------------------------------------------------===// -#ifndef SYSTEMZSUBTARGET_H -#define SYSTEMZSUBTARGET_H +#ifndef LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZSUBTARGET_H +#define LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZSUBTARGET_H #include "SystemZFrameLowering.h" #include "SystemZISelLowering.h" @@ -55,14 +55,20 @@ public: SystemZSubtarget(const std::string &TT, const std::string &CPU, const std::string &FS, const TargetMachine &TM); - const TargetFrameLowering *getFrameLowering() const { return &FrameLowering; } - const SystemZInstrInfo *getInstrInfo() const { return &InstrInfo; } - const DataLayout *getDataLayout() const { return &DL; } - const SystemZRegisterInfo *getRegisterInfo() const { + const TargetFrameLowering *getFrameLowering() const override { + return &FrameLowering; + } + const SystemZInstrInfo *getInstrInfo() const override { return &InstrInfo; } + const DataLayout *getDataLayout() const override { return &DL; } + const SystemZRegisterInfo *getRegisterInfo() const override { return &InstrInfo.getRegisterInfo(); } - const SystemZTargetLowering *getTargetLowering() const { return &TLInfo; } - const TargetSelectionDAGInfo *getSelectionDAGInfo() const { return &TSInfo; } + const SystemZTargetLowering *getTargetLowering() const override { + return &TLInfo; + } + const TargetSelectionDAGInfo *getSelectionDAGInfo() const override { + return &TSInfo; + } // This is important for reducing register pressure in vector code. bool useAA() const override { return true; } diff --git a/lib/Target/SystemZ/SystemZTargetMachine.cpp b/lib/Target/SystemZ/SystemZTargetMachine.cpp index 0122e99..d7c432e 100644 --- a/lib/Target/SystemZ/SystemZTargetMachine.cpp +++ b/lib/Target/SystemZ/SystemZTargetMachine.cpp @@ -11,6 +11,7 @@ #include "llvm/CodeGen/Passes.h" #include "llvm/Support/TargetRegistry.h" #include "llvm/Transforms/Scalar.h" +#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" using namespace llvm; @@ -25,10 +26,13 @@ SystemZTargetMachine::SystemZTargetMachine(const Target &T, StringRef TT, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), + TLOF(make_unique<TargetLoweringObjectFileELF>()), Subtarget(TT, CPU, FS, *this) { initAsmInfo(); } +SystemZTargetMachine::~SystemZTargetMachine() {} + namespace { /// SystemZ Code Generator Pass Configuration Options. class SystemZPassConfig : public TargetPassConfig { @@ -49,7 +53,6 @@ public: void SystemZPassConfig::addIRPasses() { TargetPassConfig::addIRPasses(); - addPass(createPartiallyInlineLibCallsPass()); } bool SystemZPassConfig::addInstSelector() { diff --git a/lib/Target/SystemZ/SystemZTargetMachine.h b/lib/Target/SystemZ/SystemZTargetMachine.h index ded07e9..9fae5e4 100644 --- a/lib/Target/SystemZ/SystemZTargetMachine.h +++ b/lib/Target/SystemZ/SystemZTargetMachine.h @@ -12,8 +12,8 @@ //===----------------------------------------------------------------------===// -#ifndef SYSTEMZTARGETMACHINE_H -#define SYSTEMZTARGETMACHINE_H +#ifndef LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZTARGETMACHINE_H +#define LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZTARGETMACHINE_H #include "SystemZSubtarget.h" #include "llvm/Target/TargetMachine.h" @@ -23,6 +23,7 @@ namespace llvm { class TargetFrameLowering; class SystemZTargetMachine : public LLVMTargetMachine { + std::unique_ptr<TargetLoweringObjectFile> TLOF; SystemZSubtarget Subtarget; public: @@ -30,32 +31,17 @@ public: StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL); + ~SystemZTargetMachine() override; // Override TargetMachine. - const TargetFrameLowering *getFrameLowering() const override { - return getSubtargetImpl()->getFrameLowering(); - } - const SystemZInstrInfo *getInstrInfo() const override { - return getSubtargetImpl()->getInstrInfo(); - } const SystemZSubtarget *getSubtargetImpl() const override { return &Subtarget; } - const DataLayout *getDataLayout() const override { - return getSubtargetImpl()->getDataLayout(); - } - const SystemZRegisterInfo *getRegisterInfo() const override { - return getSubtargetImpl()->getRegisterInfo(); - } - const SystemZTargetLowering *getTargetLowering() const override { - return getSubtargetImpl()->getTargetLowering(); - } - const TargetSelectionDAGInfo *getSelectionDAGInfo() const override { - return getSubtargetImpl()->getSelectionDAGInfo(); - } - // Override LLVMTargetMachine TargetPassConfig *createPassConfig(PassManagerBase &PM) override; + TargetLoweringObjectFile *getObjFileLowering() const override { + return TLOF.get(); + } }; } // end namespace llvm |