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-rw-r--r--lib/Target/X86/AsmPrinter/X86ATTInstPrinter.cpp30
-rw-r--r--lib/Target/X86/AsmPrinter/X86ATTInstPrinter.h64
-rw-r--r--lib/Target/X86/AsmPrinter/X86IntelInstPrinter.cpp30
-rw-r--r--lib/Target/X86/AsmPrinter/X86IntelInstPrinter.h65
4 files changed, 99 insertions, 90 deletions
diff --git a/lib/Target/X86/AsmPrinter/X86ATTInstPrinter.cpp b/lib/Target/X86/AsmPrinter/X86ATTInstPrinter.cpp
index 734a545..93f3dc1 100644
--- a/lib/Target/X86/AsmPrinter/X86ATTInstPrinter.cpp
+++ b/lib/Target/X86/AsmPrinter/X86ATTInstPrinter.cpp
@@ -29,15 +29,18 @@ using namespace llvm;
#include "X86GenAsmWriter.inc"
#undef MachineInstr
-void X86ATTInstPrinter::printInst(const MCInst *MI) { printInstruction(MI); }
+void X86ATTInstPrinter::printInst(const MCInst *MI) {
+ printInstruction(MI, O);
+}
StringRef X86ATTInstPrinter::getOpcodeName(unsigned Opcode) const {
return getInstructionName(Opcode);
}
-void X86ATTInstPrinter::printSSECC(const MCInst *MI, unsigned Op) {
+void X86ATTInstPrinter::printSSECC(const MCInst *MI, unsigned Op,
+ raw_ostream &O) {
switch (MI->getOperand(Op).getImm()) {
- default: llvm_unreachable("Invalid ssecc argument!");
+ default: assert(0 && "Invalid ssecc argument!");
case 0: O << "eq"; break;
case 1: O << "lt"; break;
case 2: O << "le"; break;
@@ -53,7 +56,8 @@ void X86ATTInstPrinter::printSSECC(const MCInst *MI, unsigned Op) {
/// being encoded as a pc-relative value (e.g. for jumps and calls). These
/// print slightly differently than normal immediates. For example, a $ is not
/// emitted.
-void X86ATTInstPrinter::print_pcrel_imm(const MCInst *MI, unsigned OpNo) {
+void X86ATTInstPrinter::print_pcrel_imm(const MCInst *MI, unsigned OpNo,
+ raw_ostream &O) {
const MCOperand &Op = MI->getOperand(OpNo);
if (Op.isImm())
// Print this as a signed 32-bit value.
@@ -64,8 +68,8 @@ void X86ATTInstPrinter::print_pcrel_imm(const MCInst *MI, unsigned OpNo) {
}
}
-void X86ATTInstPrinter::printOperand(const MCInst *MI, unsigned OpNo) {
-
+void X86ATTInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
+ raw_ostream &O) {
const MCOperand &Op = MI->getOperand(OpNo);
if (Op.isReg()) {
O << '%' << getRegisterName(Op.getReg());
@@ -81,7 +85,8 @@ void X86ATTInstPrinter::printOperand(const MCInst *MI, unsigned OpNo) {
}
}
-void X86ATTInstPrinter::printLeaMemReference(const MCInst *MI, unsigned Op) {
+void X86ATTInstPrinter::printLeaMemReference(const MCInst *MI, unsigned Op,
+ raw_ostream &O) {
const MCOperand &BaseReg = MI->getOperand(Op);
const MCOperand &IndexReg = MI->getOperand(Op+2);
const MCOperand &DispSpec = MI->getOperand(Op+3);
@@ -98,11 +103,11 @@ void X86ATTInstPrinter::printLeaMemReference(const MCInst *MI, unsigned Op) {
if (IndexReg.getReg() || BaseReg.getReg()) {
O << '(';
if (BaseReg.getReg())
- printOperand(MI, Op);
+ printOperand(MI, Op, O);
if (IndexReg.getReg()) {
O << ',';
- printOperand(MI, Op+2);
+ printOperand(MI, Op+2, O);
unsigned ScaleVal = MI->getOperand(Op+1).getImm();
if (ScaleVal != 1)
O << ',' << ScaleVal;
@@ -111,11 +116,12 @@ void X86ATTInstPrinter::printLeaMemReference(const MCInst *MI, unsigned Op) {
}
}
-void X86ATTInstPrinter::printMemReference(const MCInst *MI, unsigned Op) {
+void X86ATTInstPrinter::printMemReference(const MCInst *MI, unsigned Op,
+ raw_ostream &O) {
// If this has a segment register, print it.
if (MI->getOperand(Op+4).getReg()) {
- printOperand(MI, Op+4);
+ printOperand(MI, Op+4, O);
O << ':';
}
- printLeaMemReference(MI, Op);
+ printLeaMemReference(MI, Op, O);
}
diff --git a/lib/Target/X86/AsmPrinter/X86ATTInstPrinter.h b/lib/Target/X86/AsmPrinter/X86ATTInstPrinter.h
index d109a07..3450a05 100644
--- a/lib/Target/X86/AsmPrinter/X86ATTInstPrinter.h
+++ b/lib/Target/X86/AsmPrinter/X86ATTInstPrinter.h
@@ -29,55 +29,55 @@ public:
virtual StringRef getOpcodeName(unsigned Opcode) const;
// Autogenerated by tblgen.
- void printInstruction(const MCInst *MI);
+ void printInstruction(const MCInst *MI, raw_ostream &OS);
static const char *getRegisterName(unsigned RegNo);
static const char *getInstructionName(unsigned Opcode);
- void printOperand(const MCInst *MI, unsigned OpNo);
- void printMemReference(const MCInst *MI, unsigned Op);
- void printLeaMemReference(const MCInst *MI, unsigned Op);
- void printSSECC(const MCInst *MI, unsigned Op);
- void print_pcrel_imm(const MCInst *MI, unsigned OpNo);
+ void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &OS);
+ void printMemReference(const MCInst *MI, unsigned Op, raw_ostream &OS);
+ void printLeaMemReference(const MCInst *MI, unsigned Op, raw_ostream &OS);
+ void printSSECC(const MCInst *MI, unsigned Op, raw_ostream &OS);
+ void print_pcrel_imm(const MCInst *MI, unsigned OpNo, raw_ostream &OS);
- void printopaquemem(const MCInst *MI, unsigned OpNo) {
- printMemReference(MI, OpNo);
+ void printopaquemem(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
+ printMemReference(MI, OpNo, O);
}
- void printi8mem(const MCInst *MI, unsigned OpNo) {
- printMemReference(MI, OpNo);
+ void printi8mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
+ printMemReference(MI, OpNo, O);
}
- void printi16mem(const MCInst *MI, unsigned OpNo) {
- printMemReference(MI, OpNo);
+ void printi16mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
+ printMemReference(MI, OpNo, O);
}
- void printi32mem(const MCInst *MI, unsigned OpNo) {
- printMemReference(MI, OpNo);
+ void printi32mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
+ printMemReference(MI, OpNo, O);
}
- void printi64mem(const MCInst *MI, unsigned OpNo) {
- printMemReference(MI, OpNo);
+ void printi64mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
+ printMemReference(MI, OpNo, O);
}
- void printi128mem(const MCInst *MI, unsigned OpNo) {
- printMemReference(MI, OpNo);
+ void printi128mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
+ printMemReference(MI, OpNo, O);
}
- void printf32mem(const MCInst *MI, unsigned OpNo) {
- printMemReference(MI, OpNo);
+ void printf32mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
+ printMemReference(MI, OpNo, O);
}
- void printf64mem(const MCInst *MI, unsigned OpNo) {
- printMemReference(MI, OpNo);
+ void printf64mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
+ printMemReference(MI, OpNo, O);
}
- void printf80mem(const MCInst *MI, unsigned OpNo) {
- printMemReference(MI, OpNo);
+ void printf80mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
+ printMemReference(MI, OpNo, O);
}
- void printf128mem(const MCInst *MI, unsigned OpNo) {
- printMemReference(MI, OpNo);
+ void printf128mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
+ printMemReference(MI, OpNo, O);
}
- void printlea32mem(const MCInst *MI, unsigned OpNo) {
- printLeaMemReference(MI, OpNo);
+ void printlea32mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
+ printLeaMemReference(MI, OpNo, O);
}
- void printlea64mem(const MCInst *MI, unsigned OpNo) {
- printLeaMemReference(MI, OpNo);
+ void printlea64mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
+ printLeaMemReference(MI, OpNo, O);
}
- void printlea64_32mem(const MCInst *MI, unsigned OpNo) {
- printLeaMemReference(MI, OpNo);
+ void printlea64_32mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
+ printLeaMemReference(MI, OpNo, O);
}
};
diff --git a/lib/Target/X86/AsmPrinter/X86IntelInstPrinter.cpp b/lib/Target/X86/AsmPrinter/X86IntelInstPrinter.cpp
index 610beb5..e12b148 100644
--- a/lib/Target/X86/AsmPrinter/X86IntelInstPrinter.cpp
+++ b/lib/Target/X86/AsmPrinter/X86IntelInstPrinter.cpp
@@ -28,14 +28,17 @@ using namespace llvm;
#include "X86GenAsmWriter1.inc"
#undef MachineInstr
-void X86IntelInstPrinter::printInst(const MCInst *MI) { printInstruction(MI); }
+void X86IntelInstPrinter::printInst(const MCInst *MI) {
+ printInstruction(MI, O);
+}
StringRef X86IntelInstPrinter::getOpcodeName(unsigned Opcode) const {
return getInstructionName(Opcode);
}
-void X86IntelInstPrinter::printSSECC(const MCInst *MI, unsigned Op) {
+void X86IntelInstPrinter::printSSECC(const MCInst *MI, unsigned Op,
+ raw_ostream &O) {
switch (MI->getOperand(Op).getImm()) {
- default: llvm_unreachable("Invalid ssecc argument!");
+ default: assert(0 && "Invalid ssecc argument!");
case 0: O << "eq"; break;
case 1: O << "lt"; break;
case 2: O << "le"; break;
@@ -49,7 +52,8 @@ void X86IntelInstPrinter::printSSECC(const MCInst *MI, unsigned Op) {
/// print_pcrel_imm - This is used to print an immediate value that ends up
/// being encoded as a pc-relative value.
-void X86IntelInstPrinter::print_pcrel_imm(const MCInst *MI, unsigned OpNo) {
+void X86IntelInstPrinter::print_pcrel_imm(const MCInst *MI, unsigned OpNo,
+ raw_ostream &O) {
const MCOperand &Op = MI->getOperand(OpNo);
if (Op.isImm())
O << Op.getImm();
@@ -65,9 +69,7 @@ static void PrintRegName(raw_ostream &O, StringRef RegName) {
}
void X86IntelInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
- const char *Modifier) {
- assert(Modifier == 0 && "Modifiers should not be used");
-
+ raw_ostream &O) {
const MCOperand &Op = MI->getOperand(OpNo);
if (Op.isReg()) {
PrintRegName(O, getRegisterName(Op.getReg()));
@@ -79,7 +81,8 @@ void X86IntelInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
}
}
-void X86IntelInstPrinter::printLeaMemReference(const MCInst *MI, unsigned Op) {
+void X86IntelInstPrinter::printLeaMemReference(const MCInst *MI, unsigned Op,
+ raw_ostream &O) {
const MCOperand &BaseReg = MI->getOperand(Op);
unsigned ScaleVal = MI->getOperand(Op+1).getImm();
const MCOperand &IndexReg = MI->getOperand(Op+2);
@@ -89,7 +92,7 @@ void X86IntelInstPrinter::printLeaMemReference(const MCInst *MI, unsigned Op) {
bool NeedPlus = false;
if (BaseReg.getReg()) {
- printOperand(MI, Op);
+ printOperand(MI, Op, O);
NeedPlus = true;
}
@@ -97,7 +100,7 @@ void X86IntelInstPrinter::printLeaMemReference(const MCInst *MI, unsigned Op) {
if (NeedPlus) O << " + ";
if (ScaleVal != 1)
O << ScaleVal << '*';
- printOperand(MI, Op+2);
+ printOperand(MI, Op+2, O);
NeedPlus = true;
}
@@ -124,11 +127,12 @@ void X86IntelInstPrinter::printLeaMemReference(const MCInst *MI, unsigned Op) {
O << ']';
}
-void X86IntelInstPrinter::printMemReference(const MCInst *MI, unsigned Op) {
+void X86IntelInstPrinter::printMemReference(const MCInst *MI, unsigned Op,
+ raw_ostream &O) {
// If this has a segment register, print it.
if (MI->getOperand(Op+4).getReg()) {
- printOperand(MI, Op+4);
+ printOperand(MI, Op+4, O);
O << ':';
}
- printLeaMemReference(MI, Op);
+ printLeaMemReference(MI, Op, O);
}
diff --git a/lib/Target/X86/AsmPrinter/X86IntelInstPrinter.h b/lib/Target/X86/AsmPrinter/X86IntelInstPrinter.h
index 545bf84..c2d0274 100644
--- a/lib/Target/X86/AsmPrinter/X86IntelInstPrinter.h
+++ b/lib/Target/X86/AsmPrinter/X86IntelInstPrinter.h
@@ -29,70 +29,69 @@ public:
virtual StringRef getOpcodeName(unsigned Opcode) const;
// Autogenerated by tblgen.
- void printInstruction(const MCInst *MI);
+ void printInstruction(const MCInst *MI, raw_ostream &O);
static const char *getRegisterName(unsigned RegNo);
static const char *getInstructionName(unsigned Opcode);
- void printOperand(const MCInst *MI, unsigned OpNo,
- const char *Modifier = 0);
- void printMemReference(const MCInst *MI, unsigned Op);
- void printLeaMemReference(const MCInst *MI, unsigned Op);
- void printSSECC(const MCInst *MI, unsigned Op);
- void print_pcrel_imm(const MCInst *MI, unsigned OpNo);
+ void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
+ void printMemReference(const MCInst *MI, unsigned Op, raw_ostream &O);
+ void printLeaMemReference(const MCInst *MI, unsigned Op, raw_ostream &O);
+ void printSSECC(const MCInst *MI, unsigned Op, raw_ostream &O);
+ void print_pcrel_imm(const MCInst *MI, unsigned OpNo, raw_ostream &O);
- void printopaquemem(const MCInst *MI, unsigned OpNo) {
+ void printopaquemem(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
O << "OPAQUE PTR ";
- printMemReference(MI, OpNo);
+ printMemReference(MI, OpNo, O);
}
- void printi8mem(const MCInst *MI, unsigned OpNo) {
+ void printi8mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
O << "BYTE PTR ";
- printMemReference(MI, OpNo);
+ printMemReference(MI, OpNo, O);
}
- void printi16mem(const MCInst *MI, unsigned OpNo) {
+ void printi16mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
O << "WORD PTR ";
- printMemReference(MI, OpNo);
+ printMemReference(MI, OpNo, O);
}
- void printi32mem(const MCInst *MI, unsigned OpNo) {
+ void printi32mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
O << "DWORD PTR ";
- printMemReference(MI, OpNo);
+ printMemReference(MI, OpNo, O);
}
- void printi64mem(const MCInst *MI, unsigned OpNo) {
+ void printi64mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
O << "QWORD PTR ";
- printMemReference(MI, OpNo);
+ printMemReference(MI, OpNo, O);
}
- void printi128mem(const MCInst *MI, unsigned OpNo) {
+ void printi128mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
O << "XMMWORD PTR ";
- printMemReference(MI, OpNo);
+ printMemReference(MI, OpNo, O);
}
- void printf32mem(const MCInst *MI, unsigned OpNo) {
+ void printf32mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
O << "DWORD PTR ";
- printMemReference(MI, OpNo);
+ printMemReference(MI, OpNo, O);
}
- void printf64mem(const MCInst *MI, unsigned OpNo) {
+ void printf64mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
O << "QWORD PTR ";
- printMemReference(MI, OpNo);
+ printMemReference(MI, OpNo, O);
}
- void printf80mem(const MCInst *MI, unsigned OpNo) {
+ void printf80mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
O << "XWORD PTR ";
- printMemReference(MI, OpNo);
+ printMemReference(MI, OpNo, O);
}
- void printf128mem(const MCInst *MI, unsigned OpNo) {
+ void printf128mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
O << "XMMWORD PTR ";
- printMemReference(MI, OpNo);
+ printMemReference(MI, OpNo, O);
}
- void printlea32mem(const MCInst *MI, unsigned OpNo) {
+ void printlea32mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
O << "DWORD PTR ";
- printLeaMemReference(MI, OpNo);
+ printLeaMemReference(MI, OpNo, O);
}
- void printlea64mem(const MCInst *MI, unsigned OpNo) {
+ void printlea64mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
O << "QWORD PTR ";
- printLeaMemReference(MI, OpNo);
+ printLeaMemReference(MI, OpNo, O);
}
- void printlea64_32mem(const MCInst *MI, unsigned OpNo) {
+ void printlea64_32mem(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
O << "QWORD PTR ";
- printLeaMemReference(MI, OpNo);
+ printLeaMemReference(MI, OpNo, O);
}
};
generated by cgit v1.1 at 2025-06-01 11:53:51 +0000