diff options
Diffstat (limited to 'lib/Target/X86/X86InstrInfo.cpp')
| -rw-r--r-- | lib/Target/X86/X86InstrInfo.cpp | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp index 81149b7..7bbab38 100644 --- a/lib/Target/X86/X86InstrInfo.cpp +++ b/lib/Target/X86/X86InstrInfo.cpp @@ -775,6 +775,14 @@ X86InstrInfo::X86InstrInfo(X86TargetMachine &tm) { X86::PMAXUBrr, X86::PMAXUBrm, TB_ALIGN_16 }, { X86::PMINSWrr, X86::PMINSWrm, TB_ALIGN_16 }, { X86::PMINUBrr, X86::PMINUBrm, TB_ALIGN_16 }, + { X86::PMINSBrr, X86::PMINSBrm, TB_ALIGN_16 }, + { X86::PMINSDrr, X86::PMINSDrm, TB_ALIGN_16 }, + { X86::PMINUDrr, X86::PMINUDrm, TB_ALIGN_16 }, + { X86::PMINUWrr, X86::PMINUWrm, TB_ALIGN_16 }, + { X86::PMAXSBrr, X86::PMAXSBrm, TB_ALIGN_16 }, + { X86::PMAXSDrr, X86::PMAXSDrm, TB_ALIGN_16 }, + { X86::PMAXUDrr, X86::PMAXUDrm, TB_ALIGN_16 }, + { X86::PMAXUWrr, X86::PMAXUWrm, TB_ALIGN_16 }, { X86::PMULDQrr, X86::PMULDQrm, TB_ALIGN_16 }, { X86::PMULHRSWrr128, X86::PMULHRSWrm128, TB_ALIGN_16 }, { X86::PMULHUWrr, X86::PMULHUWrm, TB_ALIGN_16 }, @@ -951,6 +959,14 @@ X86InstrInfo::X86InstrInfo(X86TargetMachine &tm) { X86::VPMAXUBrr, X86::VPMAXUBrm, TB_ALIGN_16 }, { X86::VPMINSWrr, X86::VPMINSWrm, TB_ALIGN_16 }, { X86::VPMINUBrr, X86::VPMINUBrm, TB_ALIGN_16 }, + { X86::VPMINSBrr, X86::VPMINSBrm, TB_ALIGN_16 }, + { X86::VPMINSDrr, X86::VPMINSDrm, TB_ALIGN_16 }, + { X86::VPMINUDrr, X86::VPMINUDrm, TB_ALIGN_16 }, + { X86::VPMINUWrr, X86::VPMINUWrm, TB_ALIGN_16 }, + { X86::VPMAXSBrr, X86::VPMAXSBrm, TB_ALIGN_16 }, + { X86::VPMAXSDrr, X86::VPMAXSDrm, TB_ALIGN_16 }, + { X86::VPMAXUDrr, X86::VPMAXUDrm, TB_ALIGN_16 }, + { X86::VPMAXUWrr, X86::VPMAXUWrm, TB_ALIGN_16 }, { X86::VPMULDQrr, X86::VPMULDQrm, TB_ALIGN_16 }, { X86::VPMULHRSWrr128, X86::VPMULHRSWrm128, TB_ALIGN_16 }, { X86::VPMULHUWrr, X86::VPMULHUWrm, TB_ALIGN_16 }, @@ -1092,6 +1108,14 @@ X86InstrInfo::X86InstrInfo(X86TargetMachine &tm) { X86::VPMAXUBYrr, X86::VPMAXUBYrm, TB_ALIGN_32 }, { X86::VPMINSWYrr, X86::VPMINSWYrm, TB_ALIGN_32 }, { X86::VPMINUBYrr, X86::VPMINUBYrm, TB_ALIGN_32 }, + { X86::VPMINSBYrr, X86::VPMINSBYrm, TB_ALIGN_32 }, + { X86::VPMINSDYrr, X86::VPMINSDYrm, TB_ALIGN_32 }, + { X86::VPMINUDYrr, X86::VPMINUDYrm, TB_ALIGN_32 }, + { X86::VPMINUWYrr, X86::VPMINUWYrm, TB_ALIGN_32 }, + { X86::VPMAXSBYrr, X86::VPMAXSBYrm, TB_ALIGN_32 }, + { X86::VPMAXSDYrr, X86::VPMAXSDYrm, TB_ALIGN_32 }, + { X86::VPMAXUDYrr, X86::VPMAXUDYrm, TB_ALIGN_32 }, + { X86::VPMAXUWYrr, X86::VPMAXUWYrm, TB_ALIGN_32 }, { X86::VMPSADBWYrri, X86::VMPSADBWYrmi, TB_ALIGN_32 }, { X86::VPMULDQYrr, X86::VPMULDQYrm, TB_ALIGN_32 }, { X86::VPMULHRSWrr256, X86::VPMULHRSWrm256, TB_ALIGN_32 }, |