diff options
Diffstat (limited to 'lib/Target')
| -rw-r--r-- | lib/Target/PowerPC/PPCInstrInfo.cpp | 12 | ||||
| -rw-r--r-- | lib/Target/PowerPC/PPCTargetMachine.cpp | 9 |
2 files changed, 17 insertions, 4 deletions
diff --git a/lib/Target/PowerPC/PPCInstrInfo.cpp b/lib/Target/PowerPC/PPCInstrInfo.cpp index d652282..8b868e6 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.cpp +++ b/lib/Target/PowerPC/PPCInstrInfo.cpp @@ -40,6 +40,10 @@ extern cl::opt<bool> DisablePPC64RS; using namespace llvm; +static cl:: +opt<bool> EnableCTRLoopAnal("enable-ppc-ctrloop-analysis", cl::Hidden, + cl::desc("Enable analysis for CTR loops (experimental)")); + PPCInstrInfo::PPCInstrInfo(PPCTargetMachine &tm) : PPCGenInstrInfo(PPC::ADJCALLSTACKDOWN, PPC::ADJCALLSTACKUP), TM(tm), RI(*TM.getSubtargetImpl(), *this) {} @@ -229,6 +233,8 @@ bool PPCInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB, LastInst->getOpcode() == PPC::BDNZ) { if (!LastInst->getOperand(0).isMBB()) return true; + if (!EnableCTRLoopAnal) + return true; TBB = LastInst->getOperand(0).getMBB(); Cond.push_back(MachineOperand::CreateImm(1)); Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, @@ -238,6 +244,8 @@ bool PPCInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB, LastInst->getOpcode() == PPC::BDZ) { if (!LastInst->getOperand(0).isMBB()) return true; + if (!EnableCTRLoopAnal) + return true; TBB = LastInst->getOperand(0).getMBB(); Cond.push_back(MachineOperand::CreateImm(0)); Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, @@ -274,6 +282,8 @@ bool PPCInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB, if (!SecondLastInst->getOperand(0).isMBB() || !LastInst->getOperand(0).isMBB()) return true; + if (!EnableCTRLoopAnal) + return true; TBB = SecondLastInst->getOperand(0).getMBB(); Cond.push_back(MachineOperand::CreateImm(1)); Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, @@ -286,6 +296,8 @@ bool PPCInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB, if (!SecondLastInst->getOperand(0).isMBB() || !LastInst->getOperand(0).isMBB()) return true; + if (!EnableCTRLoopAnal) + return true; TBB = SecondLastInst->getOperand(0).getMBB(); Cond.push_back(MachineOperand::CreateImm(0)); Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, diff --git a/lib/Target/PowerPC/PPCTargetMachine.cpp b/lib/Target/PowerPC/PPCTargetMachine.cpp index 6f7fc4b..bcab83c 100644 --- a/lib/Target/PowerPC/PPCTargetMachine.cpp +++ b/lib/Target/PowerPC/PPCTargetMachine.cpp @@ -23,8 +23,8 @@ using namespace llvm; static cl:: -opt<bool> DisableCTRLoops("disable-ppc-ctrloops", cl::Hidden, - cl::desc("Disable CTR loops for PPC")); +opt<bool> EnableCTRLoops("enable-ppc-ctrloops", cl::Hidden, + cl::desc("Enable CTR loops for PPC")); extern "C" void LLVMInitializePowerPCTarget() { // Register the targets @@ -103,9 +103,10 @@ TargetPassConfig *PPCTargetMachine::createPassConfig(PassManagerBase &PM) { } bool PPCPassConfig::addPreRegAlloc() { - if (!DisableCTRLoops && getOptLevel() != CodeGenOpt::None) { + // FIXME: Once this can be enabled by default, this condition should read: + // if (!DisableCTRLoops && getOptLevel() != CodeGenOpt::None) + if (EnableCTRLoops) PM->add(createPPCCTRLoops()); - } return false; } |