12 files changed, 8 insertions, 39 deletions
diff --git a/lib/Target/ARM/ARMJITInfo.cpp b/lib/Target/ARM/ARMJITInfo.cpp
index a5642d6..351a290 100644
--- a/lib/Target/ARM/ARMJITInfo.cpp
+++ b/lib/Target/ARM/ARMJITInfo.cpp
@@ -48,7 +48,7 @@ static TargetJITInfo::JITCompilerFn JITCompilerFunction;
 // write our own wrapper, which does things our way, so we have complete
 // control over register saving and restoring.
 extern "C" {
-#if defined(__arm__) && !defined(ANDROID)
+#if defined(__arm__)
   void ARMCompilationCallback();
   asm(
     ".text\n"
@@ -248,7 +248,6 @@ intptr_t ARMJITInfo::resolveRelocDestAddr(MachineRelocation *MR) const {
     return getJumpTableBaseAddr(MR->getJumpTableIndex());
   case ARM::reloc_arm_cp_entry:
   case ARM::reloc_arm_vfp_cp_entry:
-  case ARM::reloc_arm_so_imm_cp_entry:
     // Constant pool entry address.
     return getConstantPoolEntryAddr(MR->getConstantPoolIndex());
   case ARM::reloc_arm_machine_cp_entry: {
@@ -295,29 +294,6 @@ void ARMJITInfo::relocate(void *Function, MachineRelocation *MR,
       *((intptr_t*)RelocPos) |= 15 << ARMII::RegRnShift;
       break;
     }
-    case ARM::reloc_arm_so_imm_cp_entry: {
-      ResultPtr = ResultPtr - (intptr_t)RelocPos - 8;
-      // If the result is positive, set bit U(23) to 1.
-      if (ResultPtr >= 0)
-        *((intptr_t*)RelocPos) |= 1 << ARMII::U_BitShift;
-      else {
-        // Otherwise, obtain the absolute value and set bit U(23) to 0.
-        *((intptr_t*)RelocPos) &= ~(1 << ARMII::U_BitShift);
-        // FIXME: Also set bit 22 to 1 since 'sub' instruction is going to be used.
-        *((intptr_t*)RelocPos) |= 1 << 22;
-        ResultPtr = - ResultPtr;
-      }
-
-      int SoImmVal = ARM_AM::getSOImmVal(ResultPtr);
-      assert(SoImmVal != -1 && "Not a valid so_imm value!");
-      *((intptr_t*)RelocPos) |= (ARM_AM::getSOImmValRot((unsigned)SoImmVal) >> 1)
-            << ARMII::SoRotImmShift;
-      *((intptr_t*)RelocPos) |= ARM_AM::getSOImmValImm((unsigned)SoImmVal);
-       // Set register Rn to PC (which is register 15 on all architectures).
-       // FIXME: This avoids the need for register info in the JIT class.
-       *((intptr_t*)RelocPos) |= 15 << ARMII::RegRnShift;
-      break;
-    }
     case ARM::reloc_arm_pic_jt:
     case ARM::reloc_arm_machine_cp_entry:
     case ARM::reloc_arm_absolute: {
diff --git a/lib/Target/ARM/Android.mk b/lib/Target/ARM/Android.mk
index bf58f11..6a25ae1 100644
--- a/lib/Target/ARM/Android.mk
+++ b/lib/Target/ARM/Android.mk
@@ -12,7 +12,6 @@ arm_codegen_TBLGEN_TABLES := \
   ARMGenFastISel.inc \
   ARMGenCallingConv.inc \
   ARMGenSubtargetInfo.inc \
-  ARMGenEDInfo.inc \
   ARMGenDisassemblerTables.inc
 
 arm_codegen_SRC_FILES := \
@@ -22,7 +21,6 @@ arm_codegen_SRC_FILES := \
   ARMCodeEmitter.cpp \
   ARMConstantIslandPass.cpp \
   ARMConstantPoolValue.cpp \
-  ARMELFWriterInfo.cpp \
   ARMExpandPseudoInsts.cpp \
   ARMFastISel.cpp \
   ARMFrameLowering.cpp \
@@ -39,6 +37,7 @@ arm_codegen_SRC_FILES := \
   ARMSubtarget.cpp \
   ARMTargetMachine.cpp \
   ARMTargetObjectFile.cpp \
+  ARMTargetTransformInfo.cpp \
   InstPrinter/ARMInstPrinter.cpp \
   MLxExpansionPass.cpp \
   Thumb1FrameLowering.cpp \
diff --git a/lib/Target/ARM/AsmParser/Android.mk b/lib/Target/ARM/AsmParser/Android.mk
index 5e64e27..e17a274 100644
--- a/lib/Target/ARM/AsmParser/Android.mk
+++ b/lib/Target/ARM/AsmParser/Android.mk
@@ -5,7 +5,6 @@ LOCAL_PATH := $(call my-dir)
 #===---------------------------------------------------------------===
 
 arm_asm_parser_SRC_FILES := \
-  ARMAsmLexer.cpp \
   ARMAsmParser.cpp
 
 arm_asm_parser_TBLGEN_TABLES := \
diff --git a/lib/Target/ARM/Disassembler/Android.mk b/lib/Target/ARM/Disassembler/Android.mk
index fb14762..51e364b 100644
--- a/lib/Target/ARM/Disassembler/Android.mk
+++ b/lib/Target/ARM/Disassembler/Android.mk
@@ -2,7 +2,6 @@ LOCAL_PATH := $(call my-dir)
 
 arm_disassembler_TBLGEN_TABLES := \
   ARMGenDisassemblerTables.inc \
-  ARMGenEDInfo.inc \
   ARMGenInstrInfo.inc \
   ARMGenSubtargetInfo.inc \
   ARMGenRegisterInfo.inc
diff --git a/lib/Target/ARM/MCTargetDesc/Android.mk b/lib/Target/ARM/MCTargetDesc/Android.mk
index 48a1db0..b283ec5 100644
--- a/lib/Target/ARM/MCTargetDesc/Android.mk
+++ b/lib/Target/ARM/MCTargetDesc/Android.mk
@@ -9,6 +9,7 @@ arm_mc_desc_TBLGEN_TABLES := \
 arm_mc_desc_SRC_FILES := \
   ARMAsmBackend.cpp \
   ARMELFObjectWriter.cpp \
+  ARMELFStreamer.cpp \
   ARMMCAsmInfo.cpp \
   ARMMCCodeEmitter.cpp \
   ARMMCExpr.cpp \
diff --git a/lib/Target/Android.mk b/lib/Target/Android.mk
index f27aa2e..60f5b18 100644
--- a/lib/Target/Android.mk
+++ b/lib/Target/Android.mk
@@ -3,15 +3,12 @@ LOCAL_PATH:= $(call my-dir)
 target_SRC_FILES := \
   Mangler.cpp \
   Target.cpp \
-  TargetData.cpp \
-  TargetELFWriterInfo.cpp \
-  TargetInstrInfo.cpp \
   TargetIntrinsicInfo.cpp \
   TargetJITInfo.cpp \
   TargetLibraryInfo.cpp \
   TargetLoweringObjectFile.cpp \
+  TargetMachineC.cpp \
   TargetMachine.cpp \
-  TargetRegisterInfo.cpp \
   TargetSubtargetInfo.cpp
 
 # For the host
diff --git a/lib/Target/Mips/Android.mk b/lib/Target/Mips/Android.mk
index af24a5a..44271e9 100644
--- a/lib/Target/Mips/Android.mk
+++ b/lib/Target/Mips/Android.mk
@@ -5,6 +5,7 @@ mips_codegen_TBLGEN_TABLES := \
   MipsGenInstrInfo.inc \
   MipsGenCodeEmitter.inc \
   MipsGenMCCodeEmitter.inc \
+  MipsGenMCPseudoLowering.inc \
   MipsGenAsmWriter.inc \
   MipsGenDAGISel.inc \
   MipsGenCallingConv.inc \
@@ -18,8 +19,6 @@ mips_codegen_SRC_FILES := \
   MipsAsmPrinter.cpp \
   MipsCodeEmitter.cpp \
   MipsDelaySlotFiller.cpp \
-  MipsDirectObjLower.cpp \
-  MipsELFWriterInfo.cpp \
   MipsFrameLowering.cpp \
   MipsInstrInfo.cpp \
   MipsISelDAGToDAG.cpp \
diff --git a/lib/Target/Mips/Disassembler/Android.mk b/lib/Target/Mips/Disassembler/Android.mk
index 6c28c69..4e38c4b 100644
--- a/lib/Target/Mips/Disassembler/Android.mk
+++ b/lib/Target/Mips/Disassembler/Android.mk
@@ -2,7 +2,6 @@ LOCAL_PATH := $(call my-dir)
 
 mips_disassembler_TBLGEN_TABLES := \
   MipsGenDisassemblerTables.inc \
-  MipsGenEDInfo.inc \
   MipsGenInstrInfo.inc \
   MipsGenRegisterInfo.inc \
   MipsGenSubtargetInfo.inc
diff --git a/lib/Target/Mips/MCTargetDesc/Android.mk b/lib/Target/Mips/MCTargetDesc/Android.mk
index fac9d33..83fe61e 100644
--- a/lib/Target/Mips/MCTargetDesc/Android.mk
+++ b/lib/Target/Mips/MCTargetDesc/Android.mk
@@ -8,6 +8,7 @@ mips_mc_desc_TBLGEN_TABLES := \
 
 mips_mc_desc_SRC_FILES := \
   MipsAsmBackend.cpp \
+  MipsDirectObjLower.cpp \
   MipsELFObjectWriter.cpp \
   MipsMCAsmInfo.cpp \
   MipsMCCodeEmitter.cpp \
diff --git a/lib/Target/X86/Android.mk b/lib/Target/X86/Android.mk
index 445dd5d..f159bb2 100644
--- a/lib/Target/X86/Android.mk
+++ b/lib/Target/X86/Android.mk
@@ -14,7 +14,6 @@ x86_codegen_SRC_FILES := \
   X86AsmPrinter.cpp \
   X86COFFMachineModuleInfo.cpp \
   X86CodeEmitter.cpp \
-  X86ELFWriterInfo.cpp \
   X86FastISel.cpp \
   X86FloatingPoint.cpp \
   X86FrameLowering.cpp \
@@ -24,11 +23,13 @@ x86_codegen_SRC_FILES := \
   X86JITInfo.cpp \
   X86MachineFunctionInfo.cpp \
   X86MCInstLower.cpp \
+  X86PadShortFunction.cpp \
   X86RegisterInfo.cpp \
   X86SelectionDAGInfo.cpp \
   X86Subtarget.cpp \
   X86TargetMachine.cpp \
   X86TargetObjectFile.cpp \
+  X86TargetTransformInfo.cpp \
   X86VZeroUpper.cpp
 
 # For the host
diff --git a/lib/Target/X86/AsmParser/Android.mk b/lib/Target/X86/AsmParser/Android.mk
index 148d074..d6de437 100644
--- a/lib/Target/X86/AsmParser/Android.mk
+++ b/lib/Target/X86/AsmParser/Android.mk
@@ -6,7 +6,6 @@ include $(CLEAR_VARS)
 include $(CLEAR_TBLGEN_VARS)
 
 x86_asm_parser_SRC_FILES :=	\
-	X86AsmLexer.cpp	\
 	X86AsmParser.cpp
 
 x86_asm_parser_TBLGEN_TABLES :=	\
diff --git a/lib/Target/X86/Disassembler/Android.mk b/lib/Target/X86/Disassembler/Android.mk
index e631db6..1cee663 100644
--- a/lib/Target/X86/Disassembler/Android.mk
+++ b/lib/Target/X86/Disassembler/Android.mk
@@ -2,7 +2,6 @@ LOCAL_PATH := $(call my-dir)
 
 x86_disassembler_TBLGEN_TABLES := \
   X86GenDisassemblerTables.inc \
-  X86GenEDInfo.inc \
   X86GenInstrInfo.inc \
   X86GenRegisterInfo.inc