3 files changed, 29 insertions, 4 deletions
diff --git a/lib/Target/ARM/ARMInstrVFP.td b/lib/Target/ARM/ARMInstrVFP.td
index b29b31e..307e25e 100644
--- a/lib/Target/ARM/ARMInstrVFP.td
+++ b/lib/Target/ARM/ARMInstrVFP.td
@@ -1198,7 +1198,7 @@ class MovFromVFP<bits<4> opc19_16, dag oops, dag iops, string opc, string asm,
 // to APSR.
 let Defs = [CPSR], Uses = [FPSCR_NZCV], Rt = 0b1111 /* apsr_nzcv */ in
 def FMSTAT : MovFromVFP<0b0001 /* fpscr */, (outs), (ins),
-                        "vmrs", "\tapsr_nzcv, fpscr", [(arm_fmstat)]>;
+                        "vmrs", "\tAPSR_nzcv, fpscr", [(arm_fmstat)]>;
 
 // Application level FPSCR -> GPR
 let hasSideEffects = 1, Uses = [FPSCR] in
diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index af973e8..29a9b0d 100644
--- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -3258,7 +3258,8 @@ parseMSRMaskOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
 
   if (isMClass()) {
     // See ARMv6-M 10.1.1
-    unsigned FlagsVal = StringSwitch<unsigned>(Mask)
+    std::string Name = Mask.lower();
+    unsigned FlagsVal = StringSwitch<unsigned>(Name)
       .Case("apsr", 0)
       .Case("iapsr", 1)
       .Case("eapsr", 2)
@@ -4432,10 +4433,11 @@ bool ARMAsmParser::parseOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands,
     else if (Res == -1) // irrecoverable error
       return true;
     // If this is VMRS, check for the apsr_nzcv operand.
-    if (Mnemonic == "vmrs" && Parser.getTok().getString() == "apsr_nzcv") {
+    if (Mnemonic == "vmrs" &&
+        Parser.getTok().getString().equals_lower("apsr_nzcv")) {
       S = Parser.getTok().getLoc();
       Parser.Lex();
-      Operands.push_back(ARMOperand::CreateToken("apsr_nzcv", S));
+      Operands.push_back(ARMOperand::CreateToken("APSR_nzcv", S));
       return false;
     }
 
diff --git a/lib/Target/ARM/AsmParser/x b/lib/Target/ARM/AsmParser/x
new file mode 100644
index 0000000..1496e70
--- /dev/null
+++ b/lib/Target/ARM/AsmParser/x
@@ -0,0 +1,23 @@
+diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+index af973e8..cbdae2a 100644
+--- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
++++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+@@ -3254,7 +3254,8 @@ parseMSRMaskOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
+   SMLoc S = Parser.getTok().getLoc();
+   const AsmToken &Tok = Parser.getTok();
+   assert(Tok.is(AsmToken::Identifier) && "Token is not an Identifier");
+-  StringRef Mask = Tok.getString();
++  std::string MaskStr = Tok.getString().lower();
++  StringRef Mask = MaskStr; // convenience for slice() and such.
+ 
+   if (isMClass()) {
+     // See ARMv6-M 10.1.1
+@@ -3290,7 +3291,7 @@ parseMSRMaskOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
+   // Split spec_reg from flag, example: CPSR_sxf => "CPSR" and "sxf"
+   size_t Start = 0, Next = Mask.find('_');
+   StringRef Flags = "";
+-  std::string SpecReg = Mask.slice(Start, Next).lower();
++  StringRef SpecReg = Mask.slice(Start, Next);
+   if (Next != StringRef::npos)
+     Flags = Mask.slice(Next+1, Mask.size());
+