diff options
Diffstat (limited to 'lib/Target')
-rw-r--r-- | lib/Target/ARM/ARMSubtarget.h | 4 | ||||
-rw-r--r-- | lib/Target/X86/X86Subtarget.h | 4 |
2 files changed, 6 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMSubtarget.h b/lib/Target/ARM/ARMSubtarget.h index bc5768e..7478159 100644 --- a/lib/Target/ARM/ARMSubtarget.h +++ b/lib/Target/ARM/ARMSubtarget.h @@ -128,7 +128,9 @@ protected: /// enablePostRAScheduler - True at 'More' optimization except /// for Thumb1. - bool enablePostRAScheduler(CodeGenOpt::Level OptLevel) const { + bool enablePostRAScheduler(CodeGenOpt::Level OptLevel, + TargetSubtarget::AntiDepBreakMode& mode) const { + mode = TargetSubtarget::ANTIDEP_NONE; return PostRAScheduler && OptLevel >= CodeGenOpt::Default; } diff --git a/lib/Target/X86/X86Subtarget.h b/lib/Target/X86/X86Subtarget.h index 27e4333..0e4cfde 100644 --- a/lib/Target/X86/X86Subtarget.h +++ b/lib/Target/X86/X86Subtarget.h @@ -218,7 +218,9 @@ public: /// enablePostRAScheduler - X86 target is enabling post-alloc scheduling /// at 'More' optimization level. - bool enablePostRAScheduler(CodeGenOpt::Level OptLevel) const { + bool enablePostRAScheduler(CodeGenOpt::Level OptLevel, + TargetSubtarget::AntiDepBreakMode& mode) const { + mode = TargetSubtarget::ANTIDEP_NONE; return OptLevel >= CodeGenOpt::Default; } }; |