diff options
Diffstat (limited to 'lib')
-rw-r--r-- | lib/CodeGen/PrologEpilogInserter.cpp | 18 | ||||
-rw-r--r-- | lib/CodeGen/RegisterScavenging.cpp | 73 |
2 files changed, 24 insertions, 67 deletions
diff --git a/lib/CodeGen/PrologEpilogInserter.cpp b/lib/CodeGen/PrologEpilogInserter.cpp index e5872df..5a168dd 100644 --- a/lib/CodeGen/PrologEpilogInserter.cpp +++ b/lib/CodeGen/PrologEpilogInserter.cpp @@ -826,8 +826,6 @@ void PEI::scavengeFrameVirtualRegs(MachineFunction &Fn) { for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ) { MachineInstr *MI = I; MachineBasicBlock::iterator J = llvm::next(I); - MachineBasicBlock::iterator P = I == BB->begin() ? - MachineBasicBlock::iterator(NULL) : llvm::prior(I); // RS should process this instruction before we might scavenge at this // location. This is because we might be replacing a virtual register @@ -871,20 +869,8 @@ void PEI::scavengeFrameVirtualRegs(MachineFunction &Fn) { // problem because we need the spill code before I: Move I to just // prior to J. if (I != llvm::prior(J)) { - BB->splice(J, BB, I); - - // Before we move I, we need to prepare the RS to visit I again. - // Specifically, RS will assert if it sees uses of registers that - // it believes are undefined. Because we have already processed - // register kills in I, when it visits I again, it will believe that - // those registers are undefined. To avoid this situation, unprocess - // the instruction I. - assert(RS->getCurrentPosition() == I && - "The register scavenger has an unexpected position"); - I = P; - RS->unprocess(P); - - // RS->skipTo(I == BB->begin() ? NULL : llvm::prior(I)); + BB->splice(J, BB, I++); + RS->skipTo(I == BB->begin() ? NULL : llvm::prior(I)); } else ++I; } diff --git a/lib/CodeGen/RegisterScavenging.cpp b/lib/CodeGen/RegisterScavenging.cpp index 07ace7a..55a66ba 100644 --- a/lib/CodeGen/RegisterScavenging.cpp +++ b/lib/CodeGen/RegisterScavenging.cpp @@ -110,11 +110,30 @@ void RegScavenger::addRegWithSubRegs(BitVector &BV, unsigned Reg) { BV.set(*SubRegs); } -void RegScavenger::determineKillsAndDefs() { - assert(Tracking && "Must be tracking to determine kills and defs"); +void RegScavenger::forward() { + // Move ptr forward. + if (!Tracking) { + MBBI = MBB->begin(); + Tracking = true; + } else { + assert(MBBI != MBB->end() && "Already past the end of the basic block!"); + MBBI = llvm::next(MBBI); + } + assert(MBBI != MBB->end() && "Already at the end of the basic block!"); MachineInstr *MI = MBBI; - assert(!MI->isDebugValue() && "Debug values have no kills or defs"); + + for (SmallVector<ScavengedInfo, 2>::iterator I = Scavenged.begin(), + IE = Scavenged.end(); I != IE; ++I) { + if (I->Restore != MI) + continue; + + I->Reg = 0; + I->Restore = NULL; + } + + if (MI->isDebugValue()) + return; // Find out which registers are early clobbered, killed, defined, and marked // def-dead in this instruction. @@ -148,54 +167,6 @@ void RegScavenger::determineKillsAndDefs() { addRegWithSubRegs(DefRegs, Reg); } } -} - -void RegScavenger::unprocess() { - assert(Tracking && "Cannot unprocess because we're not tracking"); - - MachineInstr *MI = MBBI; - if (MI->isDebugValue()) - return; - - determineKillsAndDefs(); - - // Commit the changes. - setUsed(KillRegs); - setUnused(DefRegs); - - if (MBBI == MBB->begin()) { - MBBI = MachineBasicBlock::iterator(NULL); - Tracking = false; - } else - --MBBI; -} - -void RegScavenger::forward() { - // Move ptr forward. - if (!Tracking) { - MBBI = MBB->begin(); - Tracking = true; - } else { - assert(MBBI != MBB->end() && "Already past the end of the basic block!"); - MBBI = llvm::next(MBBI); - } - assert(MBBI != MBB->end() && "Already at the end of the basic block!"); - - MachineInstr *MI = MBBI; - - for (SmallVector<ScavengedInfo, 2>::iterator I = Scavenged.begin(), - IE = Scavenged.end(); I != IE; ++I) { - if (I->Restore != MI) - continue; - - I->Reg = 0; - I->Restore = NULL; - } - - if (MI->isDebugValue()) - return; - - determineKillsAndDefs(); // Verify uses and defs. #ifndef NDEBUG |