diff options
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/CellSPU/SPUSubtarget.cpp | 21 | ||||
| -rw-r--r-- | lib/Target/CellSPU/SPUSubtarget.h | 4 |
2 files changed, 25 insertions, 0 deletions
diff --git a/lib/Target/CellSPU/SPUSubtarget.cpp b/lib/Target/CellSPU/SPUSubtarget.cpp index 0f18b7f..07c8352 100644 --- a/lib/Target/CellSPU/SPUSubtarget.cpp +++ b/lib/Target/CellSPU/SPUSubtarget.cpp @@ -14,6 +14,8 @@ #include "SPUSubtarget.h" #include "SPU.h" #include "SPUGenSubtarget.inc" +#include "llvm/ADT/SmallVector.h" +#include "SPURegisterInfo.h" using namespace llvm; @@ -34,3 +36,22 @@ SPUSubtarget::SPUSubtarget(const std::string &TT, const std::string &FS) : /// producing code for the JIT. void SPUSubtarget::SetJITMode() { } + +/// Enable PostRA scheduling for optimization levels -O2 and -O3. +bool SPUSubtarget::enablePostRAScheduler( + CodeGenOpt::Level OptLevel, + TargetSubtarget::AntiDepBreakMode& Mode, + RegClassVector& CriticalPathRCs) const { + Mode = TargetSubtarget::ANTIDEP_CRITICAL; + // CriticalPathsRCs seems to be the set of + // RegisterClasses that antidep breakings are performed for. + // Do it for all register classes + CriticalPathRCs.clear(); + CriticalPathRCs.push_back(&SPU::R8CRegClass); + CriticalPathRCs.push_back(&SPU::R16CRegClass); + CriticalPathRCs.push_back(&SPU::R32CRegClass); + CriticalPathRCs.push_back(&SPU::R32FPRegClass); + CriticalPathRCs.push_back(&SPU::R64CRegClass); + CriticalPathRCs.push_back(&SPU::VECREGRegClass); + return OptLevel >= CodeGenOpt::Default; +} diff --git a/lib/Target/CellSPU/SPUSubtarget.h b/lib/Target/CellSPU/SPUSubtarget.h index 147163d..d792930 100644 --- a/lib/Target/CellSPU/SPUSubtarget.h +++ b/lib/Target/CellSPU/SPUSubtarget.h @@ -84,6 +84,10 @@ namespace llvm { "-i16:16:128-i8:8:128-i1:8:128-a:0:128-v64:64:128-v128:128:128" "-s:128:128-n32:64"; } + + bool enablePostRAScheduler(CodeGenOpt::Level OptLevel, + TargetSubtarget::AntiDepBreakMode& Mode, + RegClassVector& CriticalPathRCs) const; }; } // End llvm namespace |