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-rw-r--r--test/CodeGen/AArch64/bool-loads.ll8
1 files changed, 4 insertions, 4 deletions
diff --git a/test/CodeGen/AArch64/bool-loads.ll b/test/CodeGen/AArch64/bool-loads.ll
index 881aeaa..b0ee1b4 100644
--- a/test/CodeGen/AArch64/bool-loads.ll
+++ b/test/CodeGen/AArch64/bool-loads.ll
@@ -5,7 +5,7 @@
define i32 @test_sextloadi32() {
; CHECK-LABEL: test_sextloadi32
- %val = load i1* @var
+ %val = load i1, i1* @var
%ret = sext i1 %val to i32
; CHECK: ldrb {{w[0-9]+}}, [{{x[0-9]+}}, {{#?}}:lo12:var]
; CHECK: {{sbfx x[0-9]+, x[0-9]+, #0, #1|sbfx w[0-9]+, w[0-9]+, #0, #1}}
@@ -17,7 +17,7 @@ define i32 @test_sextloadi32() {
define i64 @test_sextloadi64() {
; CHECK-LABEL: test_sextloadi64
- %val = load i1* @var
+ %val = load i1, i1* @var
%ret = sext i1 %val to i64
; CHECK: ldrb {{w[0-9]+}}, [{{x[0-9]+}}, {{#?}}:lo12:var]
; CHECK: {{sbfx x[0-9]+, x[0-9]+, #0, #1}}
@@ -32,7 +32,7 @@ define i32 @test_zextloadi32() {
; It's not actually necessary that "ret" is next, but as far as LLVM
; is concerned only 0 or 1 should be loadable so no extension is
; necessary.
- %val = load i1* @var
+ %val = load i1, i1* @var
%ret = zext i1 %val to i32
; CHECK: ldrb {{w[0-9]+}}, [{{x[0-9]+}}, {{#?}}:lo12:var]
@@ -46,7 +46,7 @@ define i64 @test_zextloadi64() {
; It's not actually necessary that "ret" is next, but as far as LLVM
; is concerned only 0 or 1 should be loadable so no extension is
; necessary.
- %val = load i1* @var
+ %val = load i1, i1* @var
%ret = zext i1 %val to i64
; CHECK: ldrb {{w[0-9]+}}, [{{x[0-9]+}}, {{#?}}:lo12:var]