diff options
Diffstat (limited to 'test/CodeGen/AArch64/tail-call.ll')
-rw-r--r-- | test/CodeGen/AArch64/tail-call.ll | 34 |
1 files changed, 17 insertions, 17 deletions
diff --git a/test/CodeGen/AArch64/tail-call.ll b/test/CodeGen/AArch64/tail-call.ll index 81885f1..8aab842 100644 --- a/test/CodeGen/AArch64/tail-call.ll +++ b/test/CodeGen/AArch64/tail-call.ll @@ -7,8 +7,10 @@ declare fastcc void @callee_stack16([8 x i32], i64, i64) define fastcc void @caller_to0_from0() nounwind { ; CHECK-LABEL: caller_to0_from0: ; CHECK-NEXT: // BB + tail call fastcc void @callee_stack0() ret void + ; CHECK-NEXT: b callee_stack0 } @@ -17,6 +19,7 @@ define fastcc void @caller_to0_from8([8 x i32], i64) { tail call fastcc void @callee_stack0() ret void + ; CHECK: add sp, sp, #16 ; CHECK-NEXT: b callee_stack0 } @@ -29,8 +32,8 @@ define fastcc void @caller_to8_from0() { ; pointer (we didn't have arg space to reuse). tail call fastcc void @callee_stack8([8 x i32] undef, i64 42) ret void -; CHECK: str {{x[0-9]+}}, [sp, #16] -; CHECK-NEXT: add sp, sp, #16 + +; CHECK: str {{x[0-9]+}}, [sp, #16]! ; CHECK-NEXT: b callee_stack8 } @@ -41,8 +44,8 @@ define fastcc void @caller_to8_from8([8 x i32], i64 %a) { ; Key point is that the "%a" should go where at SP on entry. tail call fastcc void @callee_stack8([8 x i32] undef, i64 42) ret void -; CHECK: str {{x[0-9]+}}, [sp, #16] -; CHECK-NEXT: add sp, sp, #16 + +; CHECK: str {{x[0-9]+}}, [sp, #16]! ; CHECK-NEXT: b callee_stack8 } @@ -54,10 +57,10 @@ define fastcc void @caller_to16_from8([8 x i32], i64 %a) { ; above %a on the stack. If it tries to go below incoming-SP then the ; callee will not deallocate the space, even in fastcc. tail call fastcc void @callee_stack16([8 x i32] undef, i64 42, i64 2) -; CHECK: str {{x[0-9]+}}, [sp, #24] -; CHECK: str {{x[0-9]+}}, [sp, #16] -; CHECK: add sp, sp, #16 -; CHECK: b callee_stack16 + +; CHECK: stp {{x[0-9]+}}, {{x[0-9]+}}, [sp, #16] +; CHECK-NEXT: add sp, sp, #16 +; CHECK-NEXT: b callee_stack16 ret void } @@ -69,8 +72,8 @@ define fastcc void @caller_to8_from24([8 x i32], i64 %a, i64 %b, i64 %c) { ; Key point is that the "%a" should go where at #16 above SP on entry. tail call fastcc void @callee_stack8([8 x i32] undef, i64 42) ret void -; CHECK: str {{x[0-9]+}}, [sp, #32] -; CHECK-NEXT: add sp, sp, #32 + +; CHECK: str {{x[0-9]+}}, [sp, #32]! ; CHECK-NEXT: b callee_stack8 } @@ -84,11 +87,8 @@ define fastcc void @caller_to16_from16([8 x i32], i64 %a, i64 %b) { tail call fastcc void @callee_stack16([8 x i32] undef, i64 %b, i64 %a) ret void -; CHECK: ldr x0, -; CHECK: ldr x1, -; CHECK: str x1, -; CHECK: str x0, - -; CHECK: add sp, sp, #16 -; CHECK: b callee_stack16 +; CHECK: ldp {{x[0-9]+}}, {{x[0-9]+}}, [sp, #16] +; CHECK: stp {{x[0-9]+}}, {{x[0-9]+}}, [sp, #16] +; CHECK-NEXT: add sp, sp, #16 +; CHECK-NEXT: b callee_stack16 } |