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-rw-r--r--test/CodeGen/ARM/vdup.ll8
1 files changed, 4 insertions, 4 deletions
diff --git a/test/CodeGen/ARM/vdup.ll b/test/CodeGen/ARM/vdup.ll
index c9a68ca..50e4df9 100644
--- a/test/CodeGen/ARM/vdup.ll
+++ b/test/CodeGen/ARM/vdup.ll
@@ -244,25 +244,25 @@ define <4 x float> @vduplaneQfloat(<2 x float>* %A) nounwind {
ret <4 x float> %tmp2
}
-define arm_apcscc <2 x i64> @foo(<2 x i64> %arg0_int64x1_t) nounwind readnone {
+define <2 x i64> @foo(<2 x i64> %arg0_int64x1_t) nounwind readnone {
entry:
%0 = shufflevector <2 x i64> %arg0_int64x1_t, <2 x i64> undef, <2 x i32> <i32 1, i32 1>
ret <2 x i64> %0
}
-define arm_apcscc <2 x i64> @bar(<2 x i64> %arg0_int64x1_t) nounwind readnone {
+define <2 x i64> @bar(<2 x i64> %arg0_int64x1_t) nounwind readnone {
entry:
%0 = shufflevector <2 x i64> %arg0_int64x1_t, <2 x i64> undef, <2 x i32> <i32 0, i32 0>
ret <2 x i64> %0
}
-define arm_apcscc <2 x double> @baz(<2 x double> %arg0_int64x1_t) nounwind readnone {
+define <2 x double> @baz(<2 x double> %arg0_int64x1_t) nounwind readnone {
entry:
%0 = shufflevector <2 x double> %arg0_int64x1_t, <2 x double> undef, <2 x i32> <i32 1, i32 1>
ret <2 x double> %0
}
-define arm_apcscc <2 x double> @qux(<2 x double> %arg0_int64x1_t) nounwind readnone {
+define <2 x double> @qux(<2 x double> %arg0_int64x1_t) nounwind readnone {
entry:
%0 = shufflevector <2 x double> %arg0_int64x1_t, <2 x double> undef, <2 x i32> <i32 0, i32 0>
ret <2 x double> %0