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-rw-r--r--test/CodeGen/Hexagon/memops.ll420
1 files changed, 210 insertions, 210 deletions
diff --git a/test/CodeGen/Hexagon/memops.ll b/test/CodeGen/Hexagon/memops.ll
index fca1a73..e4a8bf7 100644
--- a/test/CodeGen/Hexagon/memops.ll
+++ b/test/CodeGen/Hexagon/memops.ll
@@ -4,7 +4,7 @@
define void @memop_unsigned_char_add5(i8* nocapture %p) nounwind {
entry:
; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}#5
- %0 = load i8* %p, align 1
+ %0 = load i8, i8* %p, align 1
%conv = zext i8 %0 to i32
%add = add nsw i32 %conv, 5
%conv1 = trunc i32 %add to i8
@@ -16,7 +16,7 @@ define void @memop_unsigned_char_add(i8* nocapture %p, i8 zeroext %x) nounwind {
entry:
; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}r{{[0-9]+}}
%conv = zext i8 %x to i32
- %0 = load i8* %p, align 1
+ %0 = load i8, i8* %p, align 1
%conv1 = zext i8 %0 to i32
%add = add nsw i32 %conv1, %conv
%conv2 = trunc i32 %add to i8
@@ -28,7 +28,7 @@ define void @memop_unsigned_char_sub(i8* nocapture %p, i8 zeroext %x) nounwind {
entry:
; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}-={{ *}}r{{[0-9]+}}
%conv = zext i8 %x to i32
- %0 = load i8* %p, align 1
+ %0 = load i8, i8* %p, align 1
%conv1 = zext i8 %0 to i32
%sub = sub nsw i32 %conv1, %conv
%conv2 = trunc i32 %sub to i8
@@ -39,7 +39,7 @@ entry:
define void @memop_unsigned_char_or(i8* nocapture %p, i8 zeroext %x) nounwind {
entry:
; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}|={{ *}}r{{[0-9]+}}
- %0 = load i8* %p, align 1
+ %0 = load i8, i8* %p, align 1
%or3 = or i8 %0, %x
store i8 %or3, i8* %p, align 1
ret void
@@ -48,7 +48,7 @@ entry:
define void @memop_unsigned_char_and(i8* nocapture %p, i8 zeroext %x) nounwind {
entry:
; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}&={{ *}}r{{[0-9]+}}
- %0 = load i8* %p, align 1
+ %0 = load i8, i8* %p, align 1
%and3 = and i8 %0, %x
store i8 %and3, i8* %p, align 1
ret void
@@ -57,7 +57,7 @@ entry:
define void @memop_unsigned_char_clrbit(i8* nocapture %p) nounwind {
entry:
; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}clrbit({{ *}}#5{{ *}})
- %0 = load i8* %p, align 1
+ %0 = load i8, i8* %p, align 1
%conv = zext i8 %0 to i32
%and = and i32 %conv, 223
%conv1 = trunc i32 %and to i8
@@ -68,7 +68,7 @@ entry:
define void @memop_unsigned_char_setbit(i8* nocapture %p) nounwind {
entry:
; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}setbit({{ *}}#7{{ *}})
- %0 = load i8* %p, align 1
+ %0 = load i8, i8* %p, align 1
%conv = zext i8 %0 to i32
%or = or i32 %conv, 128
%conv1 = trunc i32 %or to i8
@@ -79,8 +79,8 @@ entry:
define void @memop_unsigned_char_add5_index(i8* nocapture %p, i32 %i) nounwind {
entry:
; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}#5
- %add.ptr = getelementptr inbounds i8* %p, i32 %i
- %0 = load i8* %add.ptr, align 1
+ %add.ptr = getelementptr inbounds i8, i8* %p, i32 %i
+ %0 = load i8, i8* %add.ptr, align 1
%conv = zext i8 %0 to i32
%add = add nsw i32 %conv, 5
%conv1 = trunc i32 %add to i8
@@ -92,8 +92,8 @@ define void @memop_unsigned_char_add_index(i8* nocapture %p, i32 %i, i8 zeroext
entry:
; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}r{{[0-9]+}}
%conv = zext i8 %x to i32
- %add.ptr = getelementptr inbounds i8* %p, i32 %i
- %0 = load i8* %add.ptr, align 1
+ %add.ptr = getelementptr inbounds i8, i8* %p, i32 %i
+ %0 = load i8, i8* %add.ptr, align 1
%conv1 = zext i8 %0 to i32
%add = add nsw i32 %conv1, %conv
%conv2 = trunc i32 %add to i8
@@ -105,8 +105,8 @@ define void @memop_unsigned_char_sub_index(i8* nocapture %p, i32 %i, i8 zeroext
entry:
; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}-={{ *}}r{{[0-9]+}}
%conv = zext i8 %x to i32
- %add.ptr = getelementptr inbounds i8* %p, i32 %i
- %0 = load i8* %add.ptr, align 1
+ %add.ptr = getelementptr inbounds i8, i8* %p, i32 %i
+ %0 = load i8, i8* %add.ptr, align 1
%conv1 = zext i8 %0 to i32
%sub = sub nsw i32 %conv1, %conv
%conv2 = trunc i32 %sub to i8
@@ -117,8 +117,8 @@ entry:
define void @memop_unsigned_char_or_index(i8* nocapture %p, i32 %i, i8 zeroext %x) nounwind {
entry:
; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}|={{ *}}r{{[0-9]+}}
- %add.ptr = getelementptr inbounds i8* %p, i32 %i
- %0 = load i8* %add.ptr, align 1
+ %add.ptr = getelementptr inbounds i8, i8* %p, i32 %i
+ %0 = load i8, i8* %add.ptr, align 1
%or3 = or i8 %0, %x
store i8 %or3, i8* %add.ptr, align 1
ret void
@@ -127,8 +127,8 @@ entry:
define void @memop_unsigned_char_and_index(i8* nocapture %p, i32 %i, i8 zeroext %x) nounwind {
entry:
; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}&={{ *}}r{{[0-9]+}}
- %add.ptr = getelementptr inbounds i8* %p, i32 %i
- %0 = load i8* %add.ptr, align 1
+ %add.ptr = getelementptr inbounds i8, i8* %p, i32 %i
+ %0 = load i8, i8* %add.ptr, align 1
%and3 = and i8 %0, %x
store i8 %and3, i8* %add.ptr, align 1
ret void
@@ -137,8 +137,8 @@ entry:
define void @memop_unsigned_char_clrbit_index(i8* nocapture %p, i32 %i) nounwind {
entry:
; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}clrbit({{ *}}#5{{ *}})
- %add.ptr = getelementptr inbounds i8* %p, i32 %i
- %0 = load i8* %add.ptr, align 1
+ %add.ptr = getelementptr inbounds i8, i8* %p, i32 %i
+ %0 = load i8, i8* %add.ptr, align 1
%conv = zext i8 %0 to i32
%and = and i32 %conv, 223
%conv1 = trunc i32 %and to i8
@@ -149,8 +149,8 @@ entry:
define void @memop_unsigned_char_setbit_index(i8* nocapture %p, i32 %i) nounwind {
entry:
; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}setbit({{ *}}#7{{ *}})
- %add.ptr = getelementptr inbounds i8* %p, i32 %i
- %0 = load i8* %add.ptr, align 1
+ %add.ptr = getelementptr inbounds i8, i8* %p, i32 %i
+ %0 = load i8, i8* %add.ptr, align 1
%conv = zext i8 %0 to i32
%or = or i32 %conv, 128
%conv1 = trunc i32 %or to i8
@@ -161,8 +161,8 @@ entry:
define void @memop_unsigned_char_add5_index5(i8* nocapture %p) nounwind {
entry:
; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#5){{ *}}+={{ *}}#5
- %add.ptr = getelementptr inbounds i8* %p, i32 5
- %0 = load i8* %add.ptr, align 1
+ %add.ptr = getelementptr inbounds i8, i8* %p, i32 5
+ %0 = load i8, i8* %add.ptr, align 1
%conv = zext i8 %0 to i32
%add = add nsw i32 %conv, 5
%conv1 = trunc i32 %add to i8
@@ -174,8 +174,8 @@ define void @memop_unsigned_char_add_index5(i8* nocapture %p, i8 zeroext %x) nou
entry:
; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#5){{ *}}+={{ *}}r{{[0-9]+}}
%conv = zext i8 %x to i32
- %add.ptr = getelementptr inbounds i8* %p, i32 5
- %0 = load i8* %add.ptr, align 1
+ %add.ptr = getelementptr inbounds i8, i8* %p, i32 5
+ %0 = load i8, i8* %add.ptr, align 1
%conv1 = zext i8 %0 to i32
%add = add nsw i32 %conv1, %conv
%conv2 = trunc i32 %add to i8
@@ -187,8 +187,8 @@ define void @memop_unsigned_char_sub_index5(i8* nocapture %p, i8 zeroext %x) nou
entry:
; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#5){{ *}}-={{ *}}r{{[0-9]+}}
%conv = zext i8 %x to i32
- %add.ptr = getelementptr inbounds i8* %p, i32 5
- %0 = load i8* %add.ptr, align 1
+ %add.ptr = getelementptr inbounds i8, i8* %p, i32 5
+ %0 = load i8, i8* %add.ptr, align 1
%conv1 = zext i8 %0 to i32
%sub = sub nsw i32 %conv1, %conv
%conv2 = trunc i32 %sub to i8
@@ -199,8 +199,8 @@ entry:
define void @memop_unsigned_char_or_index5(i8* nocapture %p, i8 zeroext %x) nounwind {
entry:
; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#5){{ *}}|={{ *}}r{{[0-9]+}}
- %add.ptr = getelementptr inbounds i8* %p, i32 5
- %0 = load i8* %add.ptr, align 1
+ %add.ptr = getelementptr inbounds i8, i8* %p, i32 5
+ %0 = load i8, i8* %add.ptr, align 1
%or3 = or i8 %0, %x
store i8 %or3, i8* %add.ptr, align 1
ret void
@@ -209,8 +209,8 @@ entry:
define void @memop_unsigned_char_and_index5(i8* nocapture %p, i8 zeroext %x) nounwind {
entry:
; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#5){{ *}}&={{ *}}r{{[0-9]+}}
- %add.ptr = getelementptr inbounds i8* %p, i32 5
- %0 = load i8* %add.ptr, align 1
+ %add.ptr = getelementptr inbounds i8, i8* %p, i32 5
+ %0 = load i8, i8* %add.ptr, align 1
%and3 = and i8 %0, %x
store i8 %and3, i8* %add.ptr, align 1
ret void
@@ -219,8 +219,8 @@ entry:
define void @memop_unsigned_char_clrbit_index5(i8* nocapture %p) nounwind {
entry:
; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#5){{ *}}={{ *}}clrbit({{ *}}#5{{ *}})
- %add.ptr = getelementptr inbounds i8* %p, i32 5
- %0 = load i8* %add.ptr, align 1
+ %add.ptr = getelementptr inbounds i8, i8* %p, i32 5
+ %0 = load i8, i8* %add.ptr, align 1
%conv = zext i8 %0 to i32
%and = and i32 %conv, 223
%conv1 = trunc i32 %and to i8
@@ -231,8 +231,8 @@ entry:
define void @memop_unsigned_char_setbit_index5(i8* nocapture %p) nounwind {
entry:
; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#5){{ *}}={{ *}}setbit({{ *}}#7{{ *}})
- %add.ptr = getelementptr inbounds i8* %p, i32 5
- %0 = load i8* %add.ptr, align 1
+ %add.ptr = getelementptr inbounds i8, i8* %p, i32 5
+ %0 = load i8, i8* %add.ptr, align 1
%conv = zext i8 %0 to i32
%or = or i32 %conv, 128
%conv1 = trunc i32 %or to i8
@@ -243,7 +243,7 @@ entry:
define void @memop_signed_char_add5(i8* nocapture %p) nounwind {
entry:
; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}#5
- %0 = load i8* %p, align 1
+ %0 = load i8, i8* %p, align 1
%conv2 = zext i8 %0 to i32
%add = add nsw i32 %conv2, 5
%conv1 = trunc i32 %add to i8
@@ -255,7 +255,7 @@ define void @memop_signed_char_add(i8* nocapture %p, i8 signext %x) nounwind {
entry:
; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}r{{[0-9]+}}
%conv4 = zext i8 %x to i32
- %0 = load i8* %p, align 1
+ %0 = load i8, i8* %p, align 1
%conv13 = zext i8 %0 to i32
%add = add nsw i32 %conv13, %conv4
%conv2 = trunc i32 %add to i8
@@ -267,7 +267,7 @@ define void @memop_signed_char_sub(i8* nocapture %p, i8 signext %x) nounwind {
entry:
; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}-={{ *}}r{{[0-9]+}}
%conv4 = zext i8 %x to i32
- %0 = load i8* %p, align 1
+ %0 = load i8, i8* %p, align 1
%conv13 = zext i8 %0 to i32
%sub = sub nsw i32 %conv13, %conv4
%conv2 = trunc i32 %sub to i8
@@ -278,7 +278,7 @@ entry:
define void @memop_signed_char_or(i8* nocapture %p, i8 signext %x) nounwind {
entry:
; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}|={{ *}}r{{[0-9]+}}
- %0 = load i8* %p, align 1
+ %0 = load i8, i8* %p, align 1
%or3 = or i8 %0, %x
store i8 %or3, i8* %p, align 1
ret void
@@ -287,7 +287,7 @@ entry:
define void @memop_signed_char_and(i8* nocapture %p, i8 signext %x) nounwind {
entry:
; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}&={{ *}}r{{[0-9]+}}
- %0 = load i8* %p, align 1
+ %0 = load i8, i8* %p, align 1
%and3 = and i8 %0, %x
store i8 %and3, i8* %p, align 1
ret void
@@ -296,7 +296,7 @@ entry:
define void @memop_signed_char_clrbit(i8* nocapture %p) nounwind {
entry:
; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}clrbit({{ *}}#5{{ *}})
- %0 = load i8* %p, align 1
+ %0 = load i8, i8* %p, align 1
%conv2 = zext i8 %0 to i32
%and = and i32 %conv2, 223
%conv1 = trunc i32 %and to i8
@@ -307,7 +307,7 @@ entry:
define void @memop_signed_char_setbit(i8* nocapture %p) nounwind {
entry:
; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}setbit({{ *}}#7{{ *}})
- %0 = load i8* %p, align 1
+ %0 = load i8, i8* %p, align 1
%conv2 = zext i8 %0 to i32
%or = or i32 %conv2, 128
%conv1 = trunc i32 %or to i8
@@ -318,8 +318,8 @@ entry:
define void @memop_signed_char_add5_index(i8* nocapture %p, i32 %i) nounwind {
entry:
; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}#5
- %add.ptr = getelementptr inbounds i8* %p, i32 %i
- %0 = load i8* %add.ptr, align 1
+ %add.ptr = getelementptr inbounds i8, i8* %p, i32 %i
+ %0 = load i8, i8* %add.ptr, align 1
%conv2 = zext i8 %0 to i32
%add = add nsw i32 %conv2, 5
%conv1 = trunc i32 %add to i8
@@ -331,8 +331,8 @@ define void @memop_signed_char_add_index(i8* nocapture %p, i32 %i, i8 signext %x
entry:
; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}r{{[0-9]+}}
%conv4 = zext i8 %x to i32
- %add.ptr = getelementptr inbounds i8* %p, i32 %i
- %0 = load i8* %add.ptr, align 1
+ %add.ptr = getelementptr inbounds i8, i8* %p, i32 %i
+ %0 = load i8, i8* %add.ptr, align 1
%conv13 = zext i8 %0 to i32
%add = add nsw i32 %conv13, %conv4
%conv2 = trunc i32 %add to i8
@@ -344,8 +344,8 @@ define void @memop_signed_char_sub_index(i8* nocapture %p, i32 %i, i8 signext %x
entry:
; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}-={{ *}}r{{[0-9]+}}
%conv4 = zext i8 %x to i32
- %add.ptr = getelementptr inbounds i8* %p, i32 %i
- %0 = load i8* %add.ptr, align 1
+ %add.ptr = getelementptr inbounds i8, i8* %p, i32 %i
+ %0 = load i8, i8* %add.ptr, align 1
%conv13 = zext i8 %0 to i32
%sub = sub nsw i32 %conv13, %conv4
%conv2 = trunc i32 %sub to i8
@@ -356,8 +356,8 @@ entry:
define void @memop_signed_char_or_index(i8* nocapture %p, i32 %i, i8 signext %x) nounwind {
entry:
; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}|={{ *}}r{{[0-9]+}}
- %add.ptr = getelementptr inbounds i8* %p, i32 %i
- %0 = load i8* %add.ptr, align 1
+ %add.ptr = getelementptr inbounds i8, i8* %p, i32 %i
+ %0 = load i8, i8* %add.ptr, align 1
%or3 = or i8 %0, %x
store i8 %or3, i8* %add.ptr, align 1
ret void
@@ -366,8 +366,8 @@ entry:
define void @memop_signed_char_and_index(i8* nocapture %p, i32 %i, i8 signext %x) nounwind {
entry:
; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}&={{ *}}r{{[0-9]+}}
- %add.ptr = getelementptr inbounds i8* %p, i32 %i
- %0 = load i8* %add.ptr, align 1
+ %add.ptr = getelementptr inbounds i8, i8* %p, i32 %i
+ %0 = load i8, i8* %add.ptr, align 1
%and3 = and i8 %0, %x
store i8 %and3, i8* %add.ptr, align 1
ret void
@@ -376,8 +376,8 @@ entry:
define void @memop_signed_char_clrbit_index(i8* nocapture %p, i32 %i) nounwind {
entry:
; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}clrbit({{ *}}#5{{ *}})
- %add.ptr = getelementptr inbounds i8* %p, i32 %i
- %0 = load i8* %add.ptr, align 1
+ %add.ptr = getelementptr inbounds i8, i8* %p, i32 %i
+ %0 = load i8, i8* %add.ptr, align 1
%conv2 = zext i8 %0 to i32
%and = and i32 %conv2, 223
%conv1 = trunc i32 %and to i8
@@ -388,8 +388,8 @@ entry:
define void @memop_signed_char_setbit_index(i8* nocapture %p, i32 %i) nounwind {
entry:
; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}setbit({{ *}}#7{{ *}})
- %add.ptr = getelementptr inbounds i8* %p, i32 %i
- %0 = load i8* %add.ptr, align 1
+ %add.ptr = getelementptr inbounds i8, i8* %p, i32 %i
+ %0 = load i8, i8* %add.ptr, align 1
%conv2 = zext i8 %0 to i32
%or = or i32 %conv2, 128
%conv1 = trunc i32 %or to i8
@@ -400,8 +400,8 @@ entry:
define void @memop_signed_char_add5_index5(i8* nocapture %p) nounwind {
entry:
; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#5){{ *}}+={{ *}}#5
- %add.ptr = getelementptr inbounds i8* %p, i32 5
- %0 = load i8* %add.ptr, align 1
+ %add.ptr = getelementptr inbounds i8, i8* %p, i32 5
+ %0 = load i8, i8* %add.ptr, align 1
%conv2 = zext i8 %0 to i32
%add = add nsw i32 %conv2, 5
%conv1 = trunc i32 %add to i8
@@ -413,8 +413,8 @@ define void @memop_signed_char_add_index5(i8* nocapture %p, i8 signext %x) nounw
entry:
; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#5){{ *}}+={{ *}}r{{[0-9]+}}
%conv4 = zext i8 %x to i32
- %add.ptr = getelementptr inbounds i8* %p, i32 5
- %0 = load i8* %add.ptr, align 1
+ %add.ptr = getelementptr inbounds i8, i8* %p, i32 5
+ %0 = load i8, i8* %add.ptr, align 1
%conv13 = zext i8 %0 to i32
%add = add nsw i32 %conv13, %conv4
%conv2 = trunc i32 %add to i8
@@ -426,8 +426,8 @@ define void @memop_signed_char_sub_index5(i8* nocapture %p, i8 signext %x) nounw
entry:
; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#5){{ *}}-={{ *}}r{{[0-9]+}}
%conv4 = zext i8 %x to i32
- %add.ptr = getelementptr inbounds i8* %p, i32 5
- %0 = load i8* %add.ptr, align 1
+ %add.ptr = getelementptr inbounds i8, i8* %p, i32 5
+ %0 = load i8, i8* %add.ptr, align 1
%conv13 = zext i8 %0 to i32
%sub = sub nsw i32 %conv13, %conv4
%conv2 = trunc i32 %sub to i8
@@ -438,8 +438,8 @@ entry:
define void @memop_signed_char_or_index5(i8* nocapture %p, i8 signext %x) nounwind {
entry:
; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#5){{ *}}|={{ *}}r{{[0-9]+}}
- %add.ptr = getelementptr inbounds i8* %p, i32 5
- %0 = load i8* %add.ptr, align 1
+ %add.ptr = getelementptr inbounds i8, i8* %p, i32 5
+ %0 = load i8, i8* %add.ptr, align 1
%or3 = or i8 %0, %x
store i8 %or3, i8* %add.ptr, align 1
ret void
@@ -448,8 +448,8 @@ entry:
define void @memop_signed_char_and_index5(i8* nocapture %p, i8 signext %x) nounwind {
entry:
; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#5){{ *}}&={{ *}}r{{[0-9]+}}
- %add.ptr = getelementptr inbounds i8* %p, i32 5
- %0 = load i8* %add.ptr, align 1
+ %add.ptr = getelementptr inbounds i8, i8* %p, i32 5
+ %0 = load i8, i8* %add.ptr, align 1
%and3 = and i8 %0, %x
store i8 %and3, i8* %add.ptr, align 1
ret void
@@ -458,8 +458,8 @@ entry:
define void @memop_signed_char_clrbit_index5(i8* nocapture %p) nounwind {
entry:
; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#5){{ *}}={{ *}}clrbit({{ *}}#5{{ *}})
- %add.ptr = getelementptr inbounds i8* %p, i32 5
- %0 = load i8* %add.ptr, align 1
+ %add.ptr = getelementptr inbounds i8, i8* %p, i32 5
+ %0 = load i8, i8* %add.ptr, align 1
%conv2 = zext i8 %0 to i32
%and = and i32 %conv2, 223
%conv1 = trunc i32 %and to i8
@@ -470,8 +470,8 @@ entry:
define void @memop_signed_char_setbit_index5(i8* nocapture %p) nounwind {
entry:
; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#5){{ *}}={{ *}}setbit({{ *}}#7{{ *}})
- %add.ptr = getelementptr inbounds i8* %p, i32 5
- %0 = load i8* %add.ptr, align 1
+ %add.ptr = getelementptr inbounds i8, i8* %p, i32 5
+ %0 = load i8, i8* %add.ptr, align 1
%conv2 = zext i8 %0 to i32
%or = or i32 %conv2, 128
%conv1 = trunc i32 %or to i8
@@ -482,7 +482,7 @@ entry:
define void @memop_unsigned_short_add5(i16* nocapture %p) nounwind {
entry:
; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}#5
- %0 = load i16* %p, align 2
+ %0 = load i16, i16* %p, align 2
%conv = zext i16 %0 to i32
%add = add nsw i32 %conv, 5
%conv1 = trunc i32 %add to i16
@@ -494,7 +494,7 @@ define void @memop_unsigned_short_add(i16* nocapture %p, i16 zeroext %x) nounwin
entry:
; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}r{{[0-9]+}}
%conv = zext i16 %x to i32
- %0 = load i16* %p, align 2
+ %0 = load i16, i16* %p, align 2
%conv1 = zext i16 %0 to i32
%add = add nsw i32 %conv1, %conv
%conv2 = trunc i32 %add to i16
@@ -506,7 +506,7 @@ define void @memop_unsigned_short_sub(i16* nocapture %p, i16 zeroext %x) nounwin
entry:
; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}-={{ *}}r{{[0-9]+}}
%conv = zext i16 %x to i32
- %0 = load i16* %p, align 2
+ %0 = load i16, i16* %p, align 2
%conv1 = zext i16 %0 to i32
%sub = sub nsw i32 %conv1, %conv
%conv2 = trunc i32 %sub to i16
@@ -517,7 +517,7 @@ entry:
define void @memop_unsigned_short_or(i16* nocapture %p, i16 zeroext %x) nounwind {
entry:
; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}|={{ *}}r{{[0-9]+}}
- %0 = load i16* %p, align 2
+ %0 = load i16, i16* %p, align 2
%or3 = or i16 %0, %x
store i16 %or3, i16* %p, align 2
ret void
@@ -526,7 +526,7 @@ entry:
define void @memop_unsigned_short_and(i16* nocapture %p, i16 zeroext %x) nounwind {
entry:
; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}&={{ *}}r{{[0-9]+}}
- %0 = load i16* %p, align 2
+ %0 = load i16, i16* %p, align 2
%and3 = and i16 %0, %x
store i16 %and3, i16* %p, align 2
ret void
@@ -535,7 +535,7 @@ entry:
define void @memop_unsigned_short_clrbit(i16* nocapture %p) nounwind {
entry:
; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}clrbit({{ *}}#5{{ *}})
- %0 = load i16* %p, align 2
+ %0 = load i16, i16* %p, align 2
%conv = zext i16 %0 to i32
%and = and i32 %conv, 65503
%conv1 = trunc i32 %and to i16
@@ -546,7 +546,7 @@ entry:
define void @memop_unsigned_short_setbit(i16* nocapture %p) nounwind {
entry:
; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}setbit({{ *}}#7{{ *}})
- %0 = load i16* %p, align 2
+ %0 = load i16, i16* %p, align 2
%conv = zext i16 %0 to i32
%or = or i32 %conv, 128
%conv1 = trunc i32 %or to i16
@@ -557,8 +557,8 @@ entry:
define void @memop_unsigned_short_add5_index(i16* nocapture %p, i32 %i) nounwind {
entry:
; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}#5
- %add.ptr = getelementptr inbounds i16* %p, i32 %i
- %0 = load i16* %add.ptr, align 2
+ %add.ptr = getelementptr inbounds i16, i16* %p, i32 %i
+ %0 = load i16, i16* %add.ptr, align 2
%conv = zext i16 %0 to i32
%add = add nsw i32 %conv, 5
%conv1 = trunc i32 %add to i16
@@ -570,8 +570,8 @@ define void @memop_unsigned_short_add_index(i16* nocapture %p, i32 %i, i16 zeroe
entry:
; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}r{{[0-9]+}}
%conv = zext i16 %x to i32
- %add.ptr = getelementptr inbounds i16* %p, i32 %i
- %0 = load i16* %add.ptr, align 2
+ %add.ptr = getelementptr inbounds i16, i16* %p, i32 %i
+ %0 = load i16, i16* %add.ptr, align 2
%conv1 = zext i16 %0 to i32
%add = add nsw i32 %conv1, %conv
%conv2 = trunc i32 %add to i16
@@ -583,8 +583,8 @@ define void @memop_unsigned_short_sub_index(i16* nocapture %p, i32 %i, i16 zeroe
entry:
; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}-={{ *}}r{{[0-9]+}}
%conv = zext i16 %x to i32
- %add.ptr = getelementptr inbounds i16* %p, i32 %i
- %0 = load i16* %add.ptr, align 2
+ %add.ptr = getelementptr inbounds i16, i16* %p, i32 %i
+ %0 = load i16, i16* %add.ptr, align 2
%conv1 = zext i16 %0 to i32
%sub = sub nsw i32 %conv1, %conv
%conv2 = trunc i32 %sub to i16
@@ -595,8 +595,8 @@ entry:
define void @memop_unsigned_short_or_index(i16* nocapture %p, i32 %i, i16 zeroext %x) nounwind {
entry:
; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}|={{ *}}r{{[0-9]+}}
- %add.ptr = getelementptr inbounds i16* %p, i32 %i
- %0 = load i16* %add.ptr, align 2
+ %add.ptr = getelementptr inbounds i16, i16* %p, i32 %i
+ %0 = load i16, i16* %add.ptr, align 2
%or3 = or i16 %0, %x
store i16 %or3, i16* %add.ptr, align 2
ret void
@@ -605,8 +605,8 @@ entry:
define void @memop_unsigned_short_and_index(i16* nocapture %p, i32 %i, i16 zeroext %x) nounwind {
entry:
; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}&={{ *}}r{{[0-9]+}}
- %add.ptr = getelementptr inbounds i16* %p, i32 %i
- %0 = load i16* %add.ptr, align 2
+ %add.ptr = getelementptr inbounds i16, i16* %p, i32 %i
+ %0 = load i16, i16* %add.ptr, align 2
%and3 = and i16 %0, %x
store i16 %and3, i16* %add.ptr, align 2
ret void
@@ -615,8 +615,8 @@ entry:
define void @memop_unsigned_short_clrbit_index(i16* nocapture %p, i32 %i) nounwind {
entry:
; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}clrbit({{ *}}#5{{ *}})
- %add.ptr = getelementptr inbounds i16* %p, i32 %i
- %0 = load i16* %add.ptr, align 2
+ %add.ptr = getelementptr inbounds i16, i16* %p, i32 %i
+ %0 = load i16, i16* %add.ptr, align 2
%conv = zext i16 %0 to i32
%and = and i32 %conv, 65503
%conv1 = trunc i32 %and to i16
@@ -627,8 +627,8 @@ entry:
define void @memop_unsigned_short_setbit_index(i16* nocapture %p, i32 %i) nounwind {
entry:
; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}setbit({{ *}}#7{{ *}})
- %add.ptr = getelementptr inbounds i16* %p, i32 %i
- %0 = load i16* %add.ptr, align 2
+ %add.ptr = getelementptr inbounds i16, i16* %p, i32 %i
+ %0 = load i16, i16* %add.ptr, align 2
%conv = zext i16 %0 to i32
%or = or i32 %conv, 128
%conv1 = trunc i32 %or to i16
@@ -639,8 +639,8 @@ entry:
define void @memop_unsigned_short_add5_index5(i16* nocapture %p) nounwind {
entry:
; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#10){{ *}}+={{ *}}#5
- %add.ptr = getelementptr inbounds i16* %p, i32 5
- %0 = load i16* %add.ptr, align 2
+ %add.ptr = getelementptr inbounds i16, i16* %p, i32 5
+ %0 = load i16, i16* %add.ptr, align 2
%conv = zext i16 %0 to i32
%add = add nsw i32 %conv, 5
%conv1 = trunc i32 %add to i16
@@ -652,8 +652,8 @@ define void @memop_unsigned_short_add_index5(i16* nocapture %p, i16 zeroext %x)
entry:
; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#10){{ *}}+={{ *}}r{{[0-9]+}}
%conv = zext i16 %x to i32
- %add.ptr = getelementptr inbounds i16* %p, i32 5
- %0 = load i16* %add.ptr, align 2
+ %add.ptr = getelementptr inbounds i16, i16* %p, i32 5
+ %0 = load i16, i16* %add.ptr, align 2
%conv1 = zext i16 %0 to i32
%add = add nsw i32 %conv1, %conv
%conv2 = trunc i32 %add to i16
@@ -665,8 +665,8 @@ define void @memop_unsigned_short_sub_index5(i16* nocapture %p, i16 zeroext %x)
entry:
; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#10){{ *}}-={{ *}}r{{[0-9]+}}
%conv = zext i16 %x to i32
- %add.ptr = getelementptr inbounds i16* %p, i32 5
- %0 = load i16* %add.ptr, align 2
+ %add.ptr = getelementptr inbounds i16, i16* %p, i32 5
+ %0 = load i16, i16* %add.ptr, align 2
%conv1 = zext i16 %0 to i32
%sub = sub nsw i32 %conv1, %conv
%conv2 = trunc i32 %sub to i16
@@ -677,8 +677,8 @@ entry:
define void @memop_unsigned_short_or_index5(i16* nocapture %p, i16 zeroext %x) nounwind {
entry:
; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#10){{ *}}|={{ *}}r{{[0-9]+}}
- %add.ptr = getelementptr inbounds i16* %p, i32 5
- %0 = load i16* %add.ptr, align 2
+ %add.ptr = getelementptr inbounds i16, i16* %p, i32 5
+ %0 = load i16, i16* %add.ptr, align 2
%or3 = or i16 %0, %x
store i16 %or3, i16* %add.ptr, align 2
ret void
@@ -687,8 +687,8 @@ entry:
define void @memop_unsigned_short_and_index5(i16* nocapture %p, i16 zeroext %x) nounwind {
entry:
; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#10){{ *}}&={{ *}}r{{[0-9]+}}
- %add.ptr = getelementptr inbounds i16* %p, i32 5
- %0 = load i16* %add.ptr, align 2
+ %add.ptr = getelementptr inbounds i16, i16* %p, i32 5
+ %0 = load i16, i16* %add.ptr, align 2
%and3 = and i16 %0, %x
store i16 %and3, i16* %add.ptr, align 2
ret void
@@ -697,8 +697,8 @@ entry:
define void @memop_unsigned_short_clrbit_index5(i16* nocapture %p) nounwind {
entry:
; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#10){{ *}}={{ *}}clrbit({{ *}}#5{{ *}})
- %add.ptr = getelementptr inbounds i16* %p, i32 5
- %0 = load i16* %add.ptr, align 2
+ %add.ptr = getelementptr inbounds i16, i16* %p, i32 5
+ %0 = load i16, i16* %add.ptr, align 2
%conv = zext i16 %0 to i32
%and = and i32 %conv, 65503
%conv1 = trunc i32 %and to i16
@@ -709,8 +709,8 @@ entry:
define void @memop_unsigned_short_setbit_index5(i16* nocapture %p) nounwind {
entry:
; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#10){{ *}}={{ *}}setbit({{ *}}#7{{ *}})
- %add.ptr = getelementptr inbounds i16* %p, i32 5
- %0 = load i16* %add.ptr, align 2
+ %add.ptr = getelementptr inbounds i16, i16* %p, i32 5
+ %0 = load i16, i16* %add.ptr, align 2
%conv = zext i16 %0 to i32
%or = or i32 %conv, 128
%conv1 = trunc i32 %or to i16
@@ -721,7 +721,7 @@ entry:
define void @memop_signed_short_add5(i16* nocapture %p) nounwind {
entry:
; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}#5
- %0 = load i16* %p, align 2
+ %0 = load i16, i16* %p, align 2
%conv2 = zext i16 %0 to i32
%add = add nsw i32 %conv2, 5
%conv1 = trunc i32 %add to i16
@@ -733,7 +733,7 @@ define void @memop_signed_short_add(i16* nocapture %p, i16 signext %x) nounwind
entry:
; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}r{{[0-9]+}}
%conv4 = zext i16 %x to i32
- %0 = load i16* %p, align 2
+ %0 = load i16, i16* %p, align 2
%conv13 = zext i16 %0 to i32
%add = add nsw i32 %conv13, %conv4
%conv2 = trunc i32 %add to i16
@@ -745,7 +745,7 @@ define void @memop_signed_short_sub(i16* nocapture %p, i16 signext %x) nounwind
entry:
; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}-={{ *}}r{{[0-9]+}}
%conv4 = zext i16 %x to i32
- %0 = load i16* %p, align 2
+ %0 = load i16, i16* %p, align 2
%conv13 = zext i16 %0 to i32
%sub = sub nsw i32 %conv13, %conv4
%conv2 = trunc i32 %sub to i16
@@ -756,7 +756,7 @@ entry:
define void @memop_signed_short_or(i16* nocapture %p, i16 signext %x) nounwind {
entry:
; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}|={{ *}}r{{[0-9]+}}
- %0 = load i16* %p, align 2
+ %0 = load i16, i16* %p, align 2
%or3 = or i16 %0, %x
store i16 %or3, i16* %p, align 2
ret void
@@ -765,7 +765,7 @@ entry:
define void @memop_signed_short_and(i16* nocapture %p, i16 signext %x) nounwind {
entry:
; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}&={{ *}}r{{[0-9]+}}
- %0 = load i16* %p, align 2
+ %0 = load i16, i16* %p, align 2
%and3 = and i16 %0, %x
store i16 %and3, i16* %p, align 2
ret void
@@ -774,7 +774,7 @@ entry:
define void @memop_signed_short_clrbit(i16* nocapture %p) nounwind {
entry:
; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}clrbit({{ *}}#5{{ *}})
- %0 = load i16* %p, align 2
+ %0 = load i16, i16* %p, align 2
%conv2 = zext i16 %0 to i32
%and = and i32 %conv2, 65503
%conv1 = trunc i32 %and to i16
@@ -785,7 +785,7 @@ entry:
define void @memop_signed_short_setbit(i16* nocapture %p) nounwind {
entry:
; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}setbit({{ *}}#7{{ *}})
- %0 = load i16* %p, align 2
+ %0 = load i16, i16* %p, align 2
%conv2 = zext i16 %0 to i32
%or = or i32 %conv2, 128
%conv1 = trunc i32 %or to i16
@@ -796,8 +796,8 @@ entry:
define void @memop_signed_short_add5_index(i16* nocapture %p, i32 %i) nounwind {
entry:
; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}#5
- %add.ptr = getelementptr inbounds i16* %p, i32 %i
- %0 = load i16* %add.ptr, align 2
+ %add.ptr = getelementptr inbounds i16, i16* %p, i32 %i
+ %0 = load i16, i16* %add.ptr, align 2
%conv2 = zext i16 %0 to i32
%add = add nsw i32 %conv2, 5
%conv1 = trunc i32 %add to i16
@@ -809,8 +809,8 @@ define void @memop_signed_short_add_index(i16* nocapture %p, i32 %i, i16 signext
entry:
; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}r{{[0-9]+}}
%conv4 = zext i16 %x to i32
- %add.ptr = getelementptr inbounds i16* %p, i32 %i
- %0 = load i16* %add.ptr, align 2
+ %add.ptr = getelementptr inbounds i16, i16* %p, i32 %i
+ %0 = load i16, i16* %add.ptr, align 2
%conv13 = zext i16 %0 to i32
%add = add nsw i32 %conv13, %conv4
%conv2 = trunc i32 %add to i16
@@ -822,8 +822,8 @@ define void @memop_signed_short_sub_index(i16* nocapture %p, i32 %i, i16 signext
entry:
; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}-={{ *}}r{{[0-9]+}}
%conv4 = zext i16 %x to i32
- %add.ptr = getelementptr inbounds i16* %p, i32 %i
- %0 = load i16* %add.ptr, align 2
+ %add.ptr = getelementptr inbounds i16, i16* %p, i32 %i
+ %0 = load i16, i16* %add.ptr, align 2
%conv13 = zext i16 %0 to i32
%sub = sub nsw i32 %conv13, %conv4
%conv2 = trunc i32 %sub to i16
@@ -834,8 +834,8 @@ entry:
define void @memop_signed_short_or_index(i16* nocapture %p, i32 %i, i16 signext %x) nounwind {
entry:
; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}|={{ *}}r{{[0-9]+}}
- %add.ptr = getelementptr inbounds i16* %p, i32 %i
- %0 = load i16* %add.ptr, align 2
+ %add.ptr = getelementptr inbounds i16, i16* %p, i32 %i
+ %0 = load i16, i16* %add.ptr, align 2
%or3 = or i16 %0, %x
store i16 %or3, i16* %add.ptr, align 2
ret void
@@ -844,8 +844,8 @@ entry:
define void @memop_signed_short_and_index(i16* nocapture %p, i32 %i, i16 signext %x) nounwind {
entry:
; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}&={{ *}}r{{[0-9]+}}
- %add.ptr = getelementptr inbounds i16* %p, i32 %i
- %0 = load i16* %add.ptr, align 2
+ %add.ptr = getelementptr inbounds i16, i16* %p, i32 %i
+ %0 = load i16, i16* %add.ptr, align 2
%and3 = and i16 %0, %x
store i16 %and3, i16* %add.ptr, align 2
ret void
@@ -854,8 +854,8 @@ entry:
define void @memop_signed_short_clrbit_index(i16* nocapture %p, i32 %i) nounwind {
entry:
; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}clrbit({{ *}}#5{{ *}})
- %add.ptr = getelementptr inbounds i16* %p, i32 %i
- %0 = load i16* %add.ptr, align 2
+ %add.ptr = getelementptr inbounds i16, i16* %p, i32 %i
+ %0 = load i16, i16* %add.ptr, align 2
%conv2 = zext i16 %0 to i32
%and = and i32 %conv2, 65503
%conv1 = trunc i32 %and to i16
@@ -866,8 +866,8 @@ entry:
define void @memop_signed_short_setbit_index(i16* nocapture %p, i32 %i) nounwind {
entry:
; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}setbit({{ *}}#7{{ *}})
- %add.ptr = getelementptr inbounds i16* %p, i32 %i
- %0 = load i16* %add.ptr, align 2
+ %add.ptr = getelementptr inbounds i16, i16* %p, i32 %i
+ %0 = load i16, i16* %add.ptr, align 2
%conv2 = zext i16 %0 to i32
%or = or i32 %conv2, 128
%conv1 = trunc i32 %or to i16
@@ -878,8 +878,8 @@ entry:
define void @memop_signed_short_add5_index5(i16* nocapture %p) nounwind {
entry:
; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#10){{ *}}+={{ *}}#5
- %add.ptr = getelementptr inbounds i16* %p, i32 5
- %0 = load i16* %add.ptr, align 2
+ %add.ptr = getelementptr inbounds i16, i16* %p, i32 5
+ %0 = load i16, i16* %add.ptr, align 2
%conv2 = zext i16 %0 to i32
%add = add nsw i32 %conv2, 5
%conv1 = trunc i32 %add to i16
@@ -891,8 +891,8 @@ define void @memop_signed_short_add_index5(i16* nocapture %p, i16 signext %x) no
entry:
; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#10){{ *}}+={{ *}}r{{[0-9]+}}
%conv4 = zext i16 %x to i32
- %add.ptr = getelementptr inbounds i16* %p, i32 5
- %0 = load i16* %add.ptr, align 2
+ %add.ptr = getelementptr inbounds i16, i16* %p, i32 5
+ %0 = load i16, i16* %add.ptr, align 2
%conv13 = zext i16 %0 to i32
%add = add nsw i32 %conv13, %conv4
%conv2 = trunc i32 %add to i16
@@ -904,8 +904,8 @@ define void @memop_signed_short_sub_index5(i16* nocapture %p, i16 signext %x) no
entry:
; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#10){{ *}}-={{ *}}r{{[0-9]+}}
%conv4 = zext i16 %x to i32
- %add.ptr = getelementptr inbounds i16* %p, i32 5
- %0 = load i16* %add.ptr, align 2
+ %add.ptr = getelementptr inbounds i16, i16* %p, i32 5
+ %0 = load i16, i16* %add.ptr, align 2
%conv13 = zext i16 %0 to i32
%sub = sub nsw i32 %conv13, %conv4
%conv2 = trunc i32 %sub to i16
@@ -916,8 +916,8 @@ entry:
define void @memop_signed_short_or_index5(i16* nocapture %p, i16 signext %x) nounwind {
entry:
; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#10){{ *}}|={{ *}}r{{[0-9]+}}
- %add.ptr = getelementptr inbounds i16* %p, i32 5
- %0 = load i16* %add.ptr, align 2
+ %add.ptr = getelementptr inbounds i16, i16* %p, i32 5
+ %0 = load i16, i16* %add.ptr, align 2
%or3 = or i16 %0, %x
store i16 %or3, i16* %add.ptr, align 2
ret void
@@ -926,8 +926,8 @@ entry:
define void @memop_signed_short_and_index5(i16* nocapture %p, i16 signext %x) nounwind {
entry:
; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#10){{ *}}&={{ *}}r{{[0-9]+}}
- %add.ptr = getelementptr inbounds i16* %p, i32 5
- %0 = load i16* %add.ptr, align 2
+ %add.ptr = getelementptr inbounds i16, i16* %p, i32 5
+ %0 = load i16, i16* %add.ptr, align 2
%and3 = and i16 %0, %x
store i16 %and3, i16* %add.ptr, align 2
ret void
@@ -936,8 +936,8 @@ entry:
define void @memop_signed_short_clrbit_index5(i16* nocapture %p) nounwind {
entry:
; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#10){{ *}}={{ *}}clrbit({{ *}}#5{{ *}})
- %add.ptr = getelementptr inbounds i16* %p, i32 5
- %0 = load i16* %add.ptr, align 2
+ %add.ptr = getelementptr inbounds i16, i16* %p, i32 5
+ %0 = load i16, i16* %add.ptr, align 2
%conv2 = zext i16 %0 to i32
%and = and i32 %conv2, 65503
%conv1 = trunc i32 %and to i16
@@ -948,8 +948,8 @@ entry:
define void @memop_signed_short_setbit_index5(i16* nocapture %p) nounwind {
entry:
; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#10){{ *}}={{ *}}setbit({{ *}}#7{{ *}})
- %add.ptr = getelementptr inbounds i16* %p, i32 5
- %0 = load i16* %add.ptr, align 2
+ %add.ptr = getelementptr inbounds i16, i16* %p, i32 5
+ %0 = load i16, i16* %add.ptr, align 2
%conv2 = zext i16 %0 to i32
%or = or i32 %conv2, 128
%conv1 = trunc i32 %or to i16
@@ -960,7 +960,7 @@ entry:
define void @memop_signed_int_add5(i32* nocapture %p) nounwind {
entry:
; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}#5
- %0 = load i32* %p, align 4
+ %0 = load i32, i32* %p, align 4
%add = add i32 %0, 5
store i32 %add, i32* %p, align 4
ret void
@@ -969,7 +969,7 @@ entry:
define void @memop_signed_int_add(i32* nocapture %p, i32 %x) nounwind {
entry:
; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}r{{[0-9]+}}
- %0 = load i32* %p, align 4
+ %0 = load i32, i32* %p, align 4
%add = add i32 %0, %x
store i32 %add, i32* %p, align 4
ret void
@@ -978,7 +978,7 @@ entry:
define void @memop_signed_int_sub(i32* nocapture %p, i32 %x) nounwind {
entry:
; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}-={{ *}}r{{[0-9]+}}
- %0 = load i32* %p, align 4
+ %0 = load i32, i32* %p, align 4
%sub = sub i32 %0, %x
store i32 %sub, i32* %p, align 4
ret void
@@ -987,7 +987,7 @@ entry:
define void @memop_signed_int_or(i32* nocapture %p, i32 %x) nounwind {
entry:
; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}|={{ *}}r{{[0-9]+}}
- %0 = load i32* %p, align 4
+ %0 = load i32, i32* %p, align 4
%or = or i32 %0, %x
store i32 %or, i32* %p, align 4
ret void
@@ -996,7 +996,7 @@ entry:
define void @memop_signed_int_and(i32* nocapture %p, i32 %x) nounwind {
entry:
; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}&={{ *}}r{{[0-9]+}}
- %0 = load i32* %p, align 4
+ %0 = load i32, i32* %p, align 4
%and = and i32 %0, %x
store i32 %and, i32* %p, align 4
ret void
@@ -1005,7 +1005,7 @@ entry:
define void @memop_signed_int_clrbit(i32* nocapture %p) nounwind {
entry:
; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}clrbit({{ *}}#5{{ *}})
- %0 = load i32* %p, align 4
+ %0 = load i32, i32* %p, align 4
%and = and i32 %0, -33
store i32 %and, i32* %p, align 4
ret void
@@ -1014,7 +1014,7 @@ entry:
define void @memop_signed_int_setbit(i32* nocapture %p) nounwind {
entry:
; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}setbit({{ *}}#7{{ *}})
- %0 = load i32* %p, align 4
+ %0 = load i32, i32* %p, align 4
%or = or i32 %0, 128
store i32 %or, i32* %p, align 4
ret void
@@ -1023,8 +1023,8 @@ entry:
define void @memop_signed_int_add5_index(i32* nocapture %p, i32 %i) nounwind {
entry:
; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}#5
- %add.ptr = getelementptr inbounds i32* %p, i32 %i
- %0 = load i32* %add.ptr, align 4
+ %add.ptr = getelementptr inbounds i32, i32* %p, i32 %i
+ %0 = load i32, i32* %add.ptr, align 4
%add = add i32 %0, 5
store i32 %add, i32* %add.ptr, align 4
ret void
@@ -1033,8 +1033,8 @@ entry:
define void @memop_signed_int_add_index(i32* nocapture %p, i32 %i, i32 %x) nounwind {
entry:
; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}r{{[0-9]+}}
- %add.ptr = getelementptr inbounds i32* %p, i32 %i
- %0 = load i32* %add.ptr, align 4
+ %add.ptr = getelementptr inbounds i32, i32* %p, i32 %i
+ %0 = load i32, i32* %add.ptr, align 4
%add = add i32 %0, %x
store i32 %add, i32* %add.ptr, align 4
ret void
@@ -1043,8 +1043,8 @@ entry:
define void @memop_signed_int_sub_index(i32* nocapture %p, i32 %i, i32 %x) nounwind {
entry:
; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}-={{ *}}r{{[0-9]+}}
- %add.ptr = getelementptr inbounds i32* %p, i32 %i
- %0 = load i32* %add.ptr, align 4
+ %add.ptr = getelementptr inbounds i32, i32* %p, i32 %i
+ %0 = load i32, i32* %add.ptr, align 4
%sub = sub i32 %0, %x
store i32 %sub, i32* %add.ptr, align 4
ret void
@@ -1053,8 +1053,8 @@ entry:
define void @memop_signed_int_or_index(i32* nocapture %p, i32 %i, i32 %x) nounwind {
entry:
; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}|={{ *}}r{{[0-9]+}}
- %add.ptr = getelementptr inbounds i32* %p, i32 %i
- %0 = load i32* %add.ptr, align 4
+ %add.ptr = getelementptr inbounds i32, i32* %p, i32 %i
+ %0 = load i32, i32* %add.ptr, align 4
%or = or i32 %0, %x
store i32 %or, i32* %add.ptr, align 4
ret void
@@ -1063,8 +1063,8 @@ entry:
define void @memop_signed_int_and_index(i32* nocapture %p, i32 %i, i32 %x) nounwind {
entry:
; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}&={{ *}}r{{[0-9]+}}
- %add.ptr = getelementptr inbounds i32* %p, i32 %i
- %0 = load i32* %add.ptr, align 4
+ %add.ptr = getelementptr inbounds i32, i32* %p, i32 %i
+ %0 = load i32, i32* %add.ptr, align 4
%and = and i32 %0, %x
store i32 %and, i32* %add.ptr, align 4
ret void
@@ -1073,8 +1073,8 @@ entry:
define void @memop_signed_int_clrbit_index(i32* nocapture %p, i32 %i) nounwind {
entry:
; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}clrbit({{ *}}#5{{ *}})
- %add.ptr = getelementptr inbounds i32* %p, i32 %i
- %0 = load i32* %add.ptr, align 4
+ %add.ptr = getelementptr inbounds i32, i32* %p, i32 %i
+ %0 = load i32, i32* %add.ptr, align 4
%and = and i32 %0, -33
store i32 %and, i32* %add.ptr, align 4
ret void
@@ -1083,8 +1083,8 @@ entry:
define void @memop_signed_int_setbit_index(i32* nocapture %p, i32 %i) nounwind {
entry:
; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}setbit({{ *}}#7{{ *}})
- %add.ptr = getelementptr inbounds i32* %p, i32 %i
- %0 = load i32* %add.ptr, align 4
+ %add.ptr = getelementptr inbounds i32, i32* %p, i32 %i
+ %0 = load i32, i32* %add.ptr, align 4
%or = or i32 %0, 128
store i32 %or, i32* %add.ptr, align 4
ret void
@@ -1093,8 +1093,8 @@ entry:
define void @memop_signed_int_add5_index5(i32* nocapture %p) nounwind {
entry:
; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#20){{ *}}+={{ *}}#5
- %add.ptr = getelementptr inbounds i32* %p, i32 5
- %0 = load i32* %add.ptr, align 4
+ %add.ptr = getelementptr inbounds i32, i32* %p, i32 5
+ %0 = load i32, i32* %add.ptr, align 4
%add = add i32 %0, 5
store i32 %add, i32* %add.ptr, align 4
ret void
@@ -1103,8 +1103,8 @@ entry:
define void @memop_signed_int_add_index5(i32* nocapture %p, i32 %x) nounwind {
entry:
; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#20){{ *}}+={{ *}}r{{[0-9]+}}
- %add.ptr = getelementptr inbounds i32* %p, i32 5
- %0 = load i32* %add.ptr, align 4
+ %add.ptr = getelementptr inbounds i32, i32* %p, i32 5
+ %0 = load i32, i32* %add.ptr, align 4
%add = add i32 %0, %x
store i32 %add, i32* %add.ptr, align 4
ret void
@@ -1113,8 +1113,8 @@ entry:
define void @memop_signed_int_sub_index5(i32* nocapture %p, i32 %x) nounwind {
entry:
; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#20){{ *}}-={{ *}}r{{[0-9]+}}
- %add.ptr = getelementptr inbounds i32* %p, i32 5
- %0 = load i32* %add.ptr, align 4
+ %add.ptr = getelementptr inbounds i32, i32* %p, i32 5
+ %0 = load i32, i32* %add.ptr, align 4
%sub = sub i32 %0, %x
store i32 %sub, i32* %add.ptr, align 4
ret void
@@ -1123,8 +1123,8 @@ entry:
define void @memop_signed_int_or_index5(i32* nocapture %p, i32 %x) nounwind {
entry:
; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#20){{ *}}|={{ *}}r{{[0-9]+}}
- %add.ptr = getelementptr inbounds i32* %p, i32 5
- %0 = load i32* %add.ptr, align 4
+ %add.ptr = getelementptr inbounds i32, i32* %p, i32 5
+ %0 = load i32, i32* %add.ptr, align 4
%or = or i32 %0, %x
store i32 %or, i32* %add.ptr, align 4
ret void
@@ -1133,8 +1133,8 @@ entry:
define void @memop_signed_int_and_index5(i32* nocapture %p, i32 %x) nounwind {
entry:
; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#20){{ *}}&={{ *}}r{{[0-9]+}}
- %add.ptr = getelementptr inbounds i32* %p, i32 5
- %0 = load i32* %add.ptr, align 4
+ %add.ptr = getelementptr inbounds i32, i32* %p, i32 5
+ %0 = load i32, i32* %add.ptr, align 4
%and = and i32 %0, %x
store i32 %and, i32* %add.ptr, align 4
ret void
@@ -1143,8 +1143,8 @@ entry:
define void @memop_signed_int_clrbit_index5(i32* nocapture %p) nounwind {
entry:
; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#20){{ *}}={{ *}}clrbit({{ *}}#5{{ *}})
- %add.ptr = getelementptr inbounds i32* %p, i32 5
- %0 = load i32* %add.ptr, align 4
+ %add.ptr = getelementptr inbounds i32, i32* %p, i32 5
+ %0 = load i32, i32* %add.ptr, align 4
%and = and i32 %0, -33
store i32 %and, i32* %add.ptr, align 4
ret void
@@ -1153,8 +1153,8 @@ entry:
define void @memop_signed_int_setbit_index5(i32* nocapture %p) nounwind {
entry:
; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#20){{ *}}={{ *}}setbit({{ *}}#7{{ *}})
- %add.ptr = getelementptr inbounds i32* %p, i32 5
- %0 = load i32* %add.ptr, align 4
+ %add.ptr = getelementptr inbounds i32, i32* %p, i32 5
+ %0 = load i32, i32* %add.ptr, align 4
%or = or i32 %0, 128
store i32 %or, i32* %add.ptr, align 4
ret void
@@ -1163,7 +1163,7 @@ entry:
define void @memop_unsigned_int_add5(i32* nocapture %p) nounwind {
entry:
; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}#5
- %0 = load i32* %p, align 4
+ %0 = load i32, i32* %p, align 4
%add = add nsw i32 %0, 5
store i32 %add, i32* %p, align 4
ret void
@@ -1172,7 +1172,7 @@ entry:
define void @memop_unsigned_int_add(i32* nocapture %p, i32 %x) nounwind {
entry:
; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}r{{[0-9]+}}
- %0 = load i32* %p, align 4
+ %0 = load i32, i32* %p, align 4
%add = add nsw i32 %0, %x
store i32 %add, i32* %p, align 4
ret void
@@ -1181,7 +1181,7 @@ entry:
define void @memop_unsigned_int_sub(i32* nocapture %p, i32 %x) nounwind {
entry:
; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}-={{ *}}r{{[0-9]+}}
- %0 = load i32* %p, align 4
+ %0 = load i32, i32* %p, align 4
%sub = sub nsw i32 %0, %x
store i32 %sub, i32* %p, align 4
ret void
@@ -1190,7 +1190,7 @@ entry:
define void @memop_unsigned_int_or(i32* nocapture %p, i32 %x) nounwind {
entry:
; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}|={{ *}}r{{[0-9]+}}
- %0 = load i32* %p, align 4
+ %0 = load i32, i32* %p, align 4
%or = or i32 %0, %x
store i32 %or, i32* %p, align 4
ret void
@@ -1199,7 +1199,7 @@ entry:
define void @memop_unsigned_int_and(i32* nocapture %p, i32 %x) nounwind {
entry:
; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}&={{ *}}r{{[0-9]+}}
- %0 = load i32* %p, align 4
+ %0 = load i32, i32* %p, align 4
%and = and i32 %0, %x
store i32 %and, i32* %p, align 4
ret void
@@ -1208,7 +1208,7 @@ entry:
define void @memop_unsigned_int_clrbit(i32* nocapture %p) nounwind {
entry:
; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}clrbit({{ *}}#5{{ *}})
- %0 = load i32* %p, align 4
+ %0 = load i32, i32* %p, align 4
%and = and i32 %0, -33
store i32 %and, i32* %p, align 4
ret void
@@ -1217,7 +1217,7 @@ entry:
define void @memop_unsigned_int_setbit(i32* nocapture %p) nounwind {
entry:
; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}setbit({{ *}}#7{{ *}})
- %0 = load i32* %p, align 4
+ %0 = load i32, i32* %p, align 4
%or = or i32 %0, 128
store i32 %or, i32* %p, align 4
ret void
@@ -1226,8 +1226,8 @@ entry:
define void @memop_unsigned_int_add5_index(i32* nocapture %p, i32 %i) nounwind {
entry:
; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}#5
- %add.ptr = getelementptr inbounds i32* %p, i32 %i
- %0 = load i32* %add.ptr, align 4
+ %add.ptr = getelementptr inbounds i32, i32* %p, i32 %i
+ %0 = load i32, i32* %add.ptr, align 4
%add = add nsw i32 %0, 5
store i32 %add, i32* %add.ptr, align 4
ret void
@@ -1236,8 +1236,8 @@ entry:
define void @memop_unsigned_int_add_index(i32* nocapture %p, i32 %i, i32 %x) nounwind {
entry:
; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}r{{[0-9]+}}
- %add.ptr = getelementptr inbounds i32* %p, i32 %i
- %0 = load i32* %add.ptr, align 4
+ %add.ptr = getelementptr inbounds i32, i32* %p, i32 %i
+ %0 = load i32, i32* %add.ptr, align 4
%add = add nsw i32 %0, %x
store i32 %add, i32* %add.ptr, align 4
ret void
@@ -1246,8 +1246,8 @@ entry:
define void @memop_unsigned_int_sub_index(i32* nocapture %p, i32 %i, i32 %x) nounwind {
entry:
; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}-={{ *}}r{{[0-9]+}}
- %add.ptr = getelementptr inbounds i32* %p, i32 %i
- %0 = load i32* %add.ptr, align 4
+ %add.ptr = getelementptr inbounds i32, i32* %p, i32 %i
+ %0 = load i32, i32* %add.ptr, align 4
%sub = sub nsw i32 %0, %x
store i32 %sub, i32* %add.ptr, align 4
ret void
@@ -1256,8 +1256,8 @@ entry:
define void @memop_unsigned_int_or_index(i32* nocapture %p, i32 %i, i32 %x) nounwind {
entry:
; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}|={{ *}}r{{[0-9]+}}
- %add.ptr = getelementptr inbounds i32* %p, i32 %i
- %0 = load i32* %add.ptr, align 4
+ %add.ptr = getelementptr inbounds i32, i32* %p, i32 %i
+ %0 = load i32, i32* %add.ptr, align 4
%or = or i32 %0, %x
store i32 %or, i32* %add.ptr, align 4
ret void
@@ -1266,8 +1266,8 @@ entry:
define void @memop_unsigned_int_and_index(i32* nocapture %p, i32 %i, i32 %x) nounwind {
entry:
; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}&={{ *}}r{{[0-9]+}}
- %add.ptr = getelementptr inbounds i32* %p, i32 %i
- %0 = load i32* %add.ptr, align 4
+ %add.ptr = getelementptr inbounds i32, i32* %p, i32 %i
+ %0 = load i32, i32* %add.ptr, align 4
%and = and i32 %0, %x
store i32 %and, i32* %add.ptr, align 4
ret void
@@ -1276,8 +1276,8 @@ entry:
define void @memop_unsigned_int_clrbit_index(i32* nocapture %p, i32 %i) nounwind {
entry:
; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}clrbit({{ *}}#5{{ *}})
- %add.ptr = getelementptr inbounds i32* %p, i32 %i
- %0 = load i32* %add.ptr, align 4
+ %add.ptr = getelementptr inbounds i32, i32* %p, i32 %i
+ %0 = load i32, i32* %add.ptr, align 4
%and = and i32 %0, -33
store i32 %and, i32* %add.ptr, align 4
ret void
@@ -1286,8 +1286,8 @@ entry:
define void @memop_unsigned_int_setbit_index(i32* nocapture %p, i32 %i) nounwind {
entry:
; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}setbit({{ *}}#7{{ *}})
- %add.ptr = getelementptr inbounds i32* %p, i32 %i
- %0 = load i32* %add.ptr, align 4
+ %add.ptr = getelementptr inbounds i32, i32* %p, i32 %i
+ %0 = load i32, i32* %add.ptr, align 4
%or = or i32 %0, 128
store i32 %or, i32* %add.ptr, align 4
ret void
@@ -1296,8 +1296,8 @@ entry:
define void @memop_unsigned_int_add5_index5(i32* nocapture %p) nounwind {
entry:
; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#20){{ *}}+={{ *}}#5
- %add.ptr = getelementptr inbounds i32* %p, i32 5
- %0 = load i32* %add.ptr, align 4
+ %add.ptr = getelementptr inbounds i32, i32* %p, i32 5
+ %0 = load i32, i32* %add.ptr, align 4
%add = add nsw i32 %0, 5
store i32 %add, i32* %add.ptr, align 4
ret void
@@ -1306,8 +1306,8 @@ entry:
define void @memop_unsigned_int_add_index5(i32* nocapture %p, i32 %x) nounwind {
entry:
; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#20){{ *}}+={{ *}}r{{[0-9]+}}
- %add.ptr = getelementptr inbounds i32* %p, i32 5
- %0 = load i32* %add.ptr, align 4
+ %add.ptr = getelementptr inbounds i32, i32* %p, i32 5
+ %0 = load i32, i32* %add.ptr, align 4
%add = add nsw i32 %0, %x
store i32 %add, i32* %add.ptr, align 4
ret void
@@ -1316,8 +1316,8 @@ entry:
define void @memop_unsigned_int_sub_index5(i32* nocapture %p, i32 %x) nounwind {
entry:
; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#20){{ *}}-={{ *}}r{{[0-9]+}}
- %add.ptr = getelementptr inbounds i32* %p, i32 5
- %0 = load i32* %add.ptr, align 4
+ %add.ptr = getelementptr inbounds i32, i32* %p, i32 5
+ %0 = load i32, i32* %add.ptr, align 4
%sub = sub nsw i32 %0, %x
store i32 %sub, i32* %add.ptr, align 4
ret void
@@ -1326,8 +1326,8 @@ entry:
define void @memop_unsigned_int_or_index5(i32* nocapture %p, i32 %x) nounwind {
entry:
; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#20){{ *}}|={{ *}}r{{[0-9]+}}
- %add.ptr = getelementptr inbounds i32* %p, i32 5
- %0 = load i32* %add.ptr, align 4
+ %add.ptr = getelementptr inbounds i32, i32* %p, i32 5
+ %0 = load i32, i32* %add.ptr, align 4
%or = or i32 %0, %x
store i32 %or, i32* %add.ptr, align 4
ret void
@@ -1336,8 +1336,8 @@ entry:
define void @memop_unsigned_int_and_index5(i32* nocapture %p, i32 %x) nounwind {
entry:
; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#20){{ *}}&={{ *}}r{{[0-9]+}}
- %add.ptr = getelementptr inbounds i32* %p, i32 5
- %0 = load i32* %add.ptr, align 4
+ %add.ptr = getelementptr inbounds i32, i32* %p, i32 5
+ %0 = load i32, i32* %add.ptr, align 4
%and = and i32 %0, %x
store i32 %and, i32* %add.ptr, align 4
ret void
@@ -1346,8 +1346,8 @@ entry:
define void @memop_unsigned_int_clrbit_index5(i32* nocapture %p) nounwind {
entry:
; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#20){{ *}}={{ *}}clrbit({{ *}}#5{{ *}})
- %add.ptr = getelementptr inbounds i32* %p, i32 5
- %0 = load i32* %add.ptr, align 4
+ %add.ptr = getelementptr inbounds i32, i32* %p, i32 5
+ %0 = load i32, i32* %add.ptr, align 4
%and = and i32 %0, -33
store i32 %and, i32* %add.ptr, align 4
ret void
@@ -1356,8 +1356,8 @@ entry:
define void @memop_unsigned_int_setbit_index5(i32* nocapture %p) nounwind {
entry:
; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#20){{ *}}={{ *}}setbit({{ *}}#7{{ *}})
- %add.ptr = getelementptr inbounds i32* %p, i32 5
- %0 = load i32* %add.ptr, align 4
+ %add.ptr = getelementptr inbounds i32, i32* %p, i32 5
+ %0 = load i32, i32* %add.ptr, align 4
%or = or i32 %0, 128
store i32 %or, i32* %add.ptr, align 4
ret void
generated by cgit v1.1 at 2024-05-19 03:05:24 +0000