diff options
Diffstat (limited to 'test/CodeGen/MSP430')
24 files changed, 134 insertions, 134 deletions
diff --git a/test/CodeGen/MSP430/2009-11-05-8BitLibcalls.ll b/test/CodeGen/MSP430/2009-11-05-8BitLibcalls.ll index 94fe5c7..dce9d25 100644 --- a/test/CodeGen/MSP430/2009-11-05-8BitLibcalls.ll +++ b/test/CodeGen/MSP430/2009-11-05-8BitLibcalls.ll @@ -7,7 +7,7 @@ target triple = "msp430-elf" define signext i8 @foo(i8 signext %_si1, i8 signext %_si2) nounwind readnone { entry: -; CHECK: foo: +; CHECK-LABEL: foo: ; CHECK: call #__mulqi3 %mul = mul i8 %_si2, %_si1 ; <i8> [#uses=1] ret i8 %mul diff --git a/test/CodeGen/MSP430/AddrMode-bis-rx.ll b/test/CodeGen/MSP430/AddrMode-bis-rx.ll index c7ecb5a..44c92eb 100644 --- a/test/CodeGen/MSP430/AddrMode-bis-rx.ll +++ b/test/CodeGen/MSP430/AddrMode-bis-rx.ll @@ -7,7 +7,7 @@ define i16 @am1(i16 %x, i16* %a) nounwind { %2 = or i16 %1,%x ret i16 %2 } -; CHECK: am1: +; CHECK-LABEL: am1: ; CHECK: bis.w 0(r14), r15 @foo = external global i16 @@ -17,7 +17,7 @@ define i16 @am2(i16 %x) nounwind { %2 = or i16 %1,%x ret i16 %2 } -; CHECK: am2: +; CHECK-LABEL: am2: ; CHECK: bis.w &foo, r15 @bar = internal constant [2 x i8] [ i8 32, i8 64 ] @@ -28,7 +28,7 @@ define i8 @am3(i8 %x, i16 %n) nounwind { %3 = or i8 %2,%x ret i8 %3 } -; CHECK: am3: +; CHECK-LABEL: am3: ; CHECK: bis.b bar(r14), r15 define i16 @am4(i16 %x) nounwind { @@ -36,7 +36,7 @@ define i16 @am4(i16 %x) nounwind { %2 = or i16 %1,%x ret i16 %2 } -; CHECK: am4: +; CHECK-LABEL: am4: ; CHECK: bis.w &32, r15 define i16 @am5(i16 %x, i16* %a) nounwind { @@ -45,7 +45,7 @@ define i16 @am5(i16 %x, i16* %a) nounwind { %3 = or i16 %2,%x ret i16 %3 } -; CHECK: am5: +; CHECK-LABEL: am5: ; CHECK: bis.w 4(r14), r15 %S = type { i16, i16 } @@ -56,7 +56,7 @@ define i16 @am6(i16 %x) nounwind { %2 = or i16 %1,%x ret i16 %2 } -; CHECK: am6: +; CHECK-LABEL: am6: ; CHECK: bis.w &baz+2, r15 %T = type { i16, [2 x i8] } @@ -69,6 +69,6 @@ define i8 @am7(i8 %x, i16 %n) nounwind { %4 = or i8 %3,%x ret i8 %4 } -; CHECK: am7: +; CHECK-LABEL: am7: ; CHECK: bis.b duh+2(r14), r15 diff --git a/test/CodeGen/MSP430/AddrMode-bis-xr.ll b/test/CodeGen/MSP430/AddrMode-bis-xr.ll index 727c29f..06a3d32 100644 --- a/test/CodeGen/MSP430/AddrMode-bis-xr.ll +++ b/test/CodeGen/MSP430/AddrMode-bis-xr.ll @@ -8,7 +8,7 @@ define void @am1(i16* %a, i16 %x) nounwind { store i16 %2, i16* %a ret void } -; CHECK: am1: +; CHECK-LABEL: am1: ; CHECK: bis.w r14, 0(r15) @foo = external global i16 @@ -19,7 +19,7 @@ define void @am2(i16 %x) nounwind { store i16 %2, i16* @foo ret void } -; CHECK: am2: +; CHECK-LABEL: am2: ; CHECK: bis.w r15, &foo @bar = external global [2 x i8] @@ -31,7 +31,7 @@ define void @am3(i16 %i, i8 %x) nounwind { store i8 %3, i8* %1 ret void } -; CHECK: am3: +; CHECK-LABEL: am3: ; CHECK: bis.b r14, bar(r15) define void @am4(i16 %x) nounwind { @@ -40,7 +40,7 @@ define void @am4(i16 %x) nounwind { store volatile i16 %2, i16* inttoptr(i16 32 to i16*) ret void } -; CHECK: am4: +; CHECK-LABEL: am4: ; CHECK: bis.w r15, &32 define void @am5(i16* %a, i16 %x) readonly { @@ -50,7 +50,7 @@ define void @am5(i16* %a, i16 %x) readonly { store i16 %3, i16* %1 ret void } -; CHECK: am5: +; CHECK-LABEL: am5: ; CHECK: bis.w r14, 4(r15) %S = type { i16, i16 } @@ -62,7 +62,7 @@ define void @am6(i16 %x) nounwind { store i16 %2, i16* getelementptr (%S* @baz, i32 0, i32 1) ret void } -; CHECK: am6: +; CHECK-LABEL: am6: ; CHECK: bis.w r15, &baz+2 %T = type { i16, [2 x i8] } @@ -76,6 +76,6 @@ define void @am7(i16 %n, i8 %x) nounwind { store i8 %4, i8* %2 ret void } -; CHECK: am7: +; CHECK-LABEL: am7: ; CHECK: bis.b r14, duh+2(r15) diff --git a/test/CodeGen/MSP430/AddrMode-mov-rx.ll b/test/CodeGen/MSP430/AddrMode-mov-rx.ll index 7cd345b..378b7ae 100644 --- a/test/CodeGen/MSP430/AddrMode-mov-rx.ll +++ b/test/CodeGen/MSP430/AddrMode-mov-rx.ll @@ -6,7 +6,7 @@ define i16 @am1(i16* %a) nounwind { %1 = load i16* %a ret i16 %1 } -; CHECK: am1: +; CHECK-LABEL: am1: ; CHECK: mov.w 0(r15), r15 @foo = external global i16 @@ -15,7 +15,7 @@ define i16 @am2() nounwind { %1 = load i16* @foo ret i16 %1 } -; CHECK: am2: +; CHECK-LABEL: am2: ; CHECK: mov.w &foo, r15 @bar = internal constant [2 x i8] [ i8 32, i8 64 ] @@ -25,14 +25,14 @@ define i8 @am3(i16 %n) nounwind { %2 = load i8* %1 ret i8 %2 } -; CHECK: am3: +; CHECK-LABEL: am3: ; CHECK: mov.b bar(r15), r15 define i16 @am4() nounwind { %1 = load volatile i16* inttoptr(i16 32 to i16*) ret i16 %1 } -; CHECK: am4: +; CHECK-LABEL: am4: ; CHECK: mov.w &32, r15 define i16 @am5(i16* %a) nounwind { @@ -40,7 +40,7 @@ define i16 @am5(i16* %a) nounwind { %2 = load i16* %1 ret i16 %2 } -; CHECK: am5: +; CHECK-LABEL: am5: ; CHECK: mov.w 4(r15), r15 %S = type { i16, i16 } @@ -50,7 +50,7 @@ define i16 @am6() nounwind { %1 = load i16* getelementptr (%S* @baz, i32 0, i32 1) ret i16 %1 } -; CHECK: am6: +; CHECK-LABEL: am6: ; CHECK: mov.w &baz+2, r15 %T = type { i16, [2 x i8] } @@ -62,6 +62,6 @@ define i8 @am7(i16 %n) nounwind { %3= load i8* %2 ret i8 %3 } -; CHECK: am7: +; CHECK-LABEL: am7: ; CHECK: mov.b duh+2(r15), r15 diff --git a/test/CodeGen/MSP430/AddrMode-mov-xr.ll b/test/CodeGen/MSP430/AddrMode-mov-xr.ll index 5eeb02f..f55fd54 100644 --- a/test/CodeGen/MSP430/AddrMode-mov-xr.ll +++ b/test/CodeGen/MSP430/AddrMode-mov-xr.ll @@ -6,7 +6,7 @@ define void @am1(i16* %a, i16 %b) nounwind { store i16 %b, i16* %a ret void } -; CHECK: am1: +; CHECK-LABEL: am1: ; CHECK: mov.w r14, 0(r15) @foo = external global i16 @@ -15,7 +15,7 @@ define void @am2(i16 %a) nounwind { store i16 %a, i16* @foo ret void } -; CHECK: am2: +; CHECK-LABEL: am2: ; CHECK: mov.w r15, &foo @bar = external global [2 x i8] @@ -25,14 +25,14 @@ define void @am3(i16 %i, i8 %a) nounwind { store i8 %a, i8* %1 ret void } -; CHECK: am3: +; CHECK-LABEL: am3: ; CHECK: mov.b r14, bar(r15) define void @am4(i16 %a) nounwind { store volatile i16 %a, i16* inttoptr(i16 32 to i16*) ret void } -; CHECK: am4: +; CHECK-LABEL: am4: ; CHECK: mov.w r15, &32 define void @am5(i16* nocapture %p, i16 %a) nounwind readonly { @@ -40,7 +40,7 @@ define void @am5(i16* nocapture %p, i16 %a) nounwind readonly { store i16 %a, i16* %1 ret void } -; CHECK: am5: +; CHECK-LABEL: am5: ; CHECK: mov.w r14, 4(r15) %S = type { i16, i16 } @@ -50,7 +50,7 @@ define void @am6(i16 %a) nounwind { store i16 %a, i16* getelementptr (%S* @baz, i32 0, i32 1) ret void } -; CHECK: am6: +; CHECK-LABEL: am6: ; CHECK: mov.w r15, &baz+2 %T = type { i16, [2 x i8] } @@ -62,6 +62,6 @@ define void @am7(i16 %n, i8 %a) nounwind { store i8 %a, i8* %2 ret void } -; CHECK: am7: +; CHECK-LABEL: am7: ; CHECK: mov.b r14, duh+2(r15) diff --git a/test/CodeGen/MSP430/Inst16mi.ll b/test/CodeGen/MSP430/Inst16mi.ll index 33d7aa4..e9ab75c 100644 --- a/test/CodeGen/MSP430/Inst16mi.ll +++ b/test/CodeGen/MSP430/Inst16mi.ll @@ -5,14 +5,14 @@ target triple = "msp430-generic-generic" @foo = common global i16 0, align 2 define void @mov() nounwind { -; CHECK: mov: +; CHECK-LABEL: mov: ; CHECK: mov.w #2, &foo store i16 2, i16 * @foo ret void } define void @add() nounwind { -; CHECK: add: +; CHECK-LABEL: add: ; CHECK: add.w #2, &foo %1 = load i16* @foo %2 = add i16 %1, 2 @@ -21,7 +21,7 @@ define void @add() nounwind { } define void @and() nounwind { -; CHECK: and: +; CHECK-LABEL: and: ; CHECK: and.w #2, &foo %1 = load i16* @foo %2 = and i16 %1, 2 @@ -30,7 +30,7 @@ define void @and() nounwind { } define void @bis() nounwind { -; CHECK: bis: +; CHECK-LABEL: bis: ; CHECK: bis.w #2, &foo %1 = load i16* @foo %2 = or i16 %1, 2 @@ -39,7 +39,7 @@ define void @bis() nounwind { } define void @xor() nounwind { -; CHECK: xor: +; CHECK-LABEL: xor: ; CHECK: xor.w #2, &foo %1 = load i16* @foo %2 = xor i16 %1, 2 diff --git a/test/CodeGen/MSP430/Inst16mm.ll b/test/CodeGen/MSP430/Inst16mm.ll index d4ae811..5c93e37 100644 --- a/test/CodeGen/MSP430/Inst16mm.ll +++ b/test/CodeGen/MSP430/Inst16mm.ll @@ -5,7 +5,7 @@ target triple = "msp430-generic-generic" @bar = common global i16 0, align 2 define void @mov() nounwind { -; CHECK: mov: +; CHECK-LABEL: mov: ; CHECK: mov.w &bar, &foo %1 = load i16* @bar store i16 %1, i16* @foo @@ -13,7 +13,7 @@ define void @mov() nounwind { } define void @add() nounwind { -; CHECK: add: +; CHECK-LABEL: add: ; CHECK: add.w &bar, &foo %1 = load i16* @bar %2 = load i16* @foo @@ -23,7 +23,7 @@ define void @add() nounwind { } define void @and() nounwind { -; CHECK: and: +; CHECK-LABEL: and: ; CHECK: and.w &bar, &foo %1 = load i16* @bar %2 = load i16* @foo @@ -33,7 +33,7 @@ define void @and() nounwind { } define void @bis() nounwind { -; CHECK: bis: +; CHECK-LABEL: bis: ; CHECK: bis.w &bar, &foo %1 = load i16* @bar %2 = load i16* @foo @@ -43,7 +43,7 @@ define void @bis() nounwind { } define void @xor() nounwind { -; CHECK: xor: +; CHECK-LABEL: xor: ; CHECK: xor.w &bar, &foo %1 = load i16* @bar %2 = load i16* @foo @@ -63,7 +63,7 @@ entry: store i16 0, i16* %retval %0 = load i16* %retval ; <i16> [#uses=1] ret i16 %0 -; CHECK: mov2: +; CHECK-LABEL: mov2: ; CHECK: mov.w 2(r1), 6(r1) ; CHECK: mov.w 0(r1), 4(r1) } diff --git a/test/CodeGen/MSP430/Inst16mr.ll b/test/CodeGen/MSP430/Inst16mr.ll index 2613f01..2010048 100644 --- a/test/CodeGen/MSP430/Inst16mr.ll +++ b/test/CodeGen/MSP430/Inst16mr.ll @@ -4,14 +4,14 @@ target triple = "msp430-generic-generic" @foo = common global i16 0, align 2 define void @mov(i16 %a) nounwind { -; CHECK: mov: +; CHECK-LABEL: mov: ; CHECK: mov.w r15, &foo store i16 %a, i16* @foo ret void } define void @add(i16 %a) nounwind { -; CHECK: add: +; CHECK-LABEL: add: ; CHECK: add.w r15, &foo %1 = load i16* @foo %2 = add i16 %a, %1 @@ -20,7 +20,7 @@ define void @add(i16 %a) nounwind { } define void @and(i16 %a) nounwind { -; CHECK: and: +; CHECK-LABEL: and: ; CHECK: and.w r15, &foo %1 = load i16* @foo %2 = and i16 %a, %1 @@ -29,7 +29,7 @@ define void @and(i16 %a) nounwind { } define void @bis(i16 %a) nounwind { -; CHECK: bis: +; CHECK-LABEL: bis: ; CHECK: bis.w r15, &foo %1 = load i16* @foo %2 = or i16 %a, %1 @@ -38,7 +38,7 @@ define void @bis(i16 %a) nounwind { } define void @bic(i16 zeroext %m) nounwind { -; CHECK: bic: +; CHECK-LABEL: bic: ; CHECK: bic.w r15, &foo %1 = xor i16 %m, -1 %2 = load i16* @foo @@ -48,7 +48,7 @@ define void @bic(i16 zeroext %m) nounwind { } define void @xor(i16 %a) nounwind { -; CHECK: xor: +; CHECK-LABEL: xor: ; CHECK: xor.w r15, &foo %1 = load i16* @foo %2 = xor i16 %a, %1 diff --git a/test/CodeGen/MSP430/Inst16ri.ll b/test/CodeGen/MSP430/Inst16ri.ll index 5115a23..f89f686 100644 --- a/test/CodeGen/MSP430/Inst16ri.ll +++ b/test/CodeGen/MSP430/Inst16ri.ll @@ -3,34 +3,34 @@ target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8" target triple = "msp430-generic-generic" define i16 @mov() nounwind { -; CHECK: mov: +; CHECK-LABEL: mov: ; CHECK: mov.w #1, r15 ret i16 1 } define i16 @add(i16 %a, i16 %b) nounwind { -; CHECK: add: +; CHECK-LABEL: add: ; CHECK: add.w #1, r15 %1 = add i16 %a, 1 ret i16 %1 } define i16 @and(i16 %a, i16 %b) nounwind { -; CHECK: and: +; CHECK-LABEL: and: ; CHECK: and.w #1, r15 %1 = and i16 %a, 1 ret i16 %1 } define i16 @bis(i16 %a, i16 %b) nounwind { -; CHECK: bis: +; CHECK-LABEL: bis: ; CHECK: bis.w #1, r15 %1 = or i16 %a, 1 ret i16 %1 } define i16 @xor(i16 %a, i16 %b) nounwind { -; CHECK: xor: +; CHECK-LABEL: xor: ; CHECK: xor.w #1, r15 %1 = xor i16 %a, 1 ret i16 %1 diff --git a/test/CodeGen/MSP430/Inst16rm.ll b/test/CodeGen/MSP430/Inst16rm.ll index 02e89c7..e6c5261 100644 --- a/test/CodeGen/MSP430/Inst16rm.ll +++ b/test/CodeGen/MSP430/Inst16rm.ll @@ -4,7 +4,7 @@ target triple = "msp430-generic-generic" @foo = common global i16 0, align 2 define i16 @add(i16 %a) nounwind { -; CHECK: add: +; CHECK-LABEL: add: ; CHECK: add.w &foo, r15 %1 = load i16* @foo %2 = add i16 %a, %1 @@ -12,7 +12,7 @@ define i16 @add(i16 %a) nounwind { } define i16 @and(i16 %a) nounwind { -; CHECK: and: +; CHECK-LABEL: and: ; CHECK: and.w &foo, r15 %1 = load i16* @foo %2 = and i16 %a, %1 @@ -20,7 +20,7 @@ define i16 @and(i16 %a) nounwind { } define i16 @bis(i16 %a) nounwind { -; CHECK: bis: +; CHECK-LABEL: bis: ; CHECK: bis.w &foo, r15 %1 = load i16* @foo %2 = or i16 %a, %1 @@ -28,7 +28,7 @@ define i16 @bis(i16 %a) nounwind { } define i16 @bic(i16 %a) nounwind { -; CHECK: bic: +; CHECK-LABEL: bic: ; CHECK: bic.w &foo, r15 %1 = load i16* @foo %2 = xor i16 %1, -1 @@ -37,7 +37,7 @@ define i16 @bic(i16 %a) nounwind { } define i16 @xor(i16 %a) nounwind { -; CHECK: xor: +; CHECK-LABEL: xor: ; CHECK: xor.w &foo, r15 %1 = load i16* @foo %2 = xor i16 %a, %1 diff --git a/test/CodeGen/MSP430/Inst16rr.ll b/test/CodeGen/MSP430/Inst16rr.ll index 2f1ba5b..d74bfae 100644 --- a/test/CodeGen/MSP430/Inst16rr.ll +++ b/test/CodeGen/MSP430/Inst16rr.ll @@ -3,34 +3,34 @@ target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8" target triple = "msp430-generic-generic" define i16 @mov(i16 %a, i16 %b) nounwind { -; CHECK: mov: +; CHECK-LABEL: mov: ; CHECK: mov.w r14, r15 ret i16 %b } define i16 @add(i16 %a, i16 %b) nounwind { -; CHECK: add: +; CHECK-LABEL: add: ; CHECK: add.w r14, r15 %1 = add i16 %a, %b ret i16 %1 } define i16 @and(i16 %a, i16 %b) nounwind { -; CHECK: and: +; CHECK-LABEL: and: ; CHECK: and.w r14, r15 %1 = and i16 %a, %b ret i16 %1 } define i16 @bis(i16 %a, i16 %b) nounwind { -; CHECK: bis: +; CHECK-LABEL: bis: ; CHECK: bis.w r14, r15 %1 = or i16 %a, %b ret i16 %1 } define i16 @bic(i16 %a, i16 %b) nounwind { -; CHECK: bic: +; CHECK-LABEL: bic: ; CHECK: bic.w r14, r15 %1 = xor i16 %b, -1 %2 = and i16 %a, %1 @@ -38,7 +38,7 @@ define i16 @bic(i16 %a, i16 %b) nounwind { } define i16 @xor(i16 %a, i16 %b) nounwind { -; CHECK: xor: +; CHECK-LABEL: xor: ; CHECK: xor.w r14, r15 %1 = xor i16 %a, %b ret i16 %1 diff --git a/test/CodeGen/MSP430/Inst8mi.ll b/test/CodeGen/MSP430/Inst8mi.ll index ef318ce..a2c7b71 100644 --- a/test/CodeGen/MSP430/Inst8mi.ll +++ b/test/CodeGen/MSP430/Inst8mi.ll @@ -4,14 +4,14 @@ target triple = "msp430-generic-generic" @foo = common global i8 0, align 1 define void @mov() nounwind { -; CHECK: mov: +; CHECK-LABEL: mov: ; CHECK: mov.b #2, &foo store i8 2, i8 * @foo ret void } define void @add() nounwind { -; CHECK: add: +; CHECK-LABEL: add: ; CHECK: add.b #2, &foo %1 = load i8* @foo %2 = add i8 %1, 2 @@ -20,7 +20,7 @@ define void @add() nounwind { } define void @and() nounwind { -; CHECK: and: +; CHECK-LABEL: and: ; CHECK: and.b #2, &foo %1 = load i8* @foo %2 = and i8 %1, 2 @@ -29,7 +29,7 @@ define void @and() nounwind { } define void @bis() nounwind { -; CHECK: bis: +; CHECK-LABEL: bis: ; CHECK: bis.b #2, &foo %1 = load i8* @foo %2 = or i8 %1, 2 @@ -38,7 +38,7 @@ define void @bis() nounwind { } define void @xor() nounwind { -; CHECK: xor: +; CHECK-LABEL: xor: ; CHECK: xor.b #2, &foo %1 = load i8* @foo %2 = xor i8 %1, 2 diff --git a/test/CodeGen/MSP430/Inst8mm.ll b/test/CodeGen/MSP430/Inst8mm.ll index a2987ac..d1ce8bc 100644 --- a/test/CodeGen/MSP430/Inst8mm.ll +++ b/test/CodeGen/MSP430/Inst8mm.ll @@ -6,7 +6,7 @@ target triple = "msp430-generic-generic" @bar = common global i8 0, align 1 define void @mov() nounwind { -; CHECK: mov: +; CHECK-LABEL: mov: ; CHECK: mov.b &bar, &foo %1 = load i8* @bar store i8 %1, i8* @foo @@ -14,7 +14,7 @@ define void @mov() nounwind { } define void @add() nounwind { -; CHECK: add: +; CHECK-LABEL: add: ; CHECK: add.b &bar, &foo %1 = load i8* @bar %2 = load i8* @foo @@ -24,7 +24,7 @@ define void @add() nounwind { } define void @and() nounwind { -; CHECK: and: +; CHECK-LABEL: and: ; CHECK: and.b &bar, &foo %1 = load i8* @bar %2 = load i8* @foo @@ -34,7 +34,7 @@ define void @and() nounwind { } define void @bis() nounwind { -; CHECK: bis: +; CHECK-LABEL: bis: ; CHECK: bis.b &bar, &foo %1 = load i8* @bar %2 = load i8* @foo @@ -44,7 +44,7 @@ define void @bis() nounwind { } define void @xor() nounwind { -; CHECK: xor: +; CHECK-LABEL: xor: ; CHECK: xor.b &bar, &foo %1 = load i8* @bar %2 = load i8* @foo diff --git a/test/CodeGen/MSP430/Inst8mr.ll b/test/CodeGen/MSP430/Inst8mr.ll index 428d1fa..0b35667 100644 --- a/test/CodeGen/MSP430/Inst8mr.ll +++ b/test/CodeGen/MSP430/Inst8mr.ll @@ -4,14 +4,14 @@ target triple = "msp430-generic-generic" @foo = common global i8 0, align 1 define void @mov(i8 %a) nounwind { -; CHECK: mov: +; CHECK-LABEL: mov: ; CHECK: mov.b r15, &foo store i8 %a, i8* @foo ret void } define void @and(i8 %a) nounwind { -; CHECK: and: +; CHECK-LABEL: and: ; CHECK: and.b r15, &foo %1 = load i8* @foo %2 = and i8 %a, %1 @@ -20,7 +20,7 @@ define void @and(i8 %a) nounwind { } define void @add(i8 %a) nounwind { -; CHECK: add: +; CHECK-LABEL: add: ; CHECK: add.b r15, &foo %1 = load i8* @foo %2 = add i8 %a, %1 @@ -29,7 +29,7 @@ define void @add(i8 %a) nounwind { } define void @bis(i8 %a) nounwind { -; CHECK: bis: +; CHECK-LABEL: bis: ; CHECK: bis.b r15, &foo %1 = load i8* @foo %2 = or i8 %a, %1 @@ -38,7 +38,7 @@ define void @bis(i8 %a) nounwind { } define void @bic(i8 zeroext %m) nounwind { -; CHECK: bic: +; CHECK-LABEL: bic: ; CHECK: bic.b r15, &foo %1 = xor i8 %m, -1 %2 = load i8* @foo @@ -48,7 +48,7 @@ define void @bic(i8 zeroext %m) nounwind { } define void @xor(i8 %a) nounwind { -; CHECK: xor: +; CHECK-LABEL: xor: ; CHECK: xor.b r15, &foo %1 = load i8* @foo %2 = xor i8 %a, %1 diff --git a/test/CodeGen/MSP430/Inst8ri.ll b/test/CodeGen/MSP430/Inst8ri.ll index ac3418a..ec0dff9 100644 --- a/test/CodeGen/MSP430/Inst8ri.ll +++ b/test/CodeGen/MSP430/Inst8ri.ll @@ -3,34 +3,34 @@ target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8" target triple = "msp430-generic-generic" define i8 @mov() nounwind { -; CHECK: mov: +; CHECK-LABEL: mov: ; CHECK: mov.b #1, r15 ret i8 1 } define i8 @add(i8 %a, i8 %b) nounwind { -; CHECK: add: +; CHECK-LABEL: add: ; CHECK: add.b #1, r15 %1 = add i8 %a, 1 ret i8 %1 } define i8 @and(i8 %a, i8 %b) nounwind { -; CHECK: and: +; CHECK-LABEL: and: ; CHECK: and.b #1, r15 %1 = and i8 %a, 1 ret i8 %1 } define i8 @bis(i8 %a, i8 %b) nounwind { -; CHECK: bis: +; CHECK-LABEL: bis: ; CHECK: bis.b #1, r15 %1 = or i8 %a, 1 ret i8 %1 } define i8 @xor(i8 %a, i8 %b) nounwind { -; CHECK: xor: +; CHECK-LABEL: xor: ; CHECK: xor.b #1, r15 %1 = xor i8 %a, 1 ret i8 %1 diff --git a/test/CodeGen/MSP430/Inst8rm.ll b/test/CodeGen/MSP430/Inst8rm.ll index c062f04..308163e 100644 --- a/test/CodeGen/MSP430/Inst8rm.ll +++ b/test/CodeGen/MSP430/Inst8rm.ll @@ -4,7 +4,7 @@ target triple = "msp430-generic-generic" @foo = common global i8 0, align 1 define i8 @add(i8 %a) nounwind { -; CHECK: add: +; CHECK-LABEL: add: ; CHECK: add.b &foo, r15 %1 = load i8* @foo %2 = add i8 %a, %1 @@ -12,7 +12,7 @@ define i8 @add(i8 %a) nounwind { } define i8 @and(i8 %a) nounwind { -; CHECK: and: +; CHECK-LABEL: and: ; CHECK: and.b &foo, r15 %1 = load i8* @foo %2 = and i8 %a, %1 @@ -20,7 +20,7 @@ define i8 @and(i8 %a) nounwind { } define i8 @bis(i8 %a) nounwind { -; CHECK: bis: +; CHECK-LABEL: bis: ; CHECK: bis.b &foo, r15 %1 = load i8* @foo %2 = or i8 %a, %1 @@ -28,7 +28,7 @@ define i8 @bis(i8 %a) nounwind { } define i8 @bic(i8 %a) nounwind { -; CHECK: bic: +; CHECK-LABEL: bic: ; CHECK: bic.b &foo, r15 %1 = load i8* @foo %2 = xor i8 %1, -1 @@ -37,7 +37,7 @@ define i8 @bic(i8 %a) nounwind { } define i8 @xor(i8 %a) nounwind { -; CHECK: xor: +; CHECK-LABEL: xor: ; CHECK: xor.b &foo, r15 %1 = load i8* @foo %2 = xor i8 %a, %1 diff --git a/test/CodeGen/MSP430/Inst8rr.ll b/test/CodeGen/MSP430/Inst8rr.ll index b9c17d9..76e8d19 100644 --- a/test/CodeGen/MSP430/Inst8rr.ll +++ b/test/CodeGen/MSP430/Inst8rr.ll @@ -3,34 +3,34 @@ target datalayout = "e-p:16:8:8-i8:8:8-i8:8:8-i32:8:8" target triple = "msp430-generic-generic" define i8 @mov(i8 %a, i8 %b) nounwind { -; CHECK: mov: +; CHECK-LABEL: mov: ; CHECK: mov.{{[bw]}} r14, r15 ret i8 %b } define i8 @add(i8 %a, i8 %b) nounwind { -; CHECK: add: +; CHECK-LABEL: add: ; CHECK: add.b %1 = add i8 %a, %b ret i8 %1 } define i8 @and(i8 %a, i8 %b) nounwind { -; CHECK: and: +; CHECK-LABEL: and: ; CHECK: and.w r14, r15 %1 = and i8 %a, %b ret i8 %1 } define i8 @bis(i8 %a, i8 %b) nounwind { -; CHECK: bis: +; CHECK-LABEL: bis: ; CHECK: bis.w r14, r15 %1 = or i8 %a, %b ret i8 %1 } define i8 @bic(i8 %a, i8 %b) nounwind { -; CHECK: bic: +; CHECK-LABEL: bic: ; CHECK: bic.b r14, r15 %1 = xor i8 %b, -1 %2 = and i8 %a, %1 @@ -38,7 +38,7 @@ define i8 @bic(i8 %a, i8 %b) nounwind { } define i8 @xor(i8 %a, i8 %b) nounwind { -; CHECK: xor: +; CHECK-LABEL: xor: ; CHECK: xor.w r14, r15 %1 = xor i8 %a, %b ret i8 %1 diff --git a/test/CodeGen/MSP430/bit.ll b/test/CodeGen/MSP430/bit.ll index 03d672b..2ffc191 100644 --- a/test/CodeGen/MSP430/bit.ll +++ b/test/CodeGen/MSP430/bit.ll @@ -11,7 +11,7 @@ define i8 @bitbrr(i8 %a, i8 %b) nounwind { %t3 = zext i1 %t2 to i8 ret i8 %t3 } -; CHECK: bitbrr: +; CHECK-LABEL: bitbrr: ; CHECK: bit.b r14, r15 define i8 @bitbri(i8 %a) nounwind { @@ -20,7 +20,7 @@ define i8 @bitbri(i8 %a) nounwind { %t3 = zext i1 %t2 to i8 ret i8 %t3 } -; CHECK: bitbri: +; CHECK-LABEL: bitbri: ; CHECK: bit.b #15, r15 define i8 @bitbir(i8 %a) nounwind { @@ -29,7 +29,7 @@ define i8 @bitbir(i8 %a) nounwind { %t3 = zext i1 %t2 to i8 ret i8 %t3 } -; CHECK: bitbir: +; CHECK-LABEL: bitbir: ; CHECK: bit.b #15, r15 define i8 @bitbmi() nounwind { @@ -39,7 +39,7 @@ define i8 @bitbmi() nounwind { %t4 = zext i1 %t3 to i8 ret i8 %t4 } -; CHECK: bitbmi: +; CHECK-LABEL: bitbmi: ; CHECK: bit.b #15, &foo8 define i8 @bitbim() nounwind { @@ -49,7 +49,7 @@ define i8 @bitbim() nounwind { %t4 = zext i1 %t3 to i8 ret i8 %t4 } -; CHECK: bitbim: +; CHECK-LABEL: bitbim: ; CHECK: bit.b #15, &foo8 define i8 @bitbrm(i8 %a) nounwind { @@ -59,7 +59,7 @@ define i8 @bitbrm(i8 %a) nounwind { %t4 = zext i1 %t3 to i8 ret i8 %t4 } -; CHECK: bitbrm: +; CHECK-LABEL: bitbrm: ; CHECK: bit.b &foo8, r15 define i8 @bitbmr(i8 %a) nounwind { @@ -69,7 +69,7 @@ define i8 @bitbmr(i8 %a) nounwind { %t4 = zext i1 %t3 to i8 ret i8 %t4 } -; CHECK: bitbmr: +; CHECK-LABEL: bitbmr: ; CHECK: bit.b r15, &foo8 define i8 @bitbmm() nounwind { @@ -80,7 +80,7 @@ define i8 @bitbmm() nounwind { %t5 = zext i1 %t4 to i8 ret i8 %t5 } -; CHECK: bitbmm: +; CHECK-LABEL: bitbmm: ; CHECK: bit.b &bar8, &foo8 @foo16 = external global i16 @@ -92,7 +92,7 @@ define i16 @bitwrr(i16 %a, i16 %b) nounwind { %t3 = zext i1 %t2 to i16 ret i16 %t3 } -; CHECK: bitwrr: +; CHECK-LABEL: bitwrr: ; CHECK: bit.w r14, r15 define i16 @bitwri(i16 %a) nounwind { @@ -101,7 +101,7 @@ define i16 @bitwri(i16 %a) nounwind { %t3 = zext i1 %t2 to i16 ret i16 %t3 } -; CHECK: bitwri: +; CHECK-LABEL: bitwri: ; CHECK: bit.w #4080, r15 define i16 @bitwir(i16 %a) nounwind { @@ -110,7 +110,7 @@ define i16 @bitwir(i16 %a) nounwind { %t3 = zext i1 %t2 to i16 ret i16 %t3 } -; CHECK: bitwir: +; CHECK-LABEL: bitwir: ; CHECK: bit.w #4080, r15 define i16 @bitwmi() nounwind { @@ -120,7 +120,7 @@ define i16 @bitwmi() nounwind { %t4 = zext i1 %t3 to i16 ret i16 %t4 } -; CHECK: bitwmi: +; CHECK-LABEL: bitwmi: ; CHECK: bit.w #4080, &foo16 define i16 @bitwim() nounwind { @@ -130,7 +130,7 @@ define i16 @bitwim() nounwind { %t4 = zext i1 %t3 to i16 ret i16 %t4 } -; CHECK: bitwim: +; CHECK-LABEL: bitwim: ; CHECK: bit.w #4080, &foo16 define i16 @bitwrm(i16 %a) nounwind { @@ -140,7 +140,7 @@ define i16 @bitwrm(i16 %a) nounwind { %t4 = zext i1 %t3 to i16 ret i16 %t4 } -; CHECK: bitwrm: +; CHECK-LABEL: bitwrm: ; CHECK: bit.w &foo16, r15 define i16 @bitwmr(i16 %a) nounwind { @@ -150,7 +150,7 @@ define i16 @bitwmr(i16 %a) nounwind { %t4 = zext i1 %t3 to i16 ret i16 %t4 } -; CHECK: bitwmr: +; CHECK-LABEL: bitwmr: ; CHECK: bit.w r15, &foo16 define i16 @bitwmm() nounwind { @@ -161,6 +161,6 @@ define i16 @bitwmm() nounwind { %t5 = zext i1 %t4 to i16 ret i16 %t5 } -; CHECK: bitwmm: +; CHECK-LABEL: bitwmm: ; CHECK: bit.w &bar16, &foo16 diff --git a/test/CodeGen/MSP430/byval.ll b/test/CodeGen/MSP430/byval.ll index 9dda0a0..bd38e95 100644 --- a/test/CodeGen/MSP430/byval.ll +++ b/test/CodeGen/MSP430/byval.ll @@ -8,7 +8,7 @@ target triple = "msp430---elf" define i16 @callee(%struct.Foo* byval %f) nounwind { entry: -; CHECK: callee: +; CHECK-LABEL: callee: ; CHECK: mov.w 2(r1), r15 %0 = getelementptr inbounds %struct.Foo* %f, i32 0, i32 0 %1 = load i16* %0, align 2 @@ -17,7 +17,7 @@ entry: define void @caller() nounwind { entry: -; CHECK: caller: +; CHECK-LABEL: caller: ; CHECK: mov.w &foo+4, 4(r1) ; CHECK-NEXT: mov.w &foo+2, 2(r1) ; CHECK-NEXT: mov.w &foo, 0(r1) diff --git a/test/CodeGen/MSP430/fp.ll b/test/CodeGen/MSP430/fp.ll index c3273ef..0180905 100644 --- a/test/CodeGen/MSP430/fp.ll +++ b/test/CodeGen/MSP430/fp.ll @@ -5,7 +5,7 @@ target triple = "msp430---elf" define void @fp() nounwind { entry: -; CHECK: fp: +; CHECK-LABEL: fp: ; CHECK: push.w r4 ; CHECK: mov.w r1, r4 ; CHECK: sub.w #2, r1 diff --git a/test/CodeGen/MSP430/postinc.ll b/test/CodeGen/MSP430/postinc.ll index 8f01b83..8d55fd3 100644 --- a/test/CodeGen/MSP430/postinc.ll +++ b/test/CodeGen/MSP430/postinc.ll @@ -11,7 +11,7 @@ for.body: ; preds = %for.body, %entry %i.010 = phi i16 [ 0, %entry ], [ %inc, %for.body ] ; <i16> [#uses=2] %sum.09 = phi i16 [ 0, %entry ], [ %add, %for.body ] ; <i16> [#uses=1] %arrayidx = getelementptr i16* %a, i16 %i.010 ; <i16*> [#uses=1] -; CHECK: add: +; CHECK-LABEL: add: ; CHECK: add.w @r{{[0-9]+}}+, r{{[0-9]+}} %tmp4 = load i16* %arrayidx ; <i16> [#uses=1] %add = add i16 %tmp4, %sum.09 ; <i16> [#uses=2] @@ -33,7 +33,7 @@ for.body: ; preds = %for.body, %entry %i.010 = phi i16 [ 0, %entry ], [ %inc, %for.body ] ; <i16> [#uses=2] %sum.09 = phi i16 [ 0, %entry ], [ %add, %for.body ] ; <i16> [#uses=1] %arrayidx = getelementptr i16* %a, i16 %i.010 ; <i16*> [#uses=1] -; CHECK: sub: +; CHECK-LABEL: sub: ; CHECK: sub.w @r{{[0-9]+}}+, r{{[0-9]+}} %tmp4 = load i16* %arrayidx ; <i16> [#uses=1] %add = sub i16 %tmp4, %sum.09 ; <i16> [#uses=2] @@ -55,7 +55,7 @@ for.body: ; preds = %for.body, %entry %i.010 = phi i16 [ 0, %entry ], [ %inc, %for.body ] ; <i16> [#uses=2] %sum.09 = phi i16 [ 0, %entry ], [ %add, %for.body ] ; <i16> [#uses=1] %arrayidx = getelementptr i16* %a, i16 %i.010 ; <i16*> [#uses=1] -; CHECK: or: +; CHECK-LABEL: or: ; CHECK: bis.w @r{{[0-9]+}}+, r{{[0-9]+}} %tmp4 = load i16* %arrayidx ; <i16> [#uses=1] %add = or i16 %tmp4, %sum.09 ; <i16> [#uses=2] @@ -77,7 +77,7 @@ for.body: ; preds = %for.body, %entry %i.010 = phi i16 [ 0, %entry ], [ %inc, %for.body ] ; <i16> [#uses=2] %sum.09 = phi i16 [ 0, %entry ], [ %add, %for.body ] ; <i16> [#uses=1] %arrayidx = getelementptr i16* %a, i16 %i.010 ; <i16*> [#uses=1] -; CHECK: xor: +; CHECK-LABEL: xor: ; CHECK: xor.w @r{{[0-9]+}}+, r{{[0-9]+}} %tmp4 = load i16* %arrayidx ; <i16> [#uses=1] %add = xor i16 %tmp4, %sum.09 ; <i16> [#uses=2] @@ -99,7 +99,7 @@ for.body: ; preds = %for.body, %entry %i.010 = phi i16 [ 0, %entry ], [ %inc, %for.body ] ; <i16> [#uses=2] %sum.09 = phi i16 [ 0, %entry ], [ %add, %for.body ] ; <i16> [#uses=1] %arrayidx = getelementptr i16* %a, i16 %i.010 ; <i16*> [#uses=1] -; CHECK: and: +; CHECK-LABEL: and: ; CHECK: and.w @r{{[0-9]+}}+, r{{[0-9]+}} %tmp4 = load i16* %arrayidx ; <i16> [#uses=1] %add = and i16 %tmp4, %sum.09 ; <i16> [#uses=2] diff --git a/test/CodeGen/MSP430/setcc.ll b/test/CodeGen/MSP430/setcc.ll index 05f9acd..d5a8057 100644 --- a/test/CodeGen/MSP430/setcc.ll +++ b/test/CodeGen/MSP430/setcc.ll @@ -8,7 +8,7 @@ define i16 @sccweqand(i16 %a, i16 %b) nounwind { %t3 = zext i1 %t2 to i16 ret i16 %t3 } -; CHECK: sccweqand: +; CHECK-LABEL: sccweqand: ; CHECK: bit.w r14, r15 ; CHECK: mov.w r2, r15 ; CHECK: rra.w r15 @@ -20,7 +20,7 @@ define i16 @sccwneand(i16 %a, i16 %b) nounwind { %t3 = zext i1 %t2 to i16 ret i16 %t3 } -; CHECK: sccwneand: +; CHECK-LABEL: sccwneand: ; CHECK: bit.w r14, r15 ; CHECK: mov.w r2, r15 ; CHECK: and.w #1, r15 @@ -30,7 +30,7 @@ define i16 @sccwne(i16 %a, i16 %b) nounwind { %t2 = zext i1 %t1 to i16 ret i16 %t2 } -; CHECK:sccwne: +; CHECK-LABEL:sccwne: ; CHECK: cmp.w r14, r15 ; CHECK: mov.w r2, r12 ; CHECK: rra.w r12 @@ -42,7 +42,7 @@ define i16 @sccweq(i16 %a, i16 %b) nounwind { %t2 = zext i1 %t1 to i16 ret i16 %t2 } -; CHECK:sccweq: +; CHECK-LABEL:sccweq: ; CHECK: cmp.w r14, r15 ; CHECK: mov.w r2, r15 ; CHECK: rra.w r15 @@ -53,7 +53,7 @@ define i16 @sccwugt(i16 %a, i16 %b) nounwind { %t2 = zext i1 %t1 to i16 ret i16 %t2 } -; CHECK:sccwugt: +; CHECK-LABEL:sccwugt: ; CHECK: cmp.w r15, r14 ; CHECK: mov.w #1, r15 ; CHECK: bic.w r2, r15 @@ -63,7 +63,7 @@ define i16 @sccwuge(i16 %a, i16 %b) nounwind { %t2 = zext i1 %t1 to i16 ret i16 %t2 } -; CHECK:sccwuge: +; CHECK-LABEL:sccwuge: ; CHECK: cmp.w r14, r15 ; CHECK: mov.w r2, r15 ; CHECK: and.w #1, r15 @@ -73,7 +73,7 @@ define i16 @sccwult(i16 %a, i16 %b) nounwind { %t2 = zext i1 %t1 to i16 ret i16 %t2 } -; CHECK:sccwult: +; CHECK-LABEL:sccwult: ; CHECK: cmp.w r14, r15 ; CHECK: mov.w #1, r15 ; CHECK: bic.w r2, r15 @@ -83,7 +83,7 @@ define i16 @sccwule(i16 %a, i16 %b) nounwind { %t2 = zext i1 %t1 to i16 ret i16 %t2 } -; CHECK:sccwule: +; CHECK-LABEL:sccwule: ; CHECK: cmp.w r15, r14 ; CHECK: mov.w r2, r15 ; CHECK: and.w #1, r15 diff --git a/test/CodeGen/MSP430/shifts.ll b/test/CodeGen/MSP430/shifts.ll index b5b3054..22ae59e 100644 --- a/test/CodeGen/MSP430/shifts.ll +++ b/test/CodeGen/MSP430/shifts.ll @@ -4,7 +4,7 @@ target triple = "msp430-elf" define zeroext i8 @lshr8(i8 zeroext %a, i8 zeroext %cnt) nounwind readnone { entry: -; CHECK: lshr8: +; CHECK-LABEL: lshr8: ; CHECK: rrc.b %shr = lshr i8 %a, %cnt ret i8 %shr @@ -12,7 +12,7 @@ entry: define signext i8 @ashr8(i8 signext %a, i8 zeroext %cnt) nounwind readnone { entry: -; CHECK: ashr8: +; CHECK-LABEL: ashr8: ; CHECK: rra.b %shr = ashr i8 %a, %cnt ret i8 %shr @@ -28,7 +28,7 @@ entry: define zeroext i16 @lshr16(i16 zeroext %a, i16 zeroext %cnt) nounwind readnone { entry: -; CHECK: lshr16: +; CHECK-LABEL: lshr16: ; CHECK: rrc.w %shr = lshr i16 %a, %cnt ret i16 %shr @@ -36,7 +36,7 @@ entry: define signext i16 @ashr16(i16 signext %a, i16 zeroext %cnt) nounwind readnone { entry: -; CHECK: ashr16: +; CHECK-LABEL: ashr16: ; CHECK: rra.w %shr = ashr i16 %a, %cnt ret i16 %shr @@ -44,7 +44,7 @@ entry: define zeroext i16 @shl16(i16 zeroext %a, i16 zeroext %cnt) nounwind readnone { entry: -; CHECK: shl16: +; CHECK-LABEL: shl16: ; CHECK: rla.w %shl = shl i16 %a, %cnt ret i16 %shl diff --git a/test/CodeGen/MSP430/vararg.ll b/test/CodeGen/MSP430/vararg.ll index 603d3ec..9e511fc 100644 --- a/test/CodeGen/MSP430/vararg.ll +++ b/test/CodeGen/MSP430/vararg.ll @@ -9,7 +9,7 @@ declare void @llvm.va_copy(i8*, i8*) nounwind define void @va_start(i16 %a, ...) nounwind { entry: -; CHECK: va_start: +; CHECK-LABEL: va_start: ; CHECK: sub.w #2, r1 %vl = alloca i8*, align 2 %vl1 = bitcast i8** %vl to i8* @@ -23,7 +23,7 @@ entry: define i16 @va_arg(i8* %vl) nounwind { entry: -; CHECK: va_arg: +; CHECK-LABEL: va_arg: %vl.addr = alloca i8*, align 2 ; CHECK: mov.w r15, 0(r1) store i8* %vl, i8** %vl.addr, align 2 @@ -37,7 +37,7 @@ entry: define void @va_copy(i8* %vl) nounwind { entry: -; CHECK: va_copy: +; CHECK-LABEL: va_copy: %vl.addr = alloca i8*, align 2 %vl2 = alloca i8*, align 2 ; CHECK: mov.w r15, 2(r1) |