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-rw-r--r--test/CodeGen/Mips/fcmp.ll302
1 files changed, 127 insertions, 175 deletions
diff --git a/test/CodeGen/Mips/fcmp.ll b/test/CodeGen/Mips/fcmp.ll
index 8e83b00..aa1f09bf 100644
--- a/test/CodeGen/Mips/fcmp.ll
+++ b/test/CodeGen/Mips/fcmp.ll
@@ -1,10 +1,17 @@
-; RUN: llc < %s -march=mipsel -mcpu=mips32 | FileCheck %s -check-prefix=ALL -check-prefix=32-C
-; RUN: llc < %s -march=mipsel -mcpu=mips32r2 | FileCheck %s -check-prefix=ALL -check-prefix=32-C
-; RUN: llc < %s -march=mipsel -mcpu=mips32r6 | FileCheck %s -check-prefix=ALL -check-prefix=32-CMP
-; RUN: llc < %s -march=mips64el -mcpu=mips4 | FileCheck %s -check-prefix=ALL -check-prefix=64-C
-; RUN: llc < %s -march=mips64el -mcpu=mips64 | FileCheck %s -check-prefix=ALL -check-prefix=64-C
-; RUN: llc < %s -march=mips64el -mcpu=mips64r2 | FileCheck %s -check-prefix=ALL -check-prefix=64-C
-; RUN: llc < %s -march=mips64el -mcpu=mips64r6 | FileCheck %s -check-prefix=ALL -check-prefix=64-CMP
+; RUN: llc < %s -march=mips -mcpu=mips32 | \
+; RUN: FileCheck %s -check-prefix=ALL -check-prefix=32-C
+; RUN: llc < %s -march=mips -mcpu=mips32r2 | \
+; RUN: FileCheck %s -check-prefix=ALL -check-prefix=32-C
+; RUN: llc < %s -march=mips -mcpu=mips32r6 | \
+; RUN: FileCheck %s -check-prefix=ALL -check-prefix=32-CMP
+; RUN: llc < %s -march=mips64 -mcpu=mips4 | \
+; RUN: FileCheck %s -check-prefix=ALL -check-prefix=64-C
+; RUN: llc < %s -march=mips64 -mcpu=mips64 | \
+; RUN: FileCheck %s -check-prefix=ALL -check-prefix=64-C
+; RUN: llc < %s -march=mips64 -mcpu=mips64r2 | \
+; RUN: FileCheck %s -check-prefix=ALL -check-prefix=64-C
+; RUN: llc < %s -march=mips64 -mcpu=mips64r6 | \
+; RUN: FileCheck %s -check-prefix=ALL -check-prefix=64-CMP
define i32 @false_f32(float %a, float %b) nounwind {
; ALL-LABEL: false_f32:
@@ -18,15 +25,13 @@ define i32 @false_f32(float %a, float %b) nounwind {
define i32 @oeq_f32(float %a, float %b) nounwind {
; ALL-LABEL: oeq_f32:
-; 32-C-DAG: addiu $[[T0:2]], $zero, 0
-; 32-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 32-C-DAG: addiu $2, $zero, 1
; 32-C-DAG: c.eq.s $f12, $f14
-; 32-C-DAG: movt $[[T0]], $1, $fcc0
+; 32-C: movf $2, $zero, $fcc0
-; 64-C-DAG: addiu $[[T0:2]], $zero, 0
-; 64-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 64-C-DAG: addiu $2, $zero, 1
; 64-C-DAG: c.eq.s $f12, $f13
-; 64-C-DAG: movt $[[T0]], $1, $fcc0
+; 64-C: movf $2, $zero, $fcc0
; 32-CMP-DAG: cmp.eq.s $[[T0:f[0-9]+]], $f12, $f14
; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
@@ -44,15 +49,13 @@ define i32 @oeq_f32(float %a, float %b) nounwind {
define i32 @ogt_f32(float %a, float %b) nounwind {
; ALL-LABEL: ogt_f32:
-; 32-C-DAG: addiu $[[T0:2]], $zero, 0
-; 32-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 32-C-DAG: addiu $2, $zero, 1
; 32-C-DAG: c.ule.s $f12, $f14
-; 32-C-DAG: movf $[[T0]], $1, $fcc0
+; 32-C: movt $2, $zero, $fcc0
-; 64-C-DAG: addiu $[[T0:2]], $zero, 0
-; 64-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 64-C-DAG: addiu $2, $zero, 1
; 64-C-DAG: c.ule.s $f12, $f13
-; 64-C-DAG: movf $[[T0]], $1, $fcc0
+; 64-C: movt $2, $zero, $fcc0
; 32-CMP-DAG: cmp.lt.s $[[T0:f[0-9]+]], $f14, $f12
; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
@@ -70,15 +73,13 @@ define i32 @ogt_f32(float %a, float %b) nounwind {
define i32 @oge_f32(float %a, float %b) nounwind {
; ALL-LABEL: oge_f32:
-; 32-C-DAG: addiu $[[T0:2]], $zero, 0
-; 32-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 32-C-DAG: addiu $2, $zero, 1
; 32-C-DAG: c.ult.s $f12, $f14
-; 32-C-DAG: movf $[[T0]], $1, $fcc0
+; 32-C: movt $2, $zero, $fcc0
-; 64-C-DAG: addiu $[[T0:2]], $zero, 0
-; 64-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 64-C-DAG: addiu $2, $zero, 1
; 64-C-DAG: c.ult.s $f12, $f13
-; 64-C-DAG: movf $[[T0]], $1, $fcc0
+; 64-C: movt $2, $zero, $fcc0
; 32-CMP-DAG: cmp.le.s $[[T0:f[0-9]+]], $f14, $f12
; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
@@ -96,15 +97,13 @@ define i32 @oge_f32(float %a, float %b) nounwind {
define i32 @olt_f32(float %a, float %b) nounwind {
; ALL-LABEL: olt_f32:
-; 32-C-DAG: addiu $[[T0:2]], $zero, 0
-; 32-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 32-C-DAG: addiu $2, $zero, 1
; 32-C-DAG: c.olt.s $f12, $f14
-; 32-C-DAG: movt $[[T0]], $1, $fcc0
+; 32-C: movf $2, $zero, $fcc0
-; 64-C-DAG: addiu $[[T0:2]], $zero, 0
-; 64-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 64-C-DAG: addiu $2, $zero, 1
; 64-C-DAG: c.olt.s $f12, $f13
-; 64-C-DAG: movt $[[T0]], $1, $fcc0
+; 64-C: movf $2, $zero, $fcc0
; 32-CMP-DAG: cmp.lt.s $[[T0:f[0-9]+]], $f12, $f14
; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
@@ -122,15 +121,13 @@ define i32 @olt_f32(float %a, float %b) nounwind {
define i32 @ole_f32(float %a, float %b) nounwind {
; ALL-LABEL: ole_f32:
-; 32-C-DAG: addiu $[[T0:2]], $zero, 0
-; 32-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 32-C-DAG: addiu $2, $zero, 1
; 32-C-DAG: c.ole.s $f12, $f14
-; 32-C-DAG: movt $[[T0]], $1, $fcc0
+; 32-C: movf $2, $zero, $fcc0
-; 64-C-DAG: addiu $[[T0:2]], $zero, 0
-; 64-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 64-C-DAG: addiu $2, $zero, 1
; 64-C-DAG: c.ole.s $f12, $f13
-; 64-C-DAG: movt $[[T0]], $1, $fcc0
+; 64-C: movf $2, $zero, $fcc0
; 32-CMP-DAG: cmp.le.s $[[T0:f[0-9]+]], $f12, $f14
; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
@@ -148,15 +145,13 @@ define i32 @ole_f32(float %a, float %b) nounwind {
define i32 @one_f32(float %a, float %b) nounwind {
; ALL-LABEL: one_f32:
-; 32-C-DAG: addiu $[[T0:2]], $zero, 0
-; 32-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 32-C-DAG: addiu $2, $zero, 1
; 32-C-DAG: c.ueq.s $f12, $f14
-; 32-C-DAG: movf $[[T0]], $1, $fcc0
+; 32-C: movt $2, $zero, $fcc0
-; 64-C-DAG: addiu $[[T0:2]], $zero, 0
-; 64-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 64-C-DAG: addiu $2, $zero, 1
; 64-C-DAG: c.ueq.s $f12, $f13
-; 64-C-DAG: movf $[[T0]], $1, $fcc0
+; 64-C: movt $2, $zero, $fcc0
; 32-CMP-DAG: cmp.ueq.s $[[T0:f[0-9]+]], $f12, $f14
; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
@@ -176,15 +171,13 @@ define i32 @one_f32(float %a, float %b) nounwind {
define i32 @ord_f32(float %a, float %b) nounwind {
; ALL-LABEL: ord_f32:
-; 32-C-DAG: addiu $[[T0:2]], $zero, 0
-; 32-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 32-C-DAG: addiu $2, $zero, 1
; 32-C-DAG: c.un.s $f12, $f14
-; 32-C-DAG: movf $[[T0]], $1, $fcc0
+; 32-C: movt $2, $zero, $fcc0
-; 64-C-DAG: addiu $[[T0:2]], $zero, 0
-; 64-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 64-C-DAG: addiu $2, $zero, 1
; 64-C-DAG: c.un.s $f12, $f13
-; 64-C-DAG: movf $[[T0]], $1, $fcc0
+; 64-C: movt $2, $zero, $fcc0
; 32-CMP-DAG: cmp.un.s $[[T0:f[0-9]+]], $f12, $f14
; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
@@ -204,15 +197,13 @@ define i32 @ord_f32(float %a, float %b) nounwind {
define i32 @ueq_f32(float %a, float %b) nounwind {
; ALL-LABEL: ueq_f32:
-; 32-C-DAG: addiu $[[T0:2]], $zero, 0
-; 32-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 32-C-DAG: addiu $2, $zero, 1
; 32-C-DAG: c.ueq.s $f12, $f14
-; 32-C-DAG: movt $[[T0]], $1, $fcc0
+; 32-C: movf $2, $zero, $fcc0
-; 64-C-DAG: addiu $[[T0:2]], $zero, 0
-; 64-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 64-C-DAG: addiu $2, $zero, 1
; 64-C-DAG: c.ueq.s $f12, $f13
-; 64-C-DAG: movt $[[T0]], $1, $fcc0
+; 64-C: movf $2, $zero, $fcc0
; 32-CMP-DAG: cmp.ueq.s $[[T0:f[0-9]+]], $f12, $f14
; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
@@ -230,15 +221,13 @@ define i32 @ueq_f32(float %a, float %b) nounwind {
define i32 @ugt_f32(float %a, float %b) nounwind {
; ALL-LABEL: ugt_f32:
-; 32-C-DAG: addiu $[[T0:2]], $zero, 0
-; 32-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 32-C-DAG: addiu $2, $zero, 1
; 32-C-DAG: c.ole.s $f12, $f14
-; 32-C-DAG: movf $[[T0]], $1, $fcc0
+; 32-C: movt $2, $zero, $fcc0
-; 64-C-DAG: addiu $[[T0:2]], $zero, 0
-; 64-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 64-C-DAG: addiu $2, $zero, 1
; 64-C-DAG: c.ole.s $f12, $f13
-; 64-C-DAG: movf $[[T0]], $1, $fcc0
+; 64-C: movt $2, $zero, $fcc0
; 32-CMP-DAG: cmp.ult.s $[[T0:f[0-9]+]], $f14, $f12
; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
@@ -256,15 +245,13 @@ define i32 @ugt_f32(float %a, float %b) nounwind {
define i32 @uge_f32(float %a, float %b) nounwind {
; ALL-LABEL: uge_f32:
-; 32-C-DAG: addiu $[[T0:2]], $zero, 0
-; 32-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 32-C-DAG: addiu $2, $zero, 1
; 32-C-DAG: c.olt.s $f12, $f14
-; 32-C-DAG: movf $[[T0]], $1, $fcc0
+; 32-C: movt $2, $zero, $fcc0
-; 64-C-DAG: addiu $[[T0:2]], $zero, 0
-; 64-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 64-C-DAG: addiu $2, $zero, 1
; 64-C-DAG: c.olt.s $f12, $f13
-; 64-C-DAG: movf $[[T0]], $1, $fcc0
+; 64-C: movt $2, $zero, $fcc0
; 32-CMP-DAG: cmp.ule.s $[[T0:f[0-9]+]], $f14, $f12
; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
@@ -282,15 +269,13 @@ define i32 @uge_f32(float %a, float %b) nounwind {
define i32 @ult_f32(float %a, float %b) nounwind {
; ALL-LABEL: ult_f32:
-; 32-C-DAG: addiu $[[T0:2]], $zero, 0
-; 32-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 32-C-DAG: addiu $2, $zero, 1
; 32-C-DAG: c.ult.s $f12, $f14
-; 32-C-DAG: movt $[[T0]], $1, $fcc0
+; 32-C: movf $2, $zero, $fcc0
-; 64-C-DAG: addiu $[[T0:2]], $zero, 0
-; 64-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 64-C-DAG: addiu $2, $zero, 1
; 64-C-DAG: c.ult.s $f12, $f13
-; 64-C-DAG: movt $[[T0]], $1, $fcc0
+; 64-C: movf $2, $zero, $fcc0
; 32-CMP-DAG: cmp.ult.s $[[T0:f[0-9]+]], $f12, $f14
; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
@@ -300,6 +285,7 @@ define i32 @ult_f32(float %a, float %b) nounwind {
; 64-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
; 64-CMP-DAG: andi $2, $[[T1]], 1
+
%1 = fcmp ult float %a, %b
%2 = zext i1 %1 to i32
ret i32 %2
@@ -308,15 +294,13 @@ define i32 @ult_f32(float %a, float %b) nounwind {
define i32 @ule_f32(float %a, float %b) nounwind {
; ALL-LABEL: ule_f32:
-; 32-C-DAG: addiu $[[T0:2]], $zero, 0
-; 32-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 32-C-DAG: addiu $2, $zero, 1
; 32-C-DAG: c.ule.s $f12, $f14
-; 32-C-DAG: movt $[[T0]], $1, $fcc0
+; 32-C: movf $2, $zero, $fcc0
-; 64-C-DAG: addiu $[[T0:2]], $zero, 0
-; 64-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 64-C-DAG: addiu $2, $zero, 1
; 64-C-DAG: c.ule.s $f12, $f13
-; 64-C-DAG: movt $[[T0]], $1, $fcc0
+; 64-C: movf $2, $zero, $fcc0
; 32-CMP-DAG: cmp.ule.s $[[T0:f[0-9]+]], $f12, $f14
; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
@@ -334,15 +318,13 @@ define i32 @ule_f32(float %a, float %b) nounwind {
define i32 @une_f32(float %a, float %b) nounwind {
; ALL-LABEL: une_f32:
-; 32-C-DAG: addiu $[[T0:2]], $zero, 0
-; 32-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 32-C-DAG: addiu $2, $zero, 1
; 32-C-DAG: c.eq.s $f12, $f14
-; 32-C-DAG: movf $[[T0]], $1, $fcc0
+; 32-C: movt $2, $zero, $fcc0
-; 64-C-DAG: addiu $[[T0:2]], $zero, 0
-; 64-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 64-C-DAG: addiu $2, $zero, 1
; 64-C-DAG: c.eq.s $f12, $f13
-; 64-C-DAG: movf $[[T0]], $1, $fcc0
+; 64-C: movt $2, $zero, $fcc0
; 32-CMP-DAG: cmp.eq.s $[[T0:f[0-9]+]], $f12, $f14
; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
@@ -362,15 +344,13 @@ define i32 @une_f32(float %a, float %b) nounwind {
define i32 @uno_f32(float %a, float %b) nounwind {
; ALL-LABEL: uno_f32:
-; 32-C-DAG: addiu $[[T0:2]], $zero, 0
-; 32-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 32-C-DAG: addiu $2, $zero, 1
; 32-C-DAG: c.un.s $f12, $f14
-; 32-C-DAG: movt $[[T0]], $1, $fcc0
+; 32-C: movf $2, $zero, $fcc0
-; 64-C-DAG: addiu $[[T0:2]], $zero, 0
-; 64-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 64-C-DAG: addiu $2, $zero, 1
; 64-C-DAG: c.un.s $f12, $f13
-; 64-C-DAG: movt $[[T0]], $1, $fcc0
+; 64-C: movf $2, $zero, $fcc0
; 32-CMP-DAG: cmp.un.s $[[T0:f[0-9]+]], $f12, $f14
; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
@@ -406,15 +386,13 @@ define i32 @false_f64(double %a, double %b) nounwind {
define i32 @oeq_f64(double %a, double %b) nounwind {
; ALL-LABEL: oeq_f64:
-; 32-C-DAG: addiu $[[T0:2]], $zero, 0
-; 32-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 32-C-DAG: addiu $2, $zero, 1
; 32-C-DAG: c.eq.d $f12, $f14
-; 32-C-DAG: movt $[[T0]], $1, $fcc0
+; 32-C: movf $2, $zero, $fcc0
-; 64-C-DAG: addiu $[[T0:2]], $zero, 0
-; 64-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 64-C-DAG: addiu $2, $zero, 1
; 64-C-DAG: c.eq.d $f12, $f13
-; 64-C-DAG: movt $[[T0]], $1, $fcc0
+; 64-C: movf $2, $zero, $fcc0
; 32-CMP-DAG: cmp.eq.d $[[T0:f[0-9]+]], $f12, $f14
; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
@@ -432,15 +410,13 @@ define i32 @oeq_f64(double %a, double %b) nounwind {
define i32 @ogt_f64(double %a, double %b) nounwind {
; ALL-LABEL: ogt_f64:
-; 32-C-DAG: addiu $[[T0:2]], $zero, 0
-; 32-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 32-C-DAG: addiu $2, $zero, 1
; 32-C-DAG: c.ule.d $f12, $f14
-; 32-C-DAG: movf $[[T0]], $1, $fcc0
+; 32-C: movt $2, $zero, $fcc0
-; 64-C-DAG: addiu $[[T0:2]], $zero, 0
-; 64-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 64-C-DAG: addiu $2, $zero, 1
; 64-C-DAG: c.ule.d $f12, $f13
-; 64-C-DAG: movf $[[T0]], $1, $fcc0
+; 64-C: movt $2, $zero, $fcc0
; 32-CMP-DAG: cmp.lt.d $[[T0:f[0-9]+]], $f14, $f12
; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
@@ -458,15 +434,13 @@ define i32 @ogt_f64(double %a, double %b) nounwind {
define i32 @oge_f64(double %a, double %b) nounwind {
; ALL-LABEL: oge_f64:
-; 32-C-DAG: addiu $[[T0:2]], $zero, 0
-; 32-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 32-C-DAG: addiu $2, $zero, 1
; 32-C-DAG: c.ult.d $f12, $f14
-; 32-C-DAG: movf $[[T0]], $1, $fcc0
+; 32-C: movt $2, $zero, $fcc0
-; 64-C-DAG: addiu $[[T0:2]], $zero, 0
-; 64-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 64-C-DAG: addiu $2, $zero, 1
; 64-C-DAG: c.ult.d $f12, $f13
-; 64-C-DAG: movf $[[T0]], $1, $fcc0
+; 64-C: movt $2, $zero, $fcc0
; 32-CMP-DAG: cmp.le.d $[[T0:f[0-9]+]], $f14, $f12
; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
@@ -484,15 +458,13 @@ define i32 @oge_f64(double %a, double %b) nounwind {
define i32 @olt_f64(double %a, double %b) nounwind {
; ALL-LABEL: olt_f64:
-; 32-C-DAG: addiu $[[T0:2]], $zero, 0
-; 32-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 32-C-DAG: addiu $2, $zero, 1
; 32-C-DAG: c.olt.d $f12, $f14
-; 32-C-DAG: movt $[[T0]], $1, $fcc0
+; 32-C: movf $2, $zero, $fcc0
-; 64-C-DAG: addiu $[[T0:2]], $zero, 0
-; 64-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 64-C-DAG: addiu $2, $zero, 1
; 64-C-DAG: c.olt.d $f12, $f13
-; 64-C-DAG: movt $[[T0]], $1, $fcc0
+; 64-C: movf $2, $zero, $fcc0
; 32-CMP-DAG: cmp.lt.d $[[T0:f[0-9]+]], $f12, $f14
; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
@@ -510,15 +482,13 @@ define i32 @olt_f64(double %a, double %b) nounwind {
define i32 @ole_f64(double %a, double %b) nounwind {
; ALL-LABEL: ole_f64:
-; 32-C-DAG: addiu $[[T0:2]], $zero, 0
-; 32-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 32-C-DAG: addiu $2, $zero, 1
; 32-C-DAG: c.ole.d $f12, $f14
-; 32-C-DAG: movt $[[T0]], $1, $fcc0
+; 32-C: movf $2, $zero, $fcc0
-; 64-C-DAG: addiu $[[T0:2]], $zero, 0
-; 64-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 64-C-DAG: addiu $2, $zero, 1
; 64-C-DAG: c.ole.d $f12, $f13
-; 64-C-DAG: movt $[[T0]], $1, $fcc0
+; 64-C: movf $2, $zero, $fcc0
; 32-CMP-DAG: cmp.le.d $[[T0:f[0-9]+]], $f12, $f14
; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
@@ -536,15 +506,13 @@ define i32 @ole_f64(double %a, double %b) nounwind {
define i32 @one_f64(double %a, double %b) nounwind {
; ALL-LABEL: one_f64:
-; 32-C-DAG: addiu $[[T0:2]], $zero, 0
-; 32-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 32-C-DAG: addiu $2, $zero, 1
; 32-C-DAG: c.ueq.d $f12, $f14
-; 32-C-DAG: movf $[[T0]], $1, $fcc0
+; 32-C: movt $2, $zero, $fcc0
-; 64-C-DAG: addiu $[[T0:2]], $zero, 0
-; 64-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 64-C-DAG: addiu $2, $zero, 1
; 64-C-DAG: c.ueq.d $f12, $f13
-; 64-C-DAG: movf $[[T0]], $1, $fcc0
+; 64-C: movt $2, $zero, $fcc0
; 32-CMP-DAG: cmp.ueq.d $[[T0:f[0-9]+]], $f12, $f14
; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
@@ -564,15 +532,13 @@ define i32 @one_f64(double %a, double %b) nounwind {
define i32 @ord_f64(double %a, double %b) nounwind {
; ALL-LABEL: ord_f64:
-; 32-C-DAG: addiu $[[T0:2]], $zero, 0
-; 32-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 32-C-DAG: addiu $2, $zero, 1
; 32-C-DAG: c.un.d $f12, $f14
-; 32-C-DAG: movf $[[T0]], $1, $fcc0
+; 32-C: movt $2, $zero, $fcc0
-; 64-C-DAG: addiu $[[T0:2]], $zero, 0
-; 64-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 64-C-DAG: addiu $2, $zero, 1
; 64-C-DAG: c.un.d $f12, $f13
-; 64-C-DAG: movf $[[T0]], $1, $fcc0
+; 64-C: movt $2, $zero, $fcc0
; 32-CMP-DAG: cmp.un.d $[[T0:f[0-9]+]], $f12, $f14
; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
@@ -592,15 +558,13 @@ define i32 @ord_f64(double %a, double %b) nounwind {
define i32 @ueq_f64(double %a, double %b) nounwind {
; ALL-LABEL: ueq_f64:
-; 32-C-DAG: addiu $[[T0:2]], $zero, 0
-; 32-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 32-C-DAG: addiu $2, $zero, 1
; 32-C-DAG: c.ueq.d $f12, $f14
-; 32-C-DAG: movt $[[T0]], $1, $fcc0
+; 32-C: movf $2, $zero, $fcc0
-; 64-C-DAG: addiu $[[T0:2]], $zero, 0
-; 64-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 64-C-DAG: addiu $2, $zero, 1
; 64-C-DAG: c.ueq.d $f12, $f13
-; 64-C-DAG: movt $[[T0]], $1, $fcc0
+; 64-C: movf $2, $zero, $fcc0
; 32-CMP-DAG: cmp.ueq.d $[[T0:f[0-9]+]], $f12, $f14
; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
@@ -618,15 +582,13 @@ define i32 @ueq_f64(double %a, double %b) nounwind {
define i32 @ugt_f64(double %a, double %b) nounwind {
; ALL-LABEL: ugt_f64:
-; 32-C-DAG: addiu $[[T0:2]], $zero, 0
-; 32-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 32-C-DAG: addiu $2, $zero, 1
; 32-C-DAG: c.ole.d $f12, $f14
-; 32-C-DAG: movf $[[T0]], $1, $fcc0
+; 32-C: movt $2, $zero, $fcc0
-; 64-C-DAG: addiu $[[T0:2]], $zero, 0
-; 64-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 64-C-DAG: addiu $2, $zero, 1
; 64-C-DAG: c.ole.d $f12, $f13
-; 64-C-DAG: movf $[[T0]], $1, $fcc0
+; 64-C: movt $2, $zero, $fcc0
; 32-CMP-DAG: cmp.ult.d $[[T0:f[0-9]+]], $f14, $f12
; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
@@ -644,15 +606,13 @@ define i32 @ugt_f64(double %a, double %b) nounwind {
define i32 @uge_f64(double %a, double %b) nounwind {
; ALL-LABEL: uge_f64:
-; 32-C-DAG: addiu $[[T0:2]], $zero, 0
-; 32-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 32-C-DAG: addiu $2, $zero, 1
; 32-C-DAG: c.olt.d $f12, $f14
-; 32-C-DAG: movf $[[T0]], $1, $fcc0
+; 32-C: movt $2, $zero, $fcc0
-; 64-C-DAG: addiu $[[T0:2]], $zero, 0
-; 64-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 64-C-DAG: addiu $2, $zero, 1
; 64-C-DAG: c.olt.d $f12, $f13
-; 64-C-DAG: movf $[[T0]], $1, $fcc0
+; 64-C: movt $2, $zero, $fcc0
; 32-CMP-DAG: cmp.ule.d $[[T0:f[0-9]+]], $f14, $f12
; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
@@ -670,15 +630,13 @@ define i32 @uge_f64(double %a, double %b) nounwind {
define i32 @ult_f64(double %a, double %b) nounwind {
; ALL-LABEL: ult_f64:
-; 32-C-DAG: addiu $[[T0:2]], $zero, 0
-; 32-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 32-C-DAG: addiu $2, $zero, 1
; 32-C-DAG: c.ult.d $f12, $f14
-; 32-C-DAG: movt $[[T0]], $1, $fcc0
+; 32-C: movf $2, $zero, $fcc0
-; 64-C-DAG: addiu $[[T0:2]], $zero, 0
-; 64-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 64-C-DAG: addiu $2, $zero, 1
; 64-C-DAG: c.ult.d $f12, $f13
-; 64-C-DAG: movt $[[T0]], $1, $fcc0
+; 64-C: movf $2, $zero, $fcc0
; 32-CMP-DAG: cmp.ult.d $[[T0:f[0-9]+]], $f12, $f14
; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
@@ -696,15 +654,13 @@ define i32 @ult_f64(double %a, double %b) nounwind {
define i32 @ule_f64(double %a, double %b) nounwind {
; ALL-LABEL: ule_f64:
-; 32-C-DAG: addiu $[[T0:2]], $zero, 0
-; 32-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 32-C-DAG: addiu $2, $zero, 1
; 32-C-DAG: c.ule.d $f12, $f14
-; 32-C-DAG: movt $[[T0]], $1, $fcc0
+; 32-C: movf $2, $zero, $fcc0
-; 64-C-DAG: addiu $[[T0:2]], $zero, 0
-; 64-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 64-C-DAG: addiu $2, $zero, 1
; 64-C-DAG: c.ule.d $f12, $f13
-; 64-C-DAG: movt $[[T0]], $1, $fcc0
+; 64-C: movf $2, $zero, $fcc0
; 32-CMP-DAG: cmp.ule.d $[[T0:f[0-9]+]], $f12, $f14
; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
@@ -722,15 +678,13 @@ define i32 @ule_f64(double %a, double %b) nounwind {
define i32 @une_f64(double %a, double %b) nounwind {
; ALL-LABEL: une_f64:
-; 32-C-DAG: addiu $[[T0:2]], $zero, 0
-; 32-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 32-C-DAG: addiu $2, $zero, 1
; 32-C-DAG: c.eq.d $f12, $f14
-; 32-C-DAG: movf $[[T0]], $1, $fcc0
+; 32-C: movt $2, $zero, $fcc0
-; 64-C-DAG: addiu $[[T0:2]], $zero, 0
-; 64-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 64-C-DAG: addiu $2, $zero, 1
; 64-C-DAG: c.eq.d $f12, $f13
-; 64-C-DAG: movf $[[T0]], $1, $fcc0
+; 64-C: movt $2, $zero, $fcc0
; 32-CMP-DAG: cmp.eq.d $[[T0:f[0-9]+]], $f12, $f14
; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
@@ -750,15 +704,13 @@ define i32 @une_f64(double %a, double %b) nounwind {
define i32 @uno_f64(double %a, double %b) nounwind {
; ALL-LABEL: uno_f64:
-; 32-C-DAG: addiu $[[T0:2]], $zero, 0
-; 32-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 32-C-DAG: addiu $2, $zero, 1
; 32-C-DAG: c.un.d $f12, $f14
-; 32-C-DAG: movt $[[T0]], $1, $fcc0
+; 32-C: movf $2, $zero, $fcc0
-; 64-C-DAG: addiu $[[T0:2]], $zero, 0
-; 64-C-DAG: addiu $[[T1:[0-9]+]], $zero, 1
+; 64-C-DAG: addiu $2, $zero, 1
; 64-C-DAG: c.un.d $f12, $f13
-; 64-C-DAG: movt $[[T0]], $1, $fcc0
+; 64-C: movf $2, $zero, $fcc0
; 32-CMP-DAG: cmp.un.d $[[T0:f[0-9]+]], $f12, $f14
; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
generated by cgit v1.1 at 2024-05-19 00:52:53 +0000