diff options
Diffstat (limited to 'test/CodeGen/Mips/msa/3rf_q.ll')
| -rw-r--r-- | test/CodeGen/Mips/msa/3rf_q.ll | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/test/CodeGen/Mips/msa/3rf_q.ll b/test/CodeGen/Mips/msa/3rf_q.ll index f7000ee..c8b0a50 100644 --- a/test/CodeGen/Mips/msa/3rf_q.ll +++ b/test/CodeGen/Mips/msa/3rf_q.ll @@ -10,8 +10,8 @@ define void @llvm_mips_mul_q_h_test() nounwind { entry: - %0 = load <8 x i16>* @llvm_mips_mul_q_h_ARG1 - %1 = load <8 x i16>* @llvm_mips_mul_q_h_ARG2 + %0 = load <8 x i16>, <8 x i16>* @llvm_mips_mul_q_h_ARG1 + %1 = load <8 x i16>, <8 x i16>* @llvm_mips_mul_q_h_ARG2 %2 = tail call <8 x i16> @llvm.mips.mul.q.h(<8 x i16> %0, <8 x i16> %1) store <8 x i16> %2, <8 x i16>* @llvm_mips_mul_q_h_RES ret void @@ -32,8 +32,8 @@ declare <8 x i16> @llvm.mips.mul.q.h(<8 x i16>, <8 x i16>) nounwind define void @llvm_mips_mul_q_w_test() nounwind { entry: - %0 = load <4 x i32>* @llvm_mips_mul_q_w_ARG1 - %1 = load <4 x i32>* @llvm_mips_mul_q_w_ARG2 + %0 = load <4 x i32>, <4 x i32>* @llvm_mips_mul_q_w_ARG1 + %1 = load <4 x i32>, <4 x i32>* @llvm_mips_mul_q_w_ARG2 %2 = tail call <4 x i32> @llvm.mips.mul.q.w(<4 x i32> %0, <4 x i32> %1) store <4 x i32> %2, <4 x i32>* @llvm_mips_mul_q_w_RES ret void @@ -54,8 +54,8 @@ declare <4 x i32> @llvm.mips.mul.q.w(<4 x i32>, <4 x i32>) nounwind define void @llvm_mips_mulr_q_h_test() nounwind { entry: - %0 = load <8 x i16>* @llvm_mips_mulr_q_h_ARG1 - %1 = load <8 x i16>* @llvm_mips_mulr_q_h_ARG2 + %0 = load <8 x i16>, <8 x i16>* @llvm_mips_mulr_q_h_ARG1 + %1 = load <8 x i16>, <8 x i16>* @llvm_mips_mulr_q_h_ARG2 %2 = tail call <8 x i16> @llvm.mips.mulr.q.h(<8 x i16> %0, <8 x i16> %1) store <8 x i16> %2, <8 x i16>* @llvm_mips_mulr_q_h_RES ret void @@ -76,8 +76,8 @@ declare <8 x i16> @llvm.mips.mulr.q.h(<8 x i16>, <8 x i16>) nounwind define void @llvm_mips_mulr_q_w_test() nounwind { entry: - %0 = load <4 x i32>* @llvm_mips_mulr_q_w_ARG1 - %1 = load <4 x i32>* @llvm_mips_mulr_q_w_ARG2 + %0 = load <4 x i32>, <4 x i32>* @llvm_mips_mulr_q_w_ARG1 + %1 = load <4 x i32>, <4 x i32>* @llvm_mips_mulr_q_w_ARG2 %2 = tail call <4 x i32> @llvm.mips.mulr.q.w(<4 x i32> %0, <4 x i32> %1) store <4 x i32> %2, <4 x i32>* @llvm_mips_mulr_q_w_RES ret void |