diff options
Diffstat (limited to 'test/CodeGen/Mips/msa/elm_copy.ll')
| -rw-r--r-- | test/CodeGen/Mips/msa/elm_copy.ll | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/test/CodeGen/Mips/msa/elm_copy.ll b/test/CodeGen/Mips/msa/elm_copy.ll index 0dd75fa..2a0d74f 100644 --- a/test/CodeGen/Mips/msa/elm_copy.ll +++ b/test/CodeGen/Mips/msa/elm_copy.ll @@ -15,7 +15,7 @@ define void @llvm_mips_copy_s_b_test() nounwind { entry: - %0 = load <16 x i8>* @llvm_mips_copy_s_b_ARG1 + %0 = load <16 x i8>, <16 x i8>* @llvm_mips_copy_s_b_ARG1 %1 = tail call i32 @llvm.mips.copy.s.b(<16 x i8> %0, i32 1) store i32 %1, i32* @llvm_mips_copy_s_b_RES ret void @@ -38,7 +38,7 @@ declare i32 @llvm.mips.copy.s.b(<16 x i8>, i32) nounwind define void @llvm_mips_copy_s_h_test() nounwind { entry: - %0 = load <8 x i16>* @llvm_mips_copy_s_h_ARG1 + %0 = load <8 x i16>, <8 x i16>* @llvm_mips_copy_s_h_ARG1 %1 = tail call i32 @llvm.mips.copy.s.h(<8 x i16> %0, i32 1) store i32 %1, i32* @llvm_mips_copy_s_h_RES ret void @@ -61,7 +61,7 @@ declare i32 @llvm.mips.copy.s.h(<8 x i16>, i32) nounwind define void @llvm_mips_copy_s_w_test() nounwind { entry: - %0 = load <4 x i32>* @llvm_mips_copy_s_w_ARG1 + %0 = load <4 x i32>, <4 x i32>* @llvm_mips_copy_s_w_ARG1 %1 = tail call i32 @llvm.mips.copy.s.w(<4 x i32> %0, i32 1) store i32 %1, i32* @llvm_mips_copy_s_w_RES ret void @@ -84,7 +84,7 @@ declare i32 @llvm.mips.copy.s.w(<4 x i32>, i32) nounwind define void @llvm_mips_copy_s_d_test() nounwind { entry: - %0 = load <2 x i64>* @llvm_mips_copy_s_d_ARG1 + %0 = load <2 x i64>, <2 x i64>* @llvm_mips_copy_s_d_ARG1 %1 = tail call i64 @llvm.mips.copy.s.d(<2 x i64> %0, i32 1) store i64 %1, i64* @llvm_mips_copy_s_d_RES ret void @@ -112,7 +112,7 @@ declare i64 @llvm.mips.copy.s.d(<2 x i64>, i32) nounwind define void @llvm_mips_copy_u_b_test() nounwind { entry: - %0 = load <16 x i8>* @llvm_mips_copy_u_b_ARG1 + %0 = load <16 x i8>, <16 x i8>* @llvm_mips_copy_u_b_ARG1 %1 = tail call i32 @llvm.mips.copy.u.b(<16 x i8> %0, i32 1) store i32 %1, i32* @llvm_mips_copy_u_b_RES ret void @@ -135,7 +135,7 @@ declare i32 @llvm.mips.copy.u.b(<16 x i8>, i32) nounwind define void @llvm_mips_copy_u_h_test() nounwind { entry: - %0 = load <8 x i16>* @llvm_mips_copy_u_h_ARG1 + %0 = load <8 x i16>, <8 x i16>* @llvm_mips_copy_u_h_ARG1 %1 = tail call i32 @llvm.mips.copy.u.h(<8 x i16> %0, i32 1) store i32 %1, i32* @llvm_mips_copy_u_h_RES ret void @@ -158,7 +158,7 @@ declare i32 @llvm.mips.copy.u.h(<8 x i16>, i32) nounwind define void @llvm_mips_copy_u_w_test() nounwind { entry: - %0 = load <4 x i32>* @llvm_mips_copy_u_w_ARG1 + %0 = load <4 x i32>, <4 x i32>* @llvm_mips_copy_u_w_ARG1 %1 = tail call i32 @llvm.mips.copy.u.w(<4 x i32> %0, i32 1) store i32 %1, i32* @llvm_mips_copy_u_w_RES ret void @@ -181,7 +181,7 @@ declare i32 @llvm.mips.copy.u.w(<4 x i32>, i32) nounwind define void @llvm_mips_copy_u_d_test() nounwind { entry: - %0 = load <2 x i64>* @llvm_mips_copy_u_d_ARG1 + %0 = load <2 x i64>, <2 x i64>* @llvm_mips_copy_u_d_ARG1 %1 = tail call i64 @llvm.mips.copy.u.d(<2 x i64> %0, i32 1) store i64 %1, i64* @llvm_mips_copy_u_d_RES ret void |