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-rw-r--r--test/CodeGen/PowerPC/fast-isel-ret.ll72
1 files changed, 54 insertions, 18 deletions
diff --git a/test/CodeGen/PowerPC/fast-isel-ret.ll b/test/CodeGen/PowerPC/fast-isel-ret.ll
index fa19f8b..ae34fbf 100644
--- a/test/CodeGen/PowerPC/fast-isel-ret.ll
+++ b/test/CodeGen/PowerPC/fast-isel-ret.ll
@@ -1,8 +1,44 @@
-; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s --check-prefix=ELF64
+; FIXME: FastISel currently returns false if it hits code that uses VSX
+; registers and with -fast-isel-abort turned on the test case will then fail.
+; When fastisel better supports VSX fix up this test case.
+;
+; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=-vsx | FileCheck %s --check-prefix=ELF64
+
+define zeroext i1 @rettrue() nounwind uwtable ssp {
+entry:
+; ELF64-LABEL: rettrue
+; ELF64: li 3, 1
+; ELF64: blr
+ ret i1 true
+}
+
+define zeroext i1 @retfalse() nounwind uwtable ssp {
+entry:
+; ELF64-LABEL: retfalse
+; ELF64: li 3, 0
+; ELF64: blr
+ ret i1 false
+}
+
+define signext i1 @retstrue() nounwind uwtable ssp {
+entry:
+; ELF64-LABEL: retstrue
+; ELF64: li 3, -1
+; ELF64: blr
+ ret i1 true
+}
+
+define signext i1 @retsfalse() nounwind uwtable ssp {
+entry:
+; ELF64-LABEL: retsfalse
+; ELF64: li 3, 0
+; ELF64: blr
+ ret i1 false
+}
define signext i8 @ret2(i8 signext %a) nounwind uwtable ssp {
entry:
-; ELF64: ret2
+; ELF64-LABEL: ret2
; ELF64: extsb
; ELF64: blr
ret i8 %a
@@ -10,7 +46,7 @@ entry:
define zeroext i8 @ret3(i8 signext %a) nounwind uwtable ssp {
entry:
-; ELF64: ret3
+; ELF64-LABEL: ret3
; ELF64: rldicl {{[0-9]+}}, {{[0-9]+}}, 0, 56
; ELF64: blr
ret i8 %a
@@ -18,7 +54,7 @@ entry:
define signext i16 @ret4(i16 signext %a) nounwind uwtable ssp {
entry:
-; ELF64: ret4
+; ELF64-LABEL: ret4
; ELF64: extsh
; ELF64: blr
ret i16 %a
@@ -26,7 +62,7 @@ entry:
define zeroext i16 @ret5(i16 signext %a) nounwind uwtable ssp {
entry:
-; ELF64: ret5
+; ELF64-LABEL: ret5
; ELF64: rldicl {{[0-9]+}}, {{[0-9]+}}, 0, 48
; ELF64: blr
ret i16 %a
@@ -34,7 +70,7 @@ entry:
define i16 @ret6(i16 %a) nounwind uwtable ssp {
entry:
-; ELF64: ret6
+; ELF64-LABEL: ret6
; ELF64: rldicl {{[0-9]+}}, {{[0-9]+}}, 0, 48
; ELF64: blr
ret i16 %a
@@ -42,7 +78,7 @@ entry:
define signext i32 @ret7(i32 signext %a) nounwind uwtable ssp {
entry:
-; ELF64: ret7
+; ELF64-LABEL: ret7
; ELF64: extsw
; ELF64: blr
ret i32 %a
@@ -50,7 +86,7 @@ entry:
define zeroext i32 @ret8(i32 signext %a) nounwind uwtable ssp {
entry:
-; ELF64: ret8
+; ELF64-LABEL: ret8
; ELF64: rldicl {{[0-9]+}}, {{[0-9]+}}, 0, 32
; ELF64: blr
ret i32 %a
@@ -58,7 +94,7 @@ entry:
define i32 @ret9(i32 %a) nounwind uwtable ssp {
entry:
-; ELF64: ret9
+; ELF64-LABEL: ret9
; ELF64: rldicl {{[0-9]+}}, {{[0-9]+}}, 0, 32
; ELF64: blr
ret i32 %a
@@ -66,7 +102,7 @@ entry:
define i64 @ret10(i64 %a) nounwind uwtable ssp {
entry:
-; ELF64: ret10
+; ELF64-LABEL: ret10
; ELF64-NOT: exts
; ELF64-NOT: rldicl
; ELF64: blr
@@ -75,21 +111,21 @@ entry:
define float @ret11(float %a) nounwind uwtable ssp {
entry:
-; ELF64: ret11
+; ELF64-LABEL: ret11
; ELF64: blr
ret float %a
}
define double @ret12(double %a) nounwind uwtable ssp {
entry:
-; ELF64: ret12
+; ELF64-LABEL: ret12
; ELF64: blr
ret double %a
}
define i8 @ret13() nounwind uwtable ssp {
entry:
-; ELF64: ret13
+; ELF64-LABEL: ret13
; ELF64: li
; ELF64: blr
ret i8 15;
@@ -97,7 +133,7 @@ entry:
define i16 @ret14() nounwind uwtable ssp {
entry:
-; ELF64: ret14
+; ELF64-LABEL: ret14
; ELF64: li
; ELF64: blr
ret i16 -225;
@@ -105,7 +141,7 @@ entry:
define i32 @ret15() nounwind uwtable ssp {
entry:
-; ELF64: ret15
+; ELF64-LABEL: ret15
; ELF64: lis
; ELF64: ori
; ELF64: blr
@@ -114,7 +150,7 @@ entry:
define i64 @ret16() nounwind uwtable ssp {
entry:
-; ELF64: ret16
+; ELF64-LABEL: ret16
; ELF64: li
; ELF64: sldi
; ELF64: oris
@@ -125,7 +161,7 @@ entry:
define float @ret17() nounwind uwtable ssp {
entry:
-; ELF64: ret17
+; ELF64-LABEL: ret17
; ELF64: addis
; ELF64: lfs
; ELF64: blr
@@ -134,7 +170,7 @@ entry:
define double @ret18() nounwind uwtable ssp {
entry:
-; ELF64: ret18
+; ELF64-LABEL: ret18
; ELF64: addis
; ELF64: lfd
; ELF64: blr