diff options
Diffstat (limited to 'test/CodeGen/PowerPC/tls-pic.ll')
-rw-r--r-- | test/CodeGen/PowerPC/tls-pic.ll | 16 |
1 files changed, 15 insertions, 1 deletions
diff --git a/test/CodeGen/PowerPC/tls-pic.ll b/test/CodeGen/PowerPC/tls-pic.ll index 9f3ab6e..9ba3725 100644 --- a/test/CodeGen/PowerPC/tls-pic.ll +++ b/test/CodeGen/PowerPC/tls-pic.ll @@ -1,5 +1,7 @@ ; RUN: llc -march=ppc64 -mcpu=pwr7 -O0 -relocation-model=pic < %s | FileCheck -check-prefix=OPT0 %s ; RUN: llc -march=ppc64 -mcpu=pwr7 -O1 -relocation-model=pic < %s | FileCheck -check-prefix=OPT1 %s +; RUN: llc -march=ppc32 -O0 -relocation-model=pic < %s | FileCheck -check-prefix=OPT0-32 %s +; RUN: llc -march=ppc32 -O1 -relocation-model=pic < %s | FileCheck -check-prefix=OPT1-32 %s target triple = "powerpc64-unknown-linux-gnu" ; Test correct assembly code generation for thread-local storage using @@ -22,6 +24,16 @@ entry: ; OPT0-NEXT: nop ; OPT0: addis [[REG2:[0-9]+]], 3, a@dtprel@ha ; OPT0-NEXT: addi {{[0-9]+}}, [[REG2]], a@dtprel@l +; OPT0-32-LABEL: main +; OPT0-32: addi {{[0-9]+}}, {{[0-9]+}}, a@got@tlsld +; OPT0-32: bl __tls_get_addr(a@tlsld)@PLT +; OPT0-32: addis [[REG:[0-9]+]], 3, a@dtprel@ha +; OPT0-32-NEXT: addi {{[0-9]+}}, [[REG]], a@dtprel@l +; OPT1-32-LABEL: main +; OPT1-32: addi 3, {{[0-9]+}}, a@got@tlsld +; OPT1-32: bl __tls_get_addr(a@tlsld)@PLT +; OPT1-32: addis [[REG:[0-9]+]], 3, a@dtprel@ha +; OPT1-32-NEXT: addi {{[0-9]+}}, [[REG]], a@dtprel@l ; Test peephole optimization for thread-local storage using the ; local dynamic model. @@ -52,4 +64,6 @@ entry: ; OPT1-NEXT: addi 3, [[REG]], a2@got@tlsgd@l ; OPT1: bl __tls_get_addr(a2@tlsgd) ; OPT1-NEXT: nop - +; OPT1-32-LABEL: main2 +; OPT1-32: addi 3, {{[0-9]+}}, a2@got@tlsgd +; OPT1-32: bl __tls_get_addr(a2@tlsgd)@PLT |