diff options
Diffstat (limited to 'test/CodeGen/R600/fmul.ll')
| -rw-r--r-- | test/CodeGen/R600/fmul.ll | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/test/CodeGen/R600/fmul.ll b/test/CodeGen/R600/fmul.ll index f2b3e2c..4a7d6cd 100644 --- a/test/CodeGen/R600/fmul.ll +++ b/test/CodeGen/R600/fmul.ll @@ -2,7 +2,7 @@ ; RUN: llc < %s -march=r600 -mcpu=SI | FileCheck %s --check-prefix=SI-CHECK ; R600-CHECK: @fmul_f32 -; R600-CHECK: MUL_IEEE * {{T[0-9]+\.[XYZW]}}, KC0[2].Z, KC0[2].W +; R600-CHECK: MUL_IEEE {{\** *}}{{T[0-9]+\.[XYZW]}}, KC0[2].Z, KC0[2].W ; SI-CHECK: @fmul_f32 ; SI-CHECK: V_MUL_F32 define void @fmul_f32(float addrspace(1)* %out, float %a, float %b) { @@ -17,8 +17,8 @@ declare float @llvm.R600.load.input(i32) readnone declare void @llvm.AMDGPU.store.output(float, i32) ; R600-CHECK: @fmul_v2f32 -; R600-CHECK: MUL_IEEE * T{{[0-9]+\.[XYZW]}} -; R600-CHECK: MUL_IEEE * T{{[0-9]+\.[XYZW]}} +; R600-CHECK: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW]}} +; R600-CHECK: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW]}} ; SI-CHECK: @fmul_v2f32 ; SI-CHECK: V_MUL_F32 ; SI-CHECK: V_MUL_F32 @@ -30,10 +30,10 @@ entry: } ; R600-CHECK: @fmul_v4f32 -; R600-CHECK: MUL_IEEE * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} -; R600-CHECK: MUL_IEEE * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} -; R600-CHECK: MUL_IEEE * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} -; R600-CHECK: MUL_IEEE * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} +; R600-CHECK: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} +; R600-CHECK: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} +; R600-CHECK: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} +; R600-CHECK: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} ; SI-CHECK: @fmul_v4f32 ; SI-CHECK: V_MUL_F32 ; SI-CHECK: V_MUL_F32 |