diff options
Diffstat (limited to 'test/CodeGen/R600/rotr.ll')
| -rw-r--r-- | test/CodeGen/R600/rotr.ll | 20 |
1 files changed, 11 insertions, 9 deletions
diff --git a/test/CodeGen/R600/rotr.ll b/test/CodeGen/R600/rotr.ll index 5c4c4e9..edf7aee 100644 --- a/test/CodeGen/R600/rotr.ll +++ b/test/CodeGen/R600/rotr.ll @@ -1,10 +1,10 @@ -; RUN: llc < %s -march=r600 -mcpu=redwood -o - | FileCheck --check-prefix=R600-CHECK %s -; RUN: llc < %s -march=r600 -mcpu=SI -o - | FileCheck --check-prefix=SI-CHECK %s +; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=R600-CHECK %s +; RUN: llc < %s -march=r600 -mcpu=SI -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s -; R600-CHECK: @rotr +; R600-CHECK-LABEL: @rotr: ; R600-CHECK: BIT_ALIGN_INT -; SI-CHECK: @rotr +; SI-CHECK-LABEL: @rotr: ; SI-CHECK: V_ALIGNBIT_B32 define void @rotr(i32 addrspace(1)* %in, i32 %x, i32 %y) { entry: @@ -16,14 +16,16 @@ entry: ret void } -; R600-CHECK: @rotl +; R600-CHECK-LABEL: @rotl: ; R600-CHECK: SUB_INT {{\** T[0-9]+\.[XYZW]}}, literal.x ; R600-CHECK-NEXT: 32 -; R600-CHECK: BIT_ALIGN_INT {{\** T[0-9]+\.[XYZW]}}, KC0[2].Z, KC0[2].Z, PV.{{[XYZW]}} +; R600-CHECK: BIT_ALIGN_INT {{T[0-9]+\.[XYZW]}}, KC0[2].Z, KC0[2].Z, PV.{{[XYZW]}} -; SI-CHECK: @rotl -; SI-CHECK: V_SUB_I32_e64 [[DST:VGPR[0-9]+]], 32, {{[SV]GPR[0-9]+}} -; SI-CHECK: V_ALIGNBIT_B32 {{VGPR[0-9]+, [SV]GPR[0-9]+, VGPR[0-9]+}}, [[DST]] + +; SI-CHECK-LABEL: @rotl: +; SI-CHECK: S_SUB_I32 [[SDST:s[0-9]+]], 32, {{[s][0-9]+}} +; SI-CHECK: V_MOV_B32_e32 [[VDST:v[0-9]+]], [[SDST]] +; SI-CHECK: V_ALIGNBIT_B32 {{v[0-9]+, [s][0-9]+, v[0-9]+}}, [[VDST]] define void @rotl(i32 addrspace(1)* %in, i32 %x, i32 %y) { entry: %0 = shl i32 %x, %y |