diff options
Diffstat (limited to 'test/CodeGen/R600/setcc.ll')
-rw-r--r-- | test/CodeGen/R600/setcc.ll | 96 |
1 files changed, 64 insertions, 32 deletions
diff --git a/test/CodeGen/R600/setcc.ll b/test/CodeGen/R600/setcc.ll index 8dd2ce4..f9c7e4f 100644 --- a/test/CodeGen/R600/setcc.ll +++ b/test/CodeGen/R600/setcc.ll @@ -1,5 +1,7 @@ -;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=R600 --check-prefix=FUNC %s -;RUN: llc < %s -march=r600 -mcpu=SI -verify-machineinstrs| FileCheck --check-prefix=SI --check-prefix=FUNC %s +; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=R600 --check-prefix=FUNC %s +; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck -check-prefix=SI -check-prefix=FUNC %s + +declare i32 @llvm.r600.read.tidig.x() nounwind readnone ; FUNC-LABEL: {{^}}setcc_v2i32: ; R600-DAG: SETE_INT * T{{[0-9]+\.[XYZW]}}, KC0[3].X, KC0[3].Z @@ -94,11 +96,9 @@ entry: ; R600-DAG: SETNE_DX10 ; R600-DAG: AND_INT ; R600-DAG: SETNE_INT -; SI: v_cmp_o_f32 -; SI: v_cmp_neq_f32 -; SI: v_cndmask_b32_e64 -; SI: v_cndmask_b32_e64 -; SI: v_and_b32_e32 + +; SI: v_cmp_lg_f32_e32 vcc +; SI-NEXT: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1, vcc define void @f32_one(i32 addrspace(1)* %out, float %a, float %b) { entry: %0 = fcmp one float %a, %b @@ -128,11 +128,9 @@ entry: ; R600-DAG: SETE_DX10 ; R600-DAG: OR_INT ; R600-DAG: SETNE_INT -; SI: v_cmp_u_f32 -; SI: v_cmp_eq_f32 -; SI: v_cndmask_b32_e64 -; SI: v_cndmask_b32_e64 -; SI: v_or_b32_e32 + +; SI: v_cmp_nlg_f32_e32 vcc +; SI-NEXT: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1, vcc define void @f32_ueq(i32 addrspace(1)* %out, float %a, float %b) { entry: %0 = fcmp ueq float %a, %b @@ -144,11 +142,8 @@ entry: ; FUNC-LABEL: {{^}}f32_ugt: ; R600: SETGE ; R600: SETE_DX10 -; SI: v_cmp_u_f32 -; SI: v_cmp_gt_f32 -; SI: v_cndmask_b32_e64 -; SI: v_cndmask_b32_e64 -; SI: v_or_b32_e32 +; SI: v_cmp_nle_f32_e32 vcc +; SI-NEXT: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1, vcc define void @f32_ugt(i32 addrspace(1)* %out, float %a, float %b) { entry: %0 = fcmp ugt float %a, %b @@ -160,11 +155,9 @@ entry: ; FUNC-LABEL: {{^}}f32_uge: ; R600: SETGT ; R600: SETE_DX10 -; SI: v_cmp_u_f32 -; SI: v_cmp_ge_f32 -; SI: v_cndmask_b32_e64 -; SI: v_cndmask_b32_e64 -; SI: v_or_b32_e32 + +; SI: v_cmp_nlt_f32_e32 vcc +; SI-NEXT: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1, vcc define void @f32_uge(i32 addrspace(1)* %out, float %a, float %b) { entry: %0 = fcmp uge float %a, %b @@ -176,11 +169,9 @@ entry: ; FUNC-LABEL: {{^}}f32_ult: ; R600: SETGE ; R600: SETE_DX10 -; SI: v_cmp_u_f32 -; SI: v_cmp_lt_f32 -; SI: v_cndmask_b32_e64 -; SI: v_cndmask_b32_e64 -; SI: v_or_b32_e32 + +; SI: v_cmp_nge_f32_e32 vcc +; SI-NEXT: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1, vcc define void @f32_ult(i32 addrspace(1)* %out, float %a, float %b) { entry: %0 = fcmp ult float %a, %b @@ -192,11 +183,9 @@ entry: ; FUNC-LABEL: {{^}}f32_ule: ; R600: SETGT ; R600: SETE_DX10 -; SI: v_cmp_u_f32 -; SI: v_cmp_le_f32 -; SI: v_cndmask_b32_e64 -; SI: v_cndmask_b32_e64 -; SI: v_or_b32_e32 + +; SI: v_cmp_ngt_f32_e32 vcc +; SI-NEXT: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1, vcc define void @f32_ule(i32 addrspace(1)* %out, float %a, float %b) { entry: %0 = fcmp ule float %a, %b @@ -343,3 +332,46 @@ entry: store i32 %1, i32 addrspace(1)* %out ret void } + +; FIXME: This does 4 compares +; FUNC-LABEL: {{^}}v3i32_eq: +; SI-DAG: v_cmp_eq_i32 +; SI-DAG: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1, +; SI-DAG: v_cmp_eq_i32 +; SI-DAG: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1, +; SI-DAG: v_cmp_eq_i32 +; SI-DAG: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1, +; SI: s_endpgm +define void @v3i32_eq(<3 x i32> addrspace(1)* %out, <3 x i32> addrspace(1)* %ptra, <3 x i32> addrspace(1)* %ptrb) { + %tid = call i32 @llvm.r600.read.tidig.x() nounwind readnone + %gep.a = getelementptr <3 x i32> addrspace(1)* %ptra, i32 %tid + %gep.b = getelementptr <3 x i32> addrspace(1)* %ptrb, i32 %tid + %gep.out = getelementptr <3 x i32> addrspace(1)* %out, i32 %tid + %a = load <3 x i32> addrspace(1)* %gep.a + %b = load <3 x i32> addrspace(1)* %gep.b + %cmp = icmp eq <3 x i32> %a, %b + %ext = sext <3 x i1> %cmp to <3 x i32> + store <3 x i32> %ext, <3 x i32> addrspace(1)* %gep.out + ret void +} + +; FUNC-LABEL: {{^}}v3i8_eq: +; SI-DAG: v_cmp_eq_i32 +; SI-DAG: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1, +; SI-DAG: v_cmp_eq_i32 +; SI-DAG: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1, +; SI-DAG: v_cmp_eq_i32 +; SI-DAG: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1, +; SI: s_endpgm +define void @v3i8_eq(<3 x i8> addrspace(1)* %out, <3 x i8> addrspace(1)* %ptra, <3 x i8> addrspace(1)* %ptrb) { + %tid = call i32 @llvm.r600.read.tidig.x() nounwind readnone + %gep.a = getelementptr <3 x i8> addrspace(1)* %ptra, i32 %tid + %gep.b = getelementptr <3 x i8> addrspace(1)* %ptrb, i32 %tid + %gep.out = getelementptr <3 x i8> addrspace(1)* %out, i32 %tid + %a = load <3 x i8> addrspace(1)* %gep.a + %b = load <3 x i8> addrspace(1)* %gep.b + %cmp = icmp eq <3 x i8> %a, %b + %ext = sext <3 x i1> %cmp to <3 x i8> + store <3 x i8> %ext, <3 x i8> addrspace(1)* %gep.out + ret void +} |