diff options
Diffstat (limited to 'test/CodeGen/Thumb/stack-access.ll')
-rw-r--r-- | test/CodeGen/Thumb/stack-access.ll | 65 |
1 files changed, 59 insertions, 6 deletions
diff --git a/test/CodeGen/Thumb/stack-access.ll b/test/CodeGen/Thumb/stack-access.ll index bcffda2..fded410 100644 --- a/test/CodeGen/Thumb/stack-access.ll +++ b/test/CodeGen/Thumb/stack-access.ll @@ -36,9 +36,9 @@ define i32 @test3() #0 { %x = alloca i8, align 1 %y = alloca i8, align 1 ; CHECK: ldr r0, [sp] - %1 = load i8* %x, align 1 + %1 = load i8, i8* %x, align 1 ; CHECK: ldr r1, [sp, #4] - %2 = load i8* %y, align 1 + %2 = load i8, i8* %y, align 1 %3 = add nsw i8 %1, %2 %4 = zext i8 %3 to i32 ret i32 %4 @@ -48,9 +48,9 @@ define i32 @test4() #0 { %x = alloca i16, align 2 %y = alloca i16, align 2 ; CHECK: ldr r0, [sp] - %1 = load i16* %x, align 2 + %1 = load i16, i16* %x, align 2 ; CHECK: ldr r1, [sp, #4] - %2 = load i16* %y, align 2 + %2 = load i16, i16* %y, align 2 %3 = add nsw i16 %1, %2 %4 = zext i16 %3 to i32 ret i32 %4 @@ -61,7 +61,7 @@ define zeroext i8 @test5() { %x = alloca i8, align 1 ; CHECK: mov r0, sp ; CHECK: ldrb r0, [r0] - %1 = load i8* %x, align 1 + %1 = load i8, i8* %x, align 1 ret i8 %1 } @@ -69,6 +69,59 @@ define zeroext i16 @test6() { %x = alloca i16, align 2 ; CHECK: mov r0, sp ; CHECK: ldrh r0, [r0] - %1 = load i16* %x, align 2 + %1 = load i16, i16* %x, align 2 ret i16 %1 } + +; Accessing the bottom of a large array shouldn't require materializing a base +define void @test7() { + %arr = alloca [200 x i32], align 4 + + ; CHECK: movs [[REG:r[0-9]+]], #1 + ; CHECK: str [[REG]], [sp, #4] + %arrayidx = getelementptr inbounds [200 x i32], [200 x i32]* %arr, i32 0, i32 1 + store i32 1, i32* %arrayidx, align 4 + + ; CHECK: str [[REG]], [sp, #16] + %arrayidx1 = getelementptr inbounds [200 x i32], [200 x i32]* %arr, i32 0, i32 4 + store i32 1, i32* %arrayidx1, align 4 + + ret void +} + +; Check that loads/stores with out-of-range offsets are handled correctly +define void @test8() { + %arr3 = alloca [224 x i32], align 4 + %arr2 = alloca [224 x i32], align 4 + %arr1 = alloca [224 x i32], align 4 + +; CHECK: movs [[REG:r[0-9]+]], #1 +; CHECK: str [[REG]], [sp] + %arr1idx1 = getelementptr inbounds [224 x i32], [224 x i32]* %arr1, i32 0, i32 0 + store i32 1, i32* %arr1idx1, align 4 + +; Offset in range for sp-based store, but not for non-sp-based store +; CHECK: str [[REG]], [sp, #128] + %arr1idx2 = getelementptr inbounds [224 x i32], [224 x i32]* %arr1, i32 0, i32 32 + store i32 1, i32* %arr1idx2, align 4 + +; CHECK: str [[REG]], [sp, #896] + %arr2idx1 = getelementptr inbounds [224 x i32], [224 x i32]* %arr2, i32 0, i32 0 + store i32 1, i32* %arr2idx1, align 4 + +; %arr2 is in range, but this element of it is not +; CHECK: str [[REG]], [{{r[0-9]+}}] + %arr2idx2 = getelementptr inbounds [224 x i32], [224 x i32]* %arr2, i32 0, i32 32 + store i32 1, i32* %arr2idx2, align 4 + +; %arr3 is not in range +; CHECK: str [[REG]], [{{r[0-9]+}}] + %arr3idx1 = getelementptr inbounds [224 x i32], [224 x i32]* %arr3, i32 0, i32 0 + store i32 1, i32* %arr3idx1, align 4 + +; CHECK: str [[REG]], [{{r[0-9]+}}] + %arr3idx2 = getelementptr inbounds [224 x i32], [224 x i32]* %arr3, i32 0, i32 32 + store i32 1, i32* %arr3idx2, align 4 + + ret void +} |