diff options
Diffstat (limited to 'test/CodeGen/X86/tailcallbyval64.ll')
| -rw-r--r-- | test/CodeGen/X86/tailcallbyval64.ll | 25 |
1 files changed, 19 insertions, 6 deletions
diff --git a/test/CodeGen/X86/tailcallbyval64.ll b/test/CodeGen/X86/tailcallbyval64.ll index 7c685b8..1b1efe7 100644 --- a/test/CodeGen/X86/tailcallbyval64.ll +++ b/test/CodeGen/X86/tailcallbyval64.ll @@ -1,15 +1,30 @@ -; RUN: llc < %s -march=x86-64 -tailcallopt | grep TAILCALL +; RUN: llc < %s -mtriple=x86_64-linux -tailcallopt | FileCheck %s + +; FIXME: Win64 does not support byval. + +; Expect the entry point. +; CHECK: tailcaller: + ; Expect 2 rep;movs because of tail call byval lowering. -; RUN: llc < %s -march=x86-64 -tailcallopt | grep rep | wc -l | grep 2 +; CHECK: rep; +; CHECK: rep; + ; A sequence of copyto/copyfrom virtual registers is used to deal with byval ; lowering appearing after moving arguments to registers. The following two ; checks verify that the register allocator changes those sequences to direct ; moves to argument register where it can (for registers that are not used in ; byval lowering - not rsi, not rdi, not rcx). ; Expect argument 4 to be moved directly to register edx. -; RUN: llc < %s -march=x86-64 -tailcallopt | grep movl | grep {7} | grep edx +; CHECK: movl $7, %edx + ; Expect argument 6 to be moved directly to register r8. -; RUN: llc < %s -march=x86-64 -tailcallopt | grep movl | grep {17} | grep r8 +; CHECK: movl $17, %r8d + +; Expect not call but jmp to @tailcallee. +; CHECK: jmp tailcallee + +; Expect the trailer. +; CHECK: .size tailcaller %struct.s = type { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, @@ -25,5 +40,3 @@ entry: %tmp4 = tail call fastcc i64 @tailcallee(%struct.s* %a byval, i64 %tmp3, i64 %b, i64 7, i64 13, i64 17) ret i64 %tmp4 } - - |