diff options
Diffstat (limited to 'test/CodeGen/X86/widen_load-2.ll')
| -rw-r--r-- | test/CodeGen/X86/widen_load-2.ll | 44 |
1 files changed, 22 insertions, 22 deletions
diff --git a/test/CodeGen/X86/widen_load-2.ll b/test/CodeGen/X86/widen_load-2.ll index c6bd964..f5ddc0e 100644 --- a/test/CodeGen/X86/widen_load-2.ll +++ b/test/CodeGen/X86/widen_load-2.ll @@ -10,8 +10,8 @@ define void @add3i32(%i32vec3* sret %ret, %i32vec3* %ap, %i32vec3* %bp) { ; CHECK-NEXT: paddd (%{{.*}}), %[[R0]] ; CHECK-NEXT: pextrd $2, %[[R0]], 8(%{{.*}}) ; CHECK-NEXT: movq %[[R0]], (%{{.*}}) - %a = load %i32vec3* %ap, align 16 - %b = load %i32vec3* %bp, align 16 + %a = load %i32vec3, %i32vec3* %ap, align 16 + %b = load %i32vec3, %i32vec3* %bp, align 16 %x = add %i32vec3 %a, %b store %i32vec3 %x, %i32vec3* %ret, align 16 ret void @@ -26,8 +26,8 @@ define void @add3i32_2(%i32vec3* sret %ret, %i32vec3* %ap, %i32vec3* %bp) { ; CHECK-NEXT: paddd %[[R0]], %[[R1]] ; CHECK-NEXT: pextrd $2, %[[R1]], 8(%{{.*}}) ; CHECK-NEXT: movq %[[R1]], (%{{.*}}) - %a = load %i32vec3* %ap, align 8 - %b = load %i32vec3* %bp, align 8 + %a = load %i32vec3, %i32vec3* %ap, align 8 + %b = load %i32vec3, %i32vec3* %bp, align 8 %x = add %i32vec3 %a, %b store %i32vec3 %x, %i32vec3* %ret, align 8 ret void @@ -43,8 +43,8 @@ define void @add7i32(%i32vec7* sret %ret, %i32vec7* %ap, %i32vec7* %bp) { ; CHECK-NEXT: pextrd $2, %[[R1]], 24(%{{.*}}) ; CHECK-NEXT: movq %[[R1]], 16(%{{.*}}) ; CHECK-NEXT: movdqa %[[R0]], (%{{.*}}) - %a = load %i32vec7* %ap, align 16 - %b = load %i32vec7* %bp, align 16 + %a = load %i32vec7, %i32vec7* %ap, align 16 + %b = load %i32vec7, %i32vec7* %bp, align 16 %x = add %i32vec7 %a, %b store %i32vec7 %x, %i32vec7* %ret, align 16 ret void @@ -62,8 +62,8 @@ define void @add12i32(%i32vec12* sret %ret, %i32vec12* %ap, %i32vec12* %bp) { ; CHECK-NEXT: movdqa %[[R2]], 32(%{{.*}}) ; CHECK-NEXT: movdqa %[[R1]], 16(%{{.*}}) ; CHECK-NEXT: movdqa %[[R0]], (%{{.*}}) - %a = load %i32vec12* %ap, align 16 - %b = load %i32vec12* %bp, align 16 + %a = load %i32vec12, %i32vec12* %ap, align 16 + %b = load %i32vec12, %i32vec12* %bp, align 16 %x = add %i32vec12 %a, %b store %i32vec12 %x, %i32vec12* %ret, align 16 ret void @@ -80,8 +80,8 @@ define void @add3i16(%i16vec3* nocapture sret %ret, %i16vec3* %ap, %i16vec3* %bp ; CHECK-NEXT: pshufb {{.*}}, %[[R1]] ; CHECK-NEXT: pmovzxdq %[[R1]], %[[R0]] ; CHECK-NEXT: movd %[[R0]], (%{{.*}}) - %a = load %i16vec3* %ap, align 16 - %b = load %i16vec3* %bp, align 16 + %a = load %i16vec3, %i16vec3* %ap, align 16 + %b = load %i16vec3, %i16vec3* %bp, align 16 %x = add %i16vec3 %a, %b store %i16vec3 %x, %i16vec3* %ret, align 16 ret void @@ -94,8 +94,8 @@ define void @add4i16(%i16vec4* nocapture sret %ret, %i16vec4* %ap, %i16vec4* %bp ; CHECK-NEXT: movq (%{{.*}}), %[[R1:xmm[0-9]+]] ; CHECK-NEXT: paddw %[[R0]], %[[R1]] ; CHECK-NEXT: movq %[[R1]], (%{{.*}}) - %a = load %i16vec4* %ap, align 16 - %b = load %i16vec4* %bp, align 16 + %a = load %i16vec4, %i16vec4* %ap, align 16 + %b = load %i16vec4, %i16vec4* %bp, align 16 %x = add %i16vec4 %a, %b store %i16vec4 %x, %i16vec4* %ret, align 16 ret void @@ -110,8 +110,8 @@ define void @add12i16(%i16vec12* nocapture sret %ret, %i16vec12* %ap, %i16vec12* ; CHECK-NEXT: paddw 16(%{{.*}}), %[[R1]] ; CHECK-NEXT: movq %[[R1]], 16(%{{.*}}) ; CHECK-NEXT: movdqa %[[R0]], (%{{.*}}) - %a = load %i16vec12* %ap, align 16 - %b = load %i16vec12* %bp, align 16 + %a = load %i16vec12, %i16vec12* %ap, align 16 + %b = load %i16vec12, %i16vec12* %bp, align 16 %x = add %i16vec12 %a, %b store %i16vec12 %x, %i16vec12* %ret, align 16 ret void @@ -129,8 +129,8 @@ define void @add18i16(%i16vec18* nocapture sret %ret, %i16vec18* %ap, %i16vec18* ; CHECK-NEXT: movd %[[R2]], 32(%{{.*}}) ; CHECK-NEXT: movdqa %[[R1]], 16(%{{.*}}) ; CHECK-NEXT: movdqa %[[R0]], (%{{.*}}) - %a = load %i16vec18* %ap, align 16 - %b = load %i16vec18* %bp, align 16 + %a = load %i16vec18, %i16vec18* %ap, align 16 + %b = load %i16vec18, %i16vec18* %bp, align 16 %x = add %i16vec18 %a, %b store %i16vec18 %x, %i16vec18* %ret, align 16 ret void @@ -148,8 +148,8 @@ define void @add3i8(%i8vec3* nocapture sret %ret, %i8vec3* %ap, %i8vec3* %bp) no ; CHECK-NEXT: pmovzxwq %[[R1]], %[[R0]] ; CHECK-NEXT: movd %[[R0]], %e[[R2:[abcd]]]x ; CHECK-NEXT: movw %[[R2]]x, (%{{.*}}) - %a = load %i8vec3* %ap, align 16 - %b = load %i8vec3* %bp, align 16 + %a = load %i8vec3, %i8vec3* %ap, align 16 + %b = load %i8vec3, %i8vec3* %bp, align 16 %x = add %i8vec3 %a, %b store %i8vec3 %x, %i8vec3* %ret, align 16 ret void @@ -167,8 +167,8 @@ define void @add31i8(%i8vec31* nocapture sret %ret, %i8vec31* %ap, %i8vec31* %bp ; CHECK-NEXT: pextrd $2, %[[R1]], 24(%{{.*}}) ; CHECK-NEXT: movq %[[R1]], 16(%{{.*}}) ; CHECK-NEXT: movdqa %[[R0]], (%{{.*}}) - %a = load %i8vec31* %ap, align 16 - %b = load %i8vec31* %bp, align 16 + %a = load %i8vec31, %i8vec31* %ap, align 16 + %b = load %i8vec31, %i8vec31* %bp, align 16 %x = add %i8vec31 %a, %b store %i8vec31 %x, %i8vec31* %ret, align 16 ret void @@ -216,9 +216,9 @@ entry: store <3 x i8> <i8 -98, i8 -98, i8 -98>, <3 x i8>* %storetmp %storetmp1 = bitcast %i8vec3pack* %rot to <3 x i8>* store <3 x i8> <i8 1, i8 1, i8 1>, <3 x i8>* %storetmp1 - %tmp = load %i8vec3pack* %X + %tmp = load %i8vec3pack, %i8vec3pack* %X %extractVec = extractvalue %i8vec3pack %tmp, 0 - %tmp2 = load %i8vec3pack* %rot + %tmp2 = load %i8vec3pack, %i8vec3pack* %rot %extractVec3 = extractvalue %i8vec3pack %tmp2, 0 %shr = lshr <3 x i8> %extractVec, %extractVec3 %storetmp4 = bitcast %i8vec3pack* %result to <3 x i8>* |