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-rw-r--r--test/CodeGen/XCore/2009-01-08-Crash.ll4
-rw-r--r--test/CodeGen/XCore/2010-02-25-LSR-Crash.ll4
-rw-r--r--test/CodeGen/XCore/2011-01-31-DAGCombineBug.ll2
-rw-r--r--test/CodeGen/XCore/atomic.ll18
-rw-r--r--test/CodeGen/XCore/codemodel.ll22
-rw-r--r--test/CodeGen/XCore/dwarf_debug.ll21
-rw-r--r--test/CodeGen/XCore/epilogue_prologue.ll8
-rw-r--r--test/CodeGen/XCore/exception.ll14
-rw-r--r--test/CodeGen/XCore/indirectbr.ll6
-rw-r--r--test/CodeGen/XCore/llvm-intrinsics.ll2
-rw-r--r--test/CodeGen/XCore/load.ll18
-rw-r--r--test/CodeGen/XCore/offset_folding.ll8
-rw-r--r--test/CodeGen/XCore/private.ll2
-rw-r--r--test/CodeGen/XCore/scavenging.ll40
-rw-r--r--test/CodeGen/XCore/store.ll8
-rw-r--r--test/CodeGen/XCore/threads.ll16
-rw-r--r--test/CodeGen/XCore/trampoline.ll10
-rw-r--r--test/CodeGen/XCore/unaligned_load.ll6
-rw-r--r--test/CodeGen/XCore/unaligned_store_combine.ll2
-rw-r--r--test/CodeGen/XCore/zextfree.ll2
20 files changed, 107 insertions, 106 deletions
diff --git a/test/CodeGen/XCore/2009-01-08-Crash.ll b/test/CodeGen/XCore/2009-01-08-Crash.ll
index a31ea1e..5eddbc3 100644
--- a/test/CodeGen/XCore/2009-01-08-Crash.ll
+++ b/test/CodeGen/XCore/2009-01-08-Crash.ll
@@ -6,7 +6,7 @@
define i32 @test(i32 %bar) nounwind readnone {
entry:
%bar_addr = alloca i32
- %0 = getelementptr i32* %bar_addr, i32 -1
- %1 = load i32* %0, align 4
+ %0 = getelementptr i32, i32* %bar_addr, i32 -1
+ %1 = load i32, i32* %0, align 4
ret i32 %1
}
diff --git a/test/CodeGen/XCore/2010-02-25-LSR-Crash.ll b/test/CodeGen/XCore/2010-02-25-LSR-Crash.ll
index 6ad9a73..693e6f0 100644
--- a/test/CodeGen/XCore/2010-02-25-LSR-Crash.ll
+++ b/test/CodeGen/XCore/2010-02-25-LSR-Crash.ll
@@ -14,9 +14,9 @@ entry:
bb3.i15.i.i: ; preds = %bb3.i15.i.i, %entry
%indvar.i.i.i = phi i32 [ %indvar.next.i.i.i, %bb3.i15.i.i ], [ 0, %entry ] ; <i32> [#uses=2]
%tmp137 = sub i32 0, %indvar.i.i.i ; <i32> [#uses=1]
- %scevgep13.i.i.i = getelementptr i32* undef, i32 %tmp137 ; <i32*> [#uses=2]
+ %scevgep13.i.i.i = getelementptr i32, i32* undef, i32 %tmp137 ; <i32*> [#uses=2]
%scevgep1314.i.i.i = bitcast i32* %scevgep13.i.i.i to %struct.dwarf_fde** ; <%struct.dwarf_fde**> [#uses=1]
- %0 = load %struct.dwarf_fde** %scevgep1314.i.i.i, align 4 ; <%struct.dwarf_fde*> [#uses=0]
+ %0 = load %struct.dwarf_fde*, %struct.dwarf_fde** %scevgep1314.i.i.i, align 4 ; <%struct.dwarf_fde*> [#uses=0]
store i32 undef, i32* %scevgep13.i.i.i
%indvar.next.i.i.i = add i32 %indvar.i.i.i, 1 ; <i32> [#uses=1]
br label %bb3.i15.i.i
diff --git a/test/CodeGen/XCore/2011-01-31-DAGCombineBug.ll b/test/CodeGen/XCore/2011-01-31-DAGCombineBug.ll
index f8fe0d2..40c9654 100644
--- a/test/CodeGen/XCore/2011-01-31-DAGCombineBug.ll
+++ b/test/CodeGen/XCore/2011-01-31-DAGCombineBug.ll
@@ -5,6 +5,6 @@
define i32 @test_entry() nounwind {
entry:
- %0 = load i32* getelementptr inbounds (%struct.st* @x, i32 0, i32 3), align 2
+ %0 = load i32, i32* getelementptr inbounds (%struct.st, %struct.st* @x, i32 0, i32 3), align 2
ret i32 %0
}
diff --git a/test/CodeGen/XCore/atomic.ll b/test/CodeGen/XCore/atomic.ll
index 6ca80cf..13579db 100644
--- a/test/CodeGen/XCore/atomic.ll
+++ b/test/CodeGen/XCore/atomic.ll
@@ -25,27 +25,27 @@ entry:
; CHECK-NEXT: ldaw r[[R1:[0-9]+]], dp[pool]
; CHECK-NEXT: #MEMBARRIER
; CHECK-NEXT: ldc r[[R2:[0-9]+]], 0
- %0 = load atomic i32* bitcast (i64* @pool to i32*) acquire, align 4
+ %0 = load atomic i32, i32* bitcast (i64* @pool to i32*) acquire, align 4
; CHECK-NEXT: ld16s r3, r[[R1]][r[[R2]]]
; CHECK-NEXT: #MEMBARRIER
- %1 = load atomic i16* bitcast (i64* @pool to i16*) acquire, align 2
+ %1 = load atomic i16, i16* bitcast (i64* @pool to i16*) acquire, align 2
; CHECK-NEXT: ld8u r11, r[[R1]][r[[R2]]]
; CHECK-NEXT: #MEMBARRIER
- %2 = load atomic i8* bitcast (i64* @pool to i8*) acquire, align 1
+ %2 = load atomic i8, i8* bitcast (i64* @pool to i8*) acquire, align 1
; CHECK-NEXT: ldw r4, dp[pool]
; CHECK-NEXT: #MEMBARRIER
- %3 = load atomic i32* bitcast (i64* @pool to i32*) seq_cst, align 4
+ %3 = load atomic i32, i32* bitcast (i64* @pool to i32*) seq_cst, align 4
; CHECK-NEXT: ld16s r5, r[[R1]][r[[R2]]]
; CHECK-NEXT: #MEMBARRIER
- %4 = load atomic i16* bitcast (i64* @pool to i16*) seq_cst, align 2
+ %4 = load atomic i16, i16* bitcast (i64* @pool to i16*) seq_cst, align 2
; CHECK-NEXT: ld8u r6, r[[R1]][r[[R2]]]
; CHECK-NEXT: #MEMBARRIER
- %5 = load atomic i8* bitcast (i64* @pool to i8*) seq_cst, align 1
+ %5 = load atomic i8, i8* bitcast (i64* @pool to i8*) seq_cst, align 1
; CHECK-NEXT: #MEMBARRIER
; CHECK-NEXT: stw r[[R0]], dp[pool]
@@ -80,11 +80,11 @@ entry:
; CHECK-NEXT: st16 r[[R0]], r[[R1]][r[[R2]]]
; CHECK-NEXT: ld8u r[[R0]], r[[R1]][r[[R2]]]
; CHECK-NEXT: st8 r[[R0]], r[[R1]][r[[R2]]]
- %6 = load atomic i32* bitcast (i64* @pool to i32*) monotonic, align 4
+ %6 = load atomic i32, i32* bitcast (i64* @pool to i32*) monotonic, align 4
store atomic i32 %6, i32* bitcast (i64* @pool to i32*) monotonic, align 4
- %7 = load atomic i16* bitcast (i64* @pool to i16*) monotonic, align 2
+ %7 = load atomic i16, i16* bitcast (i64* @pool to i16*) monotonic, align 2
store atomic i16 %7, i16* bitcast (i64* @pool to i16*) monotonic, align 2
- %8 = load atomic i8* bitcast (i64* @pool to i8*) monotonic, align 1
+ %8 = load atomic i8, i8* bitcast (i64* @pool to i8*) monotonic, align 1
store atomic i8 %8, i8* bitcast (i64* @pool to i8*) monotonic, align 1
ret void
diff --git a/test/CodeGen/XCore/codemodel.ll b/test/CodeGen/XCore/codemodel.ll
index 0245893..4e63799 100644
--- a/test/CodeGen/XCore/codemodel.ll
+++ b/test/CodeGen/XCore/codemodel.ll
@@ -96,22 +96,22 @@ entry:
; LARGE: retsp 0
define i32 @f(i32* %i) {
entry:
- %0 = getelementptr inbounds i32* %i, i32 16383
- %1 = load i32* %0
- %2 = getelementptr inbounds i32* %i, i32 16384
- %3 = load i32* %2
+ %0 = getelementptr inbounds i32, i32* %i, i32 16383
+ %1 = load i32, i32* %0
+ %2 = getelementptr inbounds i32, i32* %i, i32 16384
+ %3 = load i32, i32* %2
%4 = add nsw i32 %1, %3
- %5 = load i32* getelementptr inbounds ([100 x i32]* @l, i32 0, i32 0)
+ %5 = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @l, i32 0, i32 0)
%6 = add nsw i32 %4, %5
- %7 = load i32* getelementptr inbounds ([100 x i32]* @l, i32 0, i32 1)
+ %7 = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @l, i32 0, i32 1)
%8 = add nsw i32 %6, %7
- %9 = load i32* getelementptr inbounds ([100 x i32]* @l, i32 0, i32 98)
+ %9 = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @l, i32 0, i32 98)
%10 = add nsw i32 %8, %9
- %11 = load i32* getelementptr inbounds ([100 x i32]* @l, i32 0, i32 99)
+ %11 = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @l, i32 0, i32 99)
%12 = add nsw i32 %10, %11
- %13 = load i32* getelementptr inbounds ([10 x i32]* @s, i32 0, i32 0)
+ %13 = load i32, i32* getelementptr inbounds ([10 x i32], [10 x i32]* @s, i32 0, i32 0)
%14 = add nsw i32 %12, %13
- %15 = load i32* getelementptr inbounds ([10 x i32]* @s, i32 0, i32 9)
+ %15 = load i32, i32* getelementptr inbounds ([10 x i32], [10 x i32]* @s, i32 0, i32 9)
%16 = add nsw i32 %14, %15
ret i32 %16
}
@@ -132,7 +132,7 @@ entry:
@NoSize = external global [0 x i32]
define i32 @UnknownSize() nounwind {
entry:
- %0 = load i32* getelementptr inbounds ([0 x i32]* @NoSize, i32 0, i32 10)
+ %0 = load i32, i32* getelementptr inbounds ([0 x i32], [0 x i32]* @NoSize, i32 0, i32 10)
ret i32 %0
}
diff --git a/test/CodeGen/XCore/dwarf_debug.ll b/test/CodeGen/XCore/dwarf_debug.ll
index 8c9c47d..66b6428 100644
--- a/test/CodeGen/XCore/dwarf_debug.ll
+++ b/test/CodeGen/XCore/dwarf_debug.ll
@@ -6,15 +6,15 @@
; CHECK-LABEL: f
; CHECK: entsp 2
; ...the prologue...
-; CHECK: .loc 1 2 0 prologue_end # :2:0
+; CHECK: .loc 1 2 0 prologue_end # test.c:2:0
; CHECK: add r0, r0, 1
; CHECK: retsp 2
define i32 @f(i32 %a) {
entry:
%a.addr = alloca i32, align 4
store i32 %a, i32* %a.addr, align 4
- call void @llvm.dbg.declare(metadata i32* %a.addr, metadata !11, metadata !{!"0x102"}), !dbg !12
- %0 = load i32* %a.addr, align 4, !dbg !12
+ call void @llvm.dbg.declare(metadata i32* %a.addr, metadata !11, metadata !MDExpression()), !dbg !12
+ %0 = load i32, i32* %a.addr, align 4, !dbg !12
%add = add nsw i32 %0, 1, !dbg !12
ret i32 %add, !dbg !12
}
@@ -23,17 +23,16 @@ declare void @llvm.dbg.declare(metadata, metadata, metadata)
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!9, !10}
-!0 = !{!"0x11\0012\00\000\00\000\00\001", !1, !2, !2, !3, !2, !2} ; [ DW_TAG_compile_unit ]
-!1 = !{!"", !""}
+!0 = !MDCompileUnit(language: DW_LANG_C99, isOptimized: false, emissionKind: 1, file: !1, enums: !2, retainedTypes: !2, subprograms: !3, globals: !2, imports: !2)
+!1 = !MDFile(filename: "test.c", directory: "")
!2 = !{}
!3 = !{!4}
-!4 = !{!"0x2e\00f\00f\00\002\000\001\000\006\00256\000\002", !1, !5, !6, null, i32 (i32)* @f, null, null, !2} ; [ DW_TAG_subprogram ]
-!5 = !{!"0x29", !1} ; [ DW_TAG_file_type ]
-!6 = !{!"0x15\00\000\000\000\000\000\000", i32 0, null, null, !7, null, null, null} ; [ DW_TAG_subroutine_type ]
+!4 = !MDSubprogram(name: "f", line: 2, isLocal: false, isDefinition: true, virtualIndex: 6, flags: DIFlagPrototyped, isOptimized: false, scopeLine: 2, file: !1, scope: !1, type: !6, function: i32 (i32)* @f, variables: !2)
+!6 = !MDSubroutineType(types: !7)
!7 = !{!8, !8}
-!8 = !{!"0x24\00int\000\0032\0032\000\000\005", null, null} ; [ DW_TAG_base_type ]
+!8 = !MDBasicType(tag: DW_TAG_base_type, name: "int", size: 32, align: 32, encoding: DW_ATE_signed)
!9 = !{i32 2, !"Dwarf Version", i32 4}
-!10 = !{i32 2, !"Debug Info Version", i32 2}
-!11 = !{!"0x101\00a\0016777218\000", !4, !5, !8} ; [ DW_TAG_arg_variable ]
+!10 = !{i32 2, !"Debug Info Version", i32 3}
+!11 = !MDLocalVariable(tag: DW_TAG_arg_variable, name: "a", line: 2, arg: 1, scope: !4, file: !1, type: !8)
!12 = !MDLocation(line: 2, scope: !4)
diff --git a/test/CodeGen/XCore/epilogue_prologue.ll b/test/CodeGen/XCore/epilogue_prologue.ll
index 9997814..923cc4a 100644
--- a/test/CodeGen/XCore/epilogue_prologue.ll
+++ b/test/CodeGen/XCore/epilogue_prologue.ll
@@ -199,9 +199,9 @@ declare void @f5(i32*)
define i32 @f6(i32 %i) {
entry:
%0 = alloca [200000 x i32]
- %1 = getelementptr inbounds [200000 x i32]* %0, i32 0, i32 0
+ %1 = getelementptr inbounds [200000 x i32], [200000 x i32]* %0, i32 0, i32 0
call void @f5(i32* %1)
- %2 = getelementptr inbounds [200000 x i32]* %0, i32 0, i32 199999
+ %2 = getelementptr inbounds [200000 x i32], [200000 x i32]* %0, i32 0, i32 199999
call void @f5(i32* %2)
ret i32 %i
}
@@ -229,7 +229,7 @@ entry:
define void @f8() nounwind {
entry:
%0 = alloca [256 x i32]
- %1 = getelementptr inbounds [256 x i32]* %0, i32 0, i32 253
+ %1 = getelementptr inbounds [256 x i32], [256 x i32]* %0, i32 0, i32 253
call void @f5(i32* %1)
ret void
}
@@ -257,7 +257,7 @@ entry:
define void @f9() nounwind {
entry:
%0 = alloca [32768 x i32]
- %1 = getelementptr inbounds [32768 x i32]* %0, i32 0, i32 32765
+ %1 = getelementptr inbounds [32768 x i32], [32768 x i32]* %0, i32 0, i32 32765
call void @f5(i32* %1)
ret void
}
diff --git a/test/CodeGen/XCore/exception.ll b/test/CodeGen/XCore/exception.ll
index fec83eb..705c6b4 100644
--- a/test/CodeGen/XCore/exception.ll
+++ b/test/CodeGen/XCore/exception.ll
@@ -39,10 +39,10 @@ entry:
unreachable
}
-; CHECK-LABEL: fn_catch
+; CHECK-LABEL: fn_catch:
+; CHECK-NEXT: [[START:.L[a-zA-Z0-9_]+]]
; CHECK: .cfi_startproc
; CHECK: .cfi_personality 0, __gxx_personality_v0
-; CHECK: [[START:.L[a-zA-Z0-9_]+]]
; CHECK: .cfi_lsda 0, [[LSDA:.L[a-zA-Z0-9_]+]]
; CHECK: entsp 4
; CHECK: .cfi_def_cfa_offset 16
@@ -78,21 +78,22 @@ cont:
; CHECK: bl __cxa_end_catch
lpad:
%0 = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*)
+ cleanup
catch i8* bitcast (i8** @_ZTIi to i8*)
catch i8* bitcast (i8** @_ZTId to i8*)
%1 = extractvalue { i8*, i32 } %0, 0
%2 = extractvalue { i8*, i32 } %0, 1
%3 = call i8* @__cxa_begin_catch(i8* %1) nounwind
%4 = bitcast i8* %3 to i32*
- %5 = load i32* %4
+ %5 = load i32, i32* %4
call void @__cxa_end_catch() nounwind
; CHECK: eq r0, r6, r5
; CHECK: bf r0, [[RETURN]]
; CHECK: mov r0, r4
; CHECK: bl _Unwind_Resume
-; CHECK: .cfi_endproc
; CHECK: [[END:.L[a-zA-Z0-9_]+]]
+; CHECK: .cfi_endproc
%6 = icmp eq i32 %5, %2
br i1 %6, label %Resume, label %Exit
Resume:
@@ -110,13 +111,14 @@ Exit:
; CHECK: .long [[PRE_G]]-[[START]]
; CHECK: .long [[POST_G]]-[[PRE_G]]
; CHECK: .long [[LANDING]]-[[START]]
-; CHECK: .byte 3
+; CHECK: .byte 5
; CHECK: .long [[POST_G]]-[[START]]
; CHECK: .long [[END]]-[[POST_G]]
; CHECK: .long 0
; CHECK: .byte 0
-; CHECK: .byte 1
; CHECK: .byte 0
+; CHECK: .byte 1
+; CHECK: .byte 125
; CHECK: .byte 2
; CHECK: .byte 125
; CHECK: .long _ZTIi
diff --git a/test/CodeGen/XCore/indirectbr.ll b/test/CodeGen/XCore/indirectbr.ll
index d7758ea..9723cdc 100644
--- a/test/CodeGen/XCore/indirectbr.ll
+++ b/test/CodeGen/XCore/indirectbr.ll
@@ -6,7 +6,7 @@
define internal i32 @foo(i32 %i) nounwind {
; CHECK-LABEL: foo:
entry:
- %0 = load i8** @nextaddr, align 4 ; <i8*> [#uses=2]
+ %0 = load i8*, i8** @nextaddr, align 4 ; <i8*> [#uses=2]
%1 = icmp eq i8* %0, null ; <i1> [#uses=1]
br i1 %1, label %bb3, label %bb2
@@ -16,8 +16,8 @@ bb2: ; preds = %entry, %bb3
indirectbr i8* %gotovar.4.0, [label %L5, label %L4, label %L3, label %L2, label %L1]
bb3: ; preds = %entry
- %2 = getelementptr inbounds [5 x i8*]* @C.0.2070, i32 0, i32 %i ; <i8**> [#uses=1]
- %gotovar.4.0.pre = load i8** %2, align 4 ; <i8*> [#uses=1]
+ %2 = getelementptr inbounds [5 x i8*], [5 x i8*]* @C.0.2070, i32 0, i32 %i ; <i8**> [#uses=1]
+ %gotovar.4.0.pre = load i8*, i8** %2, align 4 ; <i8*> [#uses=1]
br label %bb2
L5: ; preds = %bb2
diff --git a/test/CodeGen/XCore/llvm-intrinsics.ll b/test/CodeGen/XCore/llvm-intrinsics.ll
index b436282..539bf19 100644
--- a/test/CodeGen/XCore/llvm-intrinsics.ll
+++ b/test/CodeGen/XCore/llvm-intrinsics.ll
@@ -145,7 +145,7 @@ entry:
; CHECK-NEXT: set sp, r2
; CHECK-NEXT: bau r3
call void (...)* @foo()
- %0 = load i32* @offset
+ %0 = load i32, i32* @offset
call void @llvm.eh.return.i32(i32 %0, i8* @handler)
unreachable
}
diff --git a/test/CodeGen/XCore/load.ll b/test/CodeGen/XCore/load.ll
index c7fc2a3..bba7f72 100644
--- a/test/CodeGen/XCore/load.ll
+++ b/test/CodeGen/XCore/load.ll
@@ -4,8 +4,8 @@ define i32 @load32(i32* %p, i32 %offset) nounwind {
entry:
; CHECK-LABEL: load32:
; CHECK: ldw r0, r0[r1]
- %0 = getelementptr i32* %p, i32 %offset
- %1 = load i32* %0, align 4
+ %0 = getelementptr i32, i32* %p, i32 %offset
+ %1 = load i32, i32* %0, align 4
ret i32 %1
}
@@ -13,8 +13,8 @@ define i32 @load32_imm(i32* %p) nounwind {
entry:
; CHECK-LABEL: load32_imm:
; CHECK: ldw r0, r0[11]
- %0 = getelementptr i32* %p, i32 11
- %1 = load i32* %0, align 4
+ %0 = getelementptr i32, i32* %p, i32 11
+ %1 = load i32, i32* %0, align 4
ret i32 %1
}
@@ -23,8 +23,8 @@ entry:
; CHECK-LABEL: load16:
; CHECK: ld16s r0, r0[r1]
; CHECK-NOT: sext
- %0 = getelementptr i16* %p, i32 %offset
- %1 = load i16* %0, align 2
+ %0 = getelementptr i16, i16* %p, i32 %offset
+ %1 = load i16, i16* %0, align 2
%2 = sext i16 %1 to i32
ret i32 %2
}
@@ -34,8 +34,8 @@ entry:
; CHECK-LABEL: load8:
; CHECK: ld8u r0, r0[r1]
; CHECK-NOT: zext
- %0 = getelementptr i8* %p, i32 %offset
- %1 = load i8* %0, align 1
+ %0 = getelementptr i8, i8* %p, i32 %offset
+ %1 = load i8, i8* %0, align 1
%2 = zext i8 %1 to i32
ret i32 %2
}
@@ -45,6 +45,6 @@ define i32 @load_cp() nounwind {
entry:
; CHECK-LABEL: load_cp:
; CHECK: ldw r0, cp[GConst]
- %0 = load i32* @GConst
+ %0 = load i32, i32* @GConst
ret i32 %0
}
diff --git a/test/CodeGen/XCore/offset_folding.ll b/test/CodeGen/XCore/offset_folding.ll
index 8085a0f..ab29ad5 100644
--- a/test/CodeGen/XCore/offset_folding.ll
+++ b/test/CodeGen/XCore/offset_folding.ll
@@ -8,7 +8,7 @@ entry:
; CHECK-LABEL: f1:
; CHECK: ldaw r11, cp[a+4]
; CHECK: mov r0, r11
- %0 = getelementptr [0 x i32]* @a, i32 0, i32 1
+ %0 = getelementptr [0 x i32], [0 x i32]* @a, i32 0, i32 1
ret i32* %0
}
@@ -16,7 +16,7 @@ define i32 *@f2() nounwind {
entry:
; CHECK-LABEL: f2:
; CHECK: ldaw r0, dp[b+4]
- %0 = getelementptr [0 x i32]* @b, i32 0, i32 1
+ %0 = getelementptr [0 x i32], [0 x i32]* @b, i32 0, i32 1
ret i32* %0
}
@@ -28,7 +28,7 @@ entry:
; CHECK-LABEL: f3:
; CHECK: ldaw r11, cp[a]
; CHECK: sub r0, r11, 4
- %0 = getelementptr [0 x i32]* @a, i32 0, i32 -1
+ %0 = getelementptr [0 x i32], [0 x i32]* @a, i32 0, i32 -1
ret i32* %0
}
@@ -37,6 +37,6 @@ entry:
; CHECK-LABEL: f4:
; CHECK: ldaw [[REG:r[0-9]+]], dp[b]
; CHECK: sub r0, [[REG]], 4
- %0 = getelementptr [0 x i32]* @b, i32 0, i32 -1
+ %0 = getelementptr [0 x i32], [0 x i32]* @b, i32 0, i32 -1
ret i32* %0
}
diff --git a/test/CodeGen/XCore/private.ll b/test/CodeGen/XCore/private.ll
index 474448a..a188864 100644
--- a/test/CodeGen/XCore/private.ll
+++ b/test/CodeGen/XCore/private.ll
@@ -14,7 +14,7 @@ define i32 @bar() {
; CHECK: bl .Lfoo
; CHECK: ldw r0, dp[.Lbaz]
call void @foo()
- %1 = load i32* @baz, align 4
+ %1 = load i32, i32* @baz, align 4
ret i32 %1
}
diff --git a/test/CodeGen/XCore/scavenging.ll b/test/CodeGen/XCore/scavenging.ll
index a0c8a2e..7b6f54e 100644
--- a/test/CodeGen/XCore/scavenging.ll
+++ b/test/CodeGen/XCore/scavenging.ll
@@ -17,21 +17,21 @@
define void @f() nounwind {
entry:
%x = alloca [100 x i32], align 4 ; <[100 x i32]*> [#uses=2]
- %0 = load i32* @size, align 4 ; <i32> [#uses=1]
+ %0 = load i32, i32* @size, align 4 ; <i32> [#uses=1]
%1 = alloca i32, i32 %0, align 4 ; <i32*> [#uses=1]
- %2 = load volatile i32* @g0, align 4 ; <i32> [#uses=1]
- %3 = load volatile i32* @g1, align 4 ; <i32> [#uses=1]
- %4 = load volatile i32* @g2, align 4 ; <i32> [#uses=1]
- %5 = load volatile i32* @g3, align 4 ; <i32> [#uses=1]
- %6 = load volatile i32* @g4, align 4 ; <i32> [#uses=1]
- %7 = load volatile i32* @g5, align 4 ; <i32> [#uses=1]
- %8 = load volatile i32* @g6, align 4 ; <i32> [#uses=1]
- %9 = load volatile i32* @g7, align 4 ; <i32> [#uses=1]
- %10 = load volatile i32* @g8, align 4 ; <i32> [#uses=1]
- %11 = load volatile i32* @g9, align 4 ; <i32> [#uses=1]
- %12 = load volatile i32* @g10, align 4 ; <i32> [#uses=1]
- %13 = load volatile i32* @g11, align 4 ; <i32> [#uses=2]
- %14 = getelementptr [100 x i32]* %x, i32 0, i32 50 ; <i32*> [#uses=1]
+ %2 = load volatile i32, i32* @g0, align 4 ; <i32> [#uses=1]
+ %3 = load volatile i32, i32* @g1, align 4 ; <i32> [#uses=1]
+ %4 = load volatile i32, i32* @g2, align 4 ; <i32> [#uses=1]
+ %5 = load volatile i32, i32* @g3, align 4 ; <i32> [#uses=1]
+ %6 = load volatile i32, i32* @g4, align 4 ; <i32> [#uses=1]
+ %7 = load volatile i32, i32* @g5, align 4 ; <i32> [#uses=1]
+ %8 = load volatile i32, i32* @g6, align 4 ; <i32> [#uses=1]
+ %9 = load volatile i32, i32* @g7, align 4 ; <i32> [#uses=1]
+ %10 = load volatile i32, i32* @g8, align 4 ; <i32> [#uses=1]
+ %11 = load volatile i32, i32* @g9, align 4 ; <i32> [#uses=1]
+ %12 = load volatile i32, i32* @g10, align 4 ; <i32> [#uses=1]
+ %13 = load volatile i32, i32* @g11, align 4 ; <i32> [#uses=2]
+ %14 = getelementptr [100 x i32], [100 x i32]* %x, i32 0, i32 50 ; <i32*> [#uses=1]
store i32 %13, i32* %14, align 4
store volatile i32 %13, i32* @g11, align 4
store volatile i32 %12, i32* @g10, align 4
@@ -45,7 +45,7 @@ entry:
store volatile i32 %4, i32* @g2, align 4
store volatile i32 %3, i32* @g1, align 4
store volatile i32 %2, i32* @g0, align 4
- %x1 = getelementptr [100 x i32]* %x, i32 0, i32 0 ; <i32*> [#uses=1]
+ %x1 = getelementptr [100 x i32], [100 x i32]* %x, i32 0, i32 0 ; <i32*> [#uses=1]
call void @g(i32* %x1, i32* %1) nounwind
ret void
}
@@ -103,15 +103,15 @@ declare void @g(i32*, i32*)
define void @ScavengeSlots(i32 %r0, i32 %r1, i32 %r2, i32 %r3, i32 %r4) nounwind {
entry:
%Data = alloca [100000 x i32]
- %i0 = getelementptr inbounds [100000 x i32]* %Data, i32 0, i32 80000
+ %i0 = getelementptr inbounds [100000 x i32], [100000 x i32]* %Data, i32 0, i32 80000
store volatile i32 %r0, i32* %i0
- %i1 = getelementptr inbounds [100000 x i32]* %Data, i32 0, i32 81000
+ %i1 = getelementptr inbounds [100000 x i32], [100000 x i32]* %Data, i32 0, i32 81000
store volatile i32 %r1, i32* %i1
- %i2 = getelementptr inbounds [100000 x i32]* %Data, i32 0, i32 82000
+ %i2 = getelementptr inbounds [100000 x i32], [100000 x i32]* %Data, i32 0, i32 82000
store volatile i32 %r2, i32* %i2
- %i3 = getelementptr inbounds [100000 x i32]* %Data, i32 0, i32 83000
+ %i3 = getelementptr inbounds [100000 x i32], [100000 x i32]* %Data, i32 0, i32 83000
store volatile i32 %r3, i32* %i3
- %i4 = getelementptr inbounds [100000 x i32]* %Data, i32 0, i32 84000
+ %i4 = getelementptr inbounds [100000 x i32], [100000 x i32]* %Data, i32 0, i32 84000
store volatile i32 %r4, i32* %i4
ret void
}
diff --git a/test/CodeGen/XCore/store.ll b/test/CodeGen/XCore/store.ll
index 87553d8..a42b444 100644
--- a/test/CodeGen/XCore/store.ll
+++ b/test/CodeGen/XCore/store.ll
@@ -4,7 +4,7 @@ define void @store32(i32* %p, i32 %offset, i32 %val) nounwind {
entry:
; CHECK-LABEL: store32:
; CHECK: stw r2, r0[r1]
- %0 = getelementptr i32* %p, i32 %offset
+ %0 = getelementptr i32, i32* %p, i32 %offset
store i32 %val, i32* %0, align 4
ret void
}
@@ -13,7 +13,7 @@ define void @store32_imm(i32* %p, i32 %val) nounwind {
entry:
; CHECK-LABEL: store32_imm:
; CHECK: stw r1, r0[11]
- %0 = getelementptr i32* %p, i32 11
+ %0 = getelementptr i32, i32* %p, i32 11
store i32 %val, i32* %0, align 4
ret void
}
@@ -22,7 +22,7 @@ define void @store16(i16* %p, i32 %offset, i16 %val) nounwind {
entry:
; CHECK-LABEL: store16:
; CHECK: st16 r2, r0[r1]
- %0 = getelementptr i16* %p, i32 %offset
+ %0 = getelementptr i16, i16* %p, i32 %offset
store i16 %val, i16* %0, align 2
ret void
}
@@ -31,7 +31,7 @@ define void @store8(i8* %p, i32 %offset, i8 %val) nounwind {
entry:
; CHECK-LABEL: store8:
; CHECK: st8 r2, r0[r1]
- %0 = getelementptr i8* %p, i32 %offset
+ %0 = getelementptr i8, i8* %p, i32 %offset
store i8 %val, i8* %0, align 1
ret void
}
diff --git a/test/CodeGen/XCore/threads.ll b/test/CodeGen/XCore/threads.ll
index c50da1d..0c25314 100644
--- a/test/CodeGen/XCore/threads.ll
+++ b/test/CodeGen/XCore/threads.ll
@@ -78,7 +78,7 @@ define i32* @f_tl() {
; CHECK: ldc [[R2:r[0-9]]], 12
; r0 = id*12 + 8 + &tl
; CHECK: lmul {{r[0-9]}}, r0, r11, [[R2]], [[R0]], [[R1]]
- ret i32* getelementptr inbounds ([3 x i32]* @tl, i32 0, i32 2)
+ ret i32* getelementptr inbounds ([3 x i32], [3 x i32]* @tl, i32 0, i32 2)
}
define i32* @f_tle() {
@@ -88,7 +88,7 @@ define i32* @f_tle() {
; CHECK: ldaw [[R1:r[0-9]]], dp[tle]
; r0 = &tl + id*8
; CHECK: add r0, [[R1]], [[R0]]
- ret i32* getelementptr inbounds ([2 x i32]* @tle, i32 0, i32 0)
+ ret i32* getelementptr inbounds ([2 x i32], [2 x i32]* @tle, i32 0, i32 0)
}
define i32 @f_tlExpr () {
@@ -99,8 +99,8 @@ define i32 @f_tlExpr () {
; CHECK: add [[R2:r[0-9]]], [[R1]], [[R0]]
; CHECK: add r0, [[R2]], [[R2]]
ret i32 add(
- i32 ptrtoint( i32* getelementptr inbounds ([2 x i32]* @tle, i32 0, i32 0) to i32),
- i32 ptrtoint( i32* getelementptr inbounds ([2 x i32]* @tle, i32 0, i32 0) to i32))
+ i32 ptrtoint( i32* getelementptr inbounds ([2 x i32], [2 x i32]* @tle, i32 0, i32 0) to i32),
+ i32 ptrtoint( i32* getelementptr inbounds ([2 x i32], [2 x i32]* @tle, i32 0, i32 0) to i32))
}
define void @phiNode1() {
@@ -113,8 +113,8 @@ define void @phiNode1() {
entry:
br label %ConstantExpPhiNode
ConstantExpPhiNode:
- %ptr = phi i32* [ getelementptr inbounds ([3 x i32]* @tl, i32 0, i32 0), %entry ],
- [ getelementptr inbounds ([3 x i32]* @tl, i32 0, i32 0), %ConstantExpPhiNode ]
+ %ptr = phi i32* [ getelementptr inbounds ([3 x i32], [3 x i32]* @tl, i32 0, i32 0), %entry ],
+ [ getelementptr inbounds ([3 x i32], [3 x i32]* @tl, i32 0, i32 0), %ConstantExpPhiNode ]
br label %ConstantExpPhiNode
exit:
ret void
@@ -134,8 +134,8 @@ define void @phiNode2( i1 %bool) {
entry:
br i1 %bool, label %ConstantExpPhiNode, label %exit
ConstantExpPhiNode:
- %ptr = phi i32* [ getelementptr inbounds ([3 x i32]* @tl, i32 0, i32 0), %entry ],
- [ getelementptr inbounds ([3 x i32]* @tl, i32 0, i32 0), %ConstantExpPhiNode ]
+ %ptr = phi i32* [ getelementptr inbounds ([3 x i32], [3 x i32]* @tl, i32 0, i32 0), %entry ],
+ [ getelementptr inbounds ([3 x i32], [3 x i32]* @tl, i32 0, i32 0), %ConstantExpPhiNode ]
br label %ConstantExpPhiNode
exit:
ret void
diff --git a/test/CodeGen/XCore/trampoline.ll b/test/CodeGen/XCore/trampoline.ll
index 7ca331a..a728000 100644
--- a/test/CodeGen/XCore/trampoline.ll
+++ b/test/CodeGen/XCore/trampoline.ll
@@ -9,14 +9,14 @@ entry:
; CHECK: stw r11, sp[7]
%TRAMP.23 = alloca [20 x i8], align 2
%FRAME.0 = alloca %struct.FRAME.f, align 4
- %TRAMP.23.sub = getelementptr inbounds [20 x i8]* %TRAMP.23, i32 0, i32 0
+ %TRAMP.23.sub = getelementptr inbounds [20 x i8], [20 x i8]* %TRAMP.23, i32 0, i32 0
%FRAME.02 = bitcast %struct.FRAME.f* %FRAME.0 to i8*
call void @llvm.init.trampoline(i8* %TRAMP.23.sub, i8* bitcast (i32 (%struct.FRAME.f*)* @g.1101 to i8*), i8* %FRAME.02)
%tramp = call i8* @llvm.adjust.trampoline(i8* %TRAMP.23.sub)
- %0 = getelementptr inbounds %struct.FRAME.f* %FRAME.0, i32 0, i32 1
+ %0 = getelementptr inbounds %struct.FRAME.f, %struct.FRAME.f* %FRAME.0, i32 0, i32 1
%1 = bitcast i8* %tramp to i32 ()*
store i32 ()* %1, i32 ()** %0, align 4
- %2 = getelementptr inbounds %struct.FRAME.f* %FRAME.0, i32 0, i32 0
+ %2 = getelementptr inbounds %struct.FRAME.f, %struct.FRAME.f* %FRAME.0, i32 0, i32 0
store i32 1, i32* %2, align 4
call void @h(i32 ()* %1) nounwind
ret void
@@ -28,8 +28,8 @@ entry:
; CHECK: ldw r11, sp[0]
; CHECK-NEXT: ldw r0, r11[0]
; CHECK-NEXT: retsp 0
- %0 = getelementptr inbounds %struct.FRAME.f* %CHAIN.1, i32 0, i32 0
- %1 = load i32* %0, align 4
+ %0 = getelementptr inbounds %struct.FRAME.f, %struct.FRAME.f* %CHAIN.1, i32 0, i32 0
+ %1 = load i32, i32* %0, align 4
ret i32 %1
}
diff --git a/test/CodeGen/XCore/unaligned_load.ll b/test/CodeGen/XCore/unaligned_load.ll
index b8b8827..325da8f 100644
--- a/test/CodeGen/XCore/unaligned_load.ll
+++ b/test/CodeGen/XCore/unaligned_load.ll
@@ -5,7 +5,7 @@
; CHECK: bl __misaligned_load
define i32 @align1(i32* %p) nounwind {
entry:
- %0 = load i32* %p, align 1 ; <i32> [#uses=1]
+ %0 = load i32, i32* %p, align 1 ; <i32> [#uses=1]
ret i32 %0
}
@@ -16,7 +16,7 @@ entry:
; CHECK: or
define i32 @align2(i32* %p) nounwind {
entry:
- %0 = load i32* %p, align 2 ; <i32> [#uses=1]
+ %0 = load i32, i32* %p, align 2 ; <i32> [#uses=1]
ret i32 %0
}
@@ -29,6 +29,6 @@ entry:
; CHECK: or
define i32 @align3() nounwind {
entry:
- %0 = load i32* bitcast (i8* getelementptr ([5 x i8]* @a, i32 0, i32 1) to i32*), align 1
+ %0 = load i32, i32* bitcast (i8* getelementptr ([5 x i8], [5 x i8]* @a, i32 0, i32 1) to i32*), align 1
ret i32 %0
}
diff --git a/test/CodeGen/XCore/unaligned_store_combine.ll b/test/CodeGen/XCore/unaligned_store_combine.ll
index d1f4e6c..4b29a05 100644
--- a/test/CodeGen/XCore/unaligned_store_combine.ll
+++ b/test/CodeGen/XCore/unaligned_store_combine.ll
@@ -7,7 +7,7 @@ entry:
; CHECK-LABEL: f:
; CHECK: ldc r2, 8
; CHECK: bl memmove
- %0 = load i64* %src, align 1
+ %0 = load i64, i64* %src, align 1
store i64 %0, i64* %dst, align 1
ret void
}
diff --git a/test/CodeGen/XCore/zextfree.ll b/test/CodeGen/XCore/zextfree.ll
index 48dce88..d1e2b7f 100644
--- a/test/CodeGen/XCore/zextfree.ll
+++ b/test/CodeGen/XCore/zextfree.ll
@@ -4,7 +4,7 @@
; CHECK-NOT: zext
define void @test(i8* %s1) {
entry:
- %u8 = load i8* %s1, align 1
+ %u8 = load i8, i8* %s1, align 1
%bool = icmp eq i8 %u8, 0
br label %BB1
BB1:
generated by cgit v1.1 at 2024-12-22 16:23:45 +0000